74F02 [NXP]
Quad 2-input NOR gate; 四路2输入NOR门
| 型号： | 74F02 |
| 厂家： | 
NXP |
| 描述： | Quad 2-input NOR gate |
| 文件： | 总11页 (文件大小：103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F02
Quad 2-input NOR gate
Product specification
IC15 Data Handbook
1990 Oct 04
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74F02
FEATURE
PIN CONFIGURATION
• Industrial temperature range available (–40°C to +85°C)
Q0
D0a
D0b
Q1
1
2
3
4
5
14
V
CC
13 Q3
12 D3b
11 D3a
10 Q2
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL SUPPLY
CURRENT
(TOTAL)
74F02
3.4ns
4.4mA
D1a
D1b
6
7
9
8
D2a
D2b
GND
SF00007
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
PKG DWG #
COMMERCIAL RANGE
= 5V ±10%, T = 0°C to +70°C
INDUSTRIAL RANGE
V
CC
V
CC
= 5V ±10%, T
= –40°C to +85°C
amb
amb
14-pin plastic DIP
14-pin plastic SO
N74F02N
N74F02D
I74F02N
SOT27-1
I74F02D
SOT108-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
Dna, Dnb
Qn
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
20µA/0.6mA
Data inputs
Data output
1.0/1.0
50/33
1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
LOGIC DIAGRAM
FUNCTION TABLE
2
3
INPUTS
OUTPUT
D0a
1
4
Q0
D0b
Dna
L
Dnb
L
Qn
H
L
5
6
D1a
D1b
Q1
Q2
Q3
L
H
8
9
D2a
D2b
10
13
H
L
L
H
H
L
11
12
V
= Pin 14
D3a
D3b
CC
GND = Pin 7
NOTES:
1
2
H = High voltage level
L = Low voltage level
SF00008
LOGIC SYMBOL
IEC/IEEE SYMBOL
2
3
5
6
8
9
11 12
1
2
3
1
4
D0a D0bD1a D1bD2a D2b D3a D3b
Q0 Q1 Q2 Q3
5
6
8
9
V
= Pin 14
10
CC
1
4
10 13
GND = Pin 7
SF00009
11
12
13
SF00010
2
1990 Oct 04
853-0326 00622
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74F02
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
Supply voltage
Input voltage
Input current
CC
IN
V
V
I
mA
IN
V
I
Voltage applied to output in high output state
–0.5 to V
V
OUT
CC
Current applied to output in low output state
Operating free air temperature range
40
mA
OUT
T
amb
Commercial range
Industrial range
0 to +70
–40 to +85
–65 to +150
°C
°C
°C
T
stg
Storage temperature range
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
4.5
NOM
MAX
V
Supply voltage
5.0
5.5
V
V
CC
IH
IL
V
V
High-level input voltage
Low-level input voltage
Input clamp current
2.0
0.8
–18
–1
V
I
I
I
mA
mA
mA
°C
°C
Ik
High-level output current
Low-level output current
OH
OL
20
T
amb
Operating free air temperature range
Commercial range
Industrial range
0
+70
+85
–40
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
1
SYMBOL
PARAMETER
High-level output voltage
Low-level output voltage
Input clamp voltage
TEST CONDITIONS
LIMITS
UNIT
2
MIN
2.5
TYP
MAX
V
OH
V
OL
V
IK
V
V
V
V
V
V
= MIN, V = MAX
±10%V
V
V
CC
IL
CC
= MIN, I = MAX
±5%V
2.7
3.4
0.30
0.30
-0.73
IH
OH
CC
= MIN, V = MAX
±10%V
0.50
0.50
-1.2
100
V
CC
IL
CC
CC
= MIN, I = MAX
±5%V
V
IH
Ol
= MIN, I = I
IK
V
CC
CC
I
I
I
Input current at maximum input
voltage
= MAX, V = 7.0V
µA
I
I
I
I
I
High-level input current
Low-level input current
V
CC
V
CC
V
CC
V
CC
V
CC
= MAX, V = 2.7V
20
µA
mA
mA
mA
mA
IH
I
= MAX, V = 0.5V
-0.6
-150
5.6
IL
I
3
Short-circuit output current
= MAX
= MAX
= MAX
-60
OS
CC
4
Supply current (total)
I
3.0
7.0
CCH
I
13.0
CCL
NOTES:
1
2
3
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
All typical values are at V = 5V, T = 25°C.
CC
amb
Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
4
I
is measured with outputs open.
CC
3
1990 Oct 04
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74F02
AC ELECTRICAL CHARACTERISTICS
LIMITS
V
= +5.0V
= +25°C
V
= +5.0V ± 10%
= 0°C to +70°C
V
= +5.0V ± 10%
CC
CC
CC
TEST
SYMBOL
PARAMETER
T
amb
T
amb
T = –40°C to +85°C
amb
C = 50pF, R = 500Ω
L L
UNIT
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L
L
L
L
MIN
TYP
MAX
MIN
MAX
MIN
MAX
t
t
Propagation delay
Dna, Dnb to Qn
2.5
2.0
4.4
3.2
5.5
4.3
2.5
2.0
6.5
5.3
2.5
1.5
7.0
6.0
PLH
PHL
Waveform 1
ns
AC WAVEFORMS
For all waveforms, V = 1.5V.
M
Dna, Dnb
V
V
M
M
t
t
PHL
PLH
V
V
M
M
Qn
SF00005
Waveform 1. Propagation delay for inverting outputs
TEST CIRCUIT AND WAVEFORM
t
AMP (V)
V
w
CC
90%
90%
NEGATIVE
PULSE
V
V
M
M
10%
10%
V
V
OUT
IN
0V
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
t
t )
T
L
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
10%
10%
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
R
L
C
L
R
T
=
=
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
family
V
rep. rate
t
w
t
t
THL
amplitude
3.0V
M
TLH
Termination resistance should be equal to Z
pulse generators.
of
OUT
2.5ns 2.5ns
74F
1.5V
1MHz
500ns
SF00006
4
1990 Oct 04
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74F02
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
5
1990 Oct 04
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74F02
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
6
1990 Oct 04
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74F02
NOTES
7
1990 Oct 04
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74F02
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
8
1990 Oct 04
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74F02
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
9
1990 Oct 04
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74F02
NOTES
10
1990 Oct 04
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74F02
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Philips
Semiconductors
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