74F11 [NXP]
Triple 3-input NAND gate; 三路3输入与非门
| 型号： | 74F11 |
| 厂家： | 
NXP |
| 描述： | Triple 3-input NAND gate |
| 文件： | 总8页 (文件大小：76K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F10 Triple 3-input NAND gate
74F11 Triple 3-input AND gate
Product specification
IC15 Data Handbook
1989 Sep 20
Philips
Semiconductors
Philips Semiconductors
Product specification
Gates
74F10, 74F11
74F10 Triple 3-input NAND gate
74F11 Triple 3-input AND gate
ORDERING INFORMATION
TYPICAL
TYPICAL
PROPAGATION
DELAY
SUPPLY CURRENT
(TOTAL)
TYPE
COMMERCIAL RANGE
= 5V ±10%,
V
DESCRIPTION
PKG DWG #
CC
T
= 0°C to +70°C
amb
74F10
74F11
3.5ns
4.2ns
3.3mA
5.3mA
14-pin plastic DIP
14-pin plastic SO
N74F10N, N74F11N
N74F10D, N74F11D
SOT27-1
SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
Dna, Dnb, Dnc
Qn
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
20µA/0.6mA
Data inputs
1.0/1.0
50/33
50/33
Data output (74F10)
Data output (74F11)
1.0mA/20mA
Qn
1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
PIN CONFIGURATIONS
74F10
74F11
D0a
D0b
D1a
D1b
D1c
1
2
3
4
5
14
V
D0a
D0b
D1a
D1b
D1c
1
2
3
4
5
14
CC
V
CC
13 D0c
12 Q0
11 D2c
10 D2b
13 D0c
12 Q0
11 D2c
10 D2b
Q1
6
7
9
8
D2a
Q2
Q1
6
7
9
8
D2a
Q2
GND
GND
SF00055
SF00056
LOGIC SYMBOLS
74F10
74F11
1
2
13
3
4
5
9
10
11
1
2
13
3
4
5
9
10
11
D0a D0b D0c D1a D1b D1c D2a D2b D2c
D0a D0b D0c D1a D1b D1c D2a D2b D2c
Q0
12
Q1
6
Q2
8
Q0
12
Q1
6
Q2
8
V
= Pin 14
V
= Pin 14
CC
CC
GND = Pin 7
GND = Pin 7
SF00057
SF00058
2
September 20, 1989
853–0329 97683
Philips Semiconductors
Product specification
Gates
74F10, 74F11
IEC/IEEE SYMBOLS
74F10
&
74F11
&
1
1
12
12
2
2
13
13
3
4
5
3
4
5
6
6
9
9
10
10
8
8
11
11
SF00059
SF00060
LOGIC DIAGRAMS
74F10
74F11
1
2
1
2
D0a
D0b
D0a
D0b
12
12
Q0
Q1
Q2
Q0
13
13
D0c
D0c
3
4
3
4
D1a
D1b
D1a
D1b
6
6
Q1
5
5
D1c
D1c
9
9
D2a
D2b
D2a
D2b
10
10
8
8
Q2
11
11
D2c
D2c
V
= Pin 14
V
= Pin 14
CC
CC
GND = Pin 7
GND = Pin 7
SF00061
SF00062
FUNCTION TABLE
OUTPUTS
74F10
INPUTS
74F11
Dna
L
Dnb
L
Dnc
L
Qn
H
H
H
H
H
H
H
L
Qn
L
L
L
H
L
L
L
H
H
L
L
L
H
L
L
H
H
H
L
L
H
L
L
H
H
L
H
H
H
NOTES:
1. H = High voltage level
2. L = Low voltage level
3
September 20, 1989
Philips Semiconductors
Product specification
Gates
74F10, 74F11
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
V
V
Supply voltage
Input voltage
Input current
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
CC
IN
V
V
I
mA
V
IN
V
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
–0.5 to V
40
OUT
OUT
CC
I
mA
°C
°C
T
amb
0 to +70
T
stg
–65 to +150
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
NOM
MAX
V
Supply voltage
5.0
5.5
V
V
CC
IH
IL
V
V
High-level input voltage
Low-level input voltage
Input clamp current
2.0
0.8
–18
–1
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
OH
OL
20
T
amb
Operating free air temperature range
0
+70
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
1
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
V
2
MIN
2.5
TYP
MAX
V
V
V
V
V
V
= MIN, V = MAX
±10%V
CC
IL
CC
V
OH
High-level output voltage
= MIN, I = MAX
±5%V
2.7
3.4
IH
OH
CC
= MIN, V = MAX
±10%V
0.35
0.35
0.50
0.50
–1.2
100
CC
IL
CC
CC
V
V
Low-level output voltage
V
OL
= MIN, I = MAX
±5%V
IH
Ol
Input clamp voltage
= MIN, I = I
IK
–0.73
V
IK
CC
CC
I
I
I
I
I
Input current at maximum input voltage
= MAX, V = 7.0V
µA
I
I
High-level input current
Low-level input current
V
CC
V
CC
V
CC
= MAX, V = 2.7V
20
–0.6
–150
2.1
µA
mA
mA
IH
IL
I
= MAX, V = 0.5V
I
3
Short-circuit output current
= MAX
–60
OS
I
I
V
= GND
= 4.5V
= 4.5V
= GND
1.8
6.0
4.7
7.2
CCH
IN
74F10
74F11
V
CC
= MAX
mA
mA
I
V
V
7.7
CCL
IN
IN
IN
I
Supply current (total)
CC
6.2
CCH
V
CC
= MAX
I
V
9.7
CCL
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
4
September 20, 1989
Philips Semiconductors
Product specification
Gates
74F10, 74F11
AC ELECTRICAL CHARACTERISTICS
LIMITS
V
= +5.0V
= +25°C
V
= +5.0V ± 10%
= 0°C to +70°C
CC
CC
TEST
CONDITION
SYMBOL
PARAMETER
T
amb
T
amb
UNIT
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
t
t
Propagation delay
Dna, Dnb, Dnc to Qn
2.4
1.5
3.7
3.2
5.0
4.3
2.4
1.5
6.0
5.3
PLH
PHL
74F10
74F11
Waveform 1
Waveform 2
ns
ns
t
t
Propagation delay
Dna, Dnb, Dnc to Qn
3.0
2.5
4.2
4.1
5.6
5.5
3.0
2.5
6.6
6.5
PLH
PHL
AC WAVEFORMS
For all waveforms, V = 1.5V.
M
Dna, Dnb, Dnc
Dna, Dnb, Dnc
V
V
V
V
M
M
M
M
t
t
t
t
PHL
PHL
PLH
PLH
V
V
V
V
Qn
M
M
M
M
Qn
SF00064
SF00063
Waveform 1. Propagation Delay for Inverting Outputs
(74F10)
Waveform 2. Propagation Delay for Non-Inverting Outputs
(74F11)
TEST CIRCUIT AND WAVEFORM
t
w
AMP (V)
0V
V
CC
90%
90%
NEGATIVE
PULSE
V
V
M
M
10%
10%
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
t
t )
T
L
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
10%
10%
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
R
L
C
L
R
T
=
=
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
family
74F
V
rep. rate
t
w
t
t
THL
amplitude
M
TLH
Termination resistance should be equal to Z
pulse generators.
of
OUT
2.5ns 2.5ns
3.0V
1.5V
1MHz
500ns
SF00006
5
September 20, 1989
Philips Semiconductors
Product specification
Gates
74F10, 74F11
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
6
1989 Sep 20
Philips Semiconductors
Product specification
Gates
74F10, 74F11
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
7
1989 Sep 20
Philips Semiconductors
Product specification
Gates
74F10, 74F11
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
Production
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 10-98
9397-750-05056
Document order number:
Philips
Semiconductors
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