74F132 [NXP]
Quad 2-input NAND Schmitt trigger; 四2输入与非施密特触发器
| 型号： | 74F132 |
| 厂家： | 
NXP |
| 描述： | Quad 2-input NAND Schmitt trigger |
| 文件： | 总8页 (文件大小：75K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F132
Quad 2-input NAND Schmitt trigger
Product specification
IC15 Data Handbook
1991 Jun 26
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74F132
DESCRIPTION
PIN CONFIGURATION
The 74F132 contains four 2-input NAND gates which accept
standard TTL input signals and provide standard TTL output levels.
They are capable of transforming slowly changing input signals into
sharply defined, jitter-free output signals. In addition, they have
greater noise margin than conventional NAND gates. Each circuit
contains a 2-input Schmitt trigger followed by a Darlington level
shifter and a phase splitter driving a TTL totem-pole output. The
Scmitt trigger uses positive feedback to effectively speed-up slow
input transitions and provide different input threshold voltages for
positive and negative-going transitions. This hysteresis between the
positive-going and negative-going input threshold (typically 800mV)
is determined by resistor ratios and is essentially insensitive to
temperature and supply voltage variations. As long as three inputs
14
13
12
11
10
9
1
2
3
4
5
D0a
D0b
Q0
V
CC
D3b
D3a
Q3
D1a
D1b
Q1
D2b
D2a
Q2
6
7
GND
8
SF00710
remain at a more positive voltage than V
, the gate will
T+MAX
respond in the transition of the other input as shown in Waveform 1.
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F132
6.3ns
13mA
ORDERING INFORMATION
COMMERCIAL RANGE
= 5V ±10%,
V
DESCRIPTION
PKG DWG #
CC
T
amb
= 0°C to +70°C
14-pin plastic DIP
14-pin plastic SO
N74F132N
SOT27-1
N74F132D
SOT108-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
Dna, Dnb
Qn
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
20µA/0.6mA
Data inputs
Data output
1.0/1.0
50/33
1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
&
1
2
3
6
1
2
4
5
9
10
12
13
4
5
D0a
D0b D1a D1b D2a D2b D3a D3b
9
Q0
3
Q1
6
Q2
8
Q3
11
8
10
12
13
11
V
= Pin 14
CC
GND = Pin 7
SF00711
SF00712
2
1991 Jun 26
853–0342 03094
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74F132
LOGIC DIAGRAM
FUNCTION TABLE
1
INPUTS
OUTPUT
D0a
D0b
3
6
Q0
2
Dna
L
Dnb
L
Qn
H
4
5
D1a
D1b
Q1
Q2
Q3
L
H
H
9
D2a
D2b
8
H
L
H
10
H
H
L
12
13
11
V
= Pin 14
D3a
D3b
CC
NOTES:
GND = Pin 7
H
L
= High voltage level
= Low voltage level
SF00002
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
V
V
V
Supply voltage
Input voltage
Input current
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
CC
V
IN
I
mA
V
IN
V
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature
–0.5 to V
40
OUT
OUT
CC
I
mA
°C
°C
T
0 to +70
amb
T
–65 to +150
stg
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
NOM
MAX
5.5
V
Supply voltage
4.5
5.0
V
CC
I
I
I
Input clamp current
–18
–1
mA
mA
mA
°C
IK
High-level output current
OH
OL
Low-level output current
20
T
Operating free-air temperature range
0
+70
amb
3
1991 Jun 26
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74F132
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
1
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
MAX
2
MIN
1.5
0.7
0.4
2.5
2.7
TYP
V
V
Positive-going threshold
Negative-going threshold–
Hysteresis (V – V
V
V
V
V
= 5.0V
1.7
0.9
0.8
2.0
1.1
V
V
V
T+
CC
CC
CC
CC
= 5.0V
= 5.0V
= MIN,
T–
nV
)
T–
T
T+
±10%V
CC
V
OH
High-level output voltage
Low-level output voltage
V
V
V V
, I = MAX
I= T–MAX OH
±5%V
3.4
0.30
0.30
–0.73
0
CC
V
CC
= MIN,
±10%V
0.50
0.50
–1.2
CC
CC
V
V
OL
V V
, I = MAX
I= T+MAX OL
±5%V
Input clamp voltage
V
CC
V
CC
V
CC
V
CC
= MIN, I = I
IK
V
IK
I
I
I
I
Input current at positive-going threshold
Input current at negative-going threshold
Input current at maximum input voltage
= 5.0V, V =V
µA
µA
µA
T+
I
T+
T–
= 5.0V, V =V
–350
T–
I
I
= MAX, V = 7.0V
100
20
I
I
I
I
High-level input current
Low-level input current
V
CC
V
CC
V
CC
= MAX, V = 2.7V
µA
mA
mA
IH
IL
I
= MAX, V = 0.5V
–0.6
–150
12.0
19.5
I
3
Short-circuit output current
= MAX
–60
OS
I
V
V
= GND
= 4.5V
8.5
CCH
I N
I
Supply current (total)
V
CC
= MAX
mA
CC
I
13.0
CCL
IN
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
4
1991 Jun 26
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74F132
AC ELECTRICAL CHARACTERISTICS
LIMITS
V
= +5.0V
= +25°C
V
= +5.0V ± 10%
= 0°C to +70°C
CC
CC
TEST
CONDITION
SYMBOL
PARAMETER
T
amb
T
amb
UNIT
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L
L
L
L
MIN
TYP
MAX
MIN
MAX
t
t
Propagation delay
Dna, Dnb to Qn
3.5
4.5
5.5
6.0
7.0
8.5
3.0
4.5
8.5
9.0
PLH
PHL
Waveform 1
ns
AC WAVEFORMS
For all waveforms, V = 1.5V.
M
Dna, Dnb
V
V
M
M
t
t
PHL
PLH
V
V
M
M
Qn
SF00005
Waveform 1. For Inverting Outputs
TEST CIRCUIT AND WAVEFORMS
t
w
AMP (V)
0V
V
CC
90%
90%
NEGATIVE
PULSE
V
V
M
M
10%
10%
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
t
t )
T
L
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
10%
10%
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
R
L
C
L
R
T
=
=
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
family
V
rep. rate
t
w
t
t
THL
amplitude
M
TLH
Termination resistance should be equal to Z
pulse generators.
of
OUT
2.5ns 2.5ns
74F
3.0V
1.5V
1MHz
500ns
SF00006
5
1991 Jun 26
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74F132
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
6
1991 Jun 26
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74F132
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
7
1991 Jun 26
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74F132
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 10-98
9397-750-05074
Document order number:
Philips
Semiconductors
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