74F189 [NXP]
64-bit TTL bipolar RAM, inverting 3-State; 64位TTL双极型RAM ，反相三态
| 型号： | 74F189 |
| 厂家： | 
NXP |
| 描述： | 64-bit TTL bipolar RAM, inverting 3-State |
| 文件： | 总10页 (文件大小：85K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F189A
64-bit TTL bipolar RAM, inverting
(3-State)
Product specification
IC15 Data Handbook
1990 Feb 23
Philips
Semiconductors
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, inverting (3-State)
74F189A
are fully decoded on chip. The outputs are in high impedance state
whenever the chip enable (CE) is high. The outputs are active only
in the READ mode (WE = high) and the output data is the
complement of the stored data.
FEATURES
• High speed performance
• Replaces 74F189
• Address access time: 8ns max vs 28ns for 74F189
• Power dissipation: 4.3mW/bit
TYPICAL
TYPICAL
ACCESS
TIME
SUPPLY
CURRENT
( TOTAL)
• Schottky clamp TTL
TYPE
74F189A
5.0ns
55mA
• One chip enable
• Inverting outputs (for non-inverting outputs see 74F219A)
• 3-State outputs
• 74F189A in 150 mil wide SO is preferred options for new designs
DESCRIPTION
The 74F189A is a high speed, 64-bit RAM organized as a 16-word
by 4-bit array. Address inputs are buffered to minimize loading and
ORDERING INFORMATION
ORDER CODE
COMMERCIAL RANGE
= 5V ±10%, T = 0°C to +70°C
DESCRIPTION
DRAWING NUMBER
V
CC
amb
16-pin plastic Dual In-line Package
16-pin plastic Small Outline (150mil)
N74F189AN
N74F189AD
SOT38-4
SOT109-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
D0 – D3
A0 – A3
CE
Data inputs
1.0/1.0
20µA/0.6mA
20µA/0.6mA
20µA/1.2mA
20µA/1.2mA
3mA/24mA
Address inputs
1.0/1.0
Chip enable input (active low)
Write enable input (active low)
Data outputs
1.0/2.0
WE
1.0/2.0
Q0 – Q3
150/40
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
PIN CONFIGURATION
LOGIC SYMBOL
4
6
10 12
1
2
3
4
5
16
V
A0
CE
CC
15 A1
14 A2
D0 D1 D2 D3
WE
1
15
14
13
2
A0
A1
A2
A3
CE
WE
13
12
11
D0
Q0
D1
A3
D3
3
Q0 Q1 Q2 Q3
6
7
8
Q3
10 D2
Q2
SF00299
Q1
9
5
7
9
11
SF00300
GND
V
= pin 16
CC
GND = pin 8
2
1990 Feb 23
853–1309 98908
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, inverting (3-State)
74F189A
IEC/IEEE SYMBOL
FUNCTION TABLE
INPUTS
OUTPUT
OPERATING
MODE
RAM 16X4
1
0
CE WE Dn
Q
15
n
0
A
14
13
Complement of stored
data
15
L
L
H
L
X
L
Read
1
2
3
G1
High
impedance
Write “0”
1 EN [READ]
1 C2 [WRITE]
H
L
H
X
High impedance
High impedance
Write “1”
4
6
5
7
A,2D
A
H
X
Disable input
9
10
12
NOTES:
H = High voltage level
L = Low voltage level
X = Don’t care
11
SF00301
LOGIC DIAGRAM
D0 D1 D2 D3
10 12
4
6
3
WE
Data buffers
2
CE
1
A0
15
14
13
16–word x
4–bit
memory cell
array
A1
A2
A3
Address
Decoder
Decoder
Drivers
Output buffers
5
7
9
11
V
= Pin 16
CC
GND = Pin 8
Q0 Q1 Q2 Q3
SF00302
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
CC
Supply voltage
Input voltage
Input current
V
IN
V
I
IN
mA
V
I
Voltage applied to output in high output state
Current applied to output in low output state
Operating free air temperature range
Storage temperature range
–0.5 to V
V
OUT
CC
48
mA
°C
°C
OUT
T
amb
0 to +70
T
–65 to +150
stg
3
1990 Feb 23
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, inverting (3-State)
74F189A
RECOMMENDED OPERATING CONDITIONS
LIMITS
NOM
5.0
UNIT
SYMBOL
PARAMETER
MIN
4.5
MAX
T = –40 to +85°C
A
V
CC
Supply voltage
5.5
V
V
High–level input voltage
Low–level input voltage
Input clamp current
2.0
V
IH
V
0.8
–18
–3
V
IL
I
Ik
mA
mA
mA
I
High–level output current
Low–level output current
Operating free air temperature range
OH
I
OL
24
T
amb
0
+70
°C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
1
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
2
MIN
TYP
MAX
V
High-level output voltage
V
V
V
V
= MIN, V = MAX
2.4
2.7
V
V
V
V
±10%V
±5%V
OH
CC
IL
CC
= MIN, I = MAX
3.4
IH
OH
CC
V
Low-level output voltage
= MIN, V = MAX
0.35
0.35
-0.73
0.50
0.50
±10%V
OL
CC
IL
CC
= MIN, I = MAX
±5%V
IH
OL
CC
V
Input clamp voltage
V
V
= MIN, I = I
IK
-1.2
100
V
IK
CC
I
µA
I
I
Input current at maximum input voltage
= MAX, V = 7.0V
I
CC
µA
mA
mA
I
High–level input current
V
V
= MAX, V = 2.7V
20
IH
CC
I
I
Low–level input current
others
= MAX, V = 0.5V
-0.6
-1.2
IL
CC
I
CE, WE
Offset output current,
high–level voltage applied
I
V
V
= MAX, V = 2.7V
50
µA
µA
OZH
CC
I
Offset output current,
low–level voltage applied
I
= MAX, V = 0.5V
–50
OZL
CC
I
3
I
Short-circuit output current
Supply current (total)
Input capacitance
V
CC
V
CC
V
CC
V
CC
= MAX
-60
-150
80
mA
mA
pF
OS
I
= MAX, CE = WE = GND
55
4
CC
C
= 5V, V = 2.0V
IN
IN
C
Output capacitance
= 5V, V
= 2.0V
OUT
7
pF
OUT
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
4
1990 Feb 23
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, inverting (3-State)
74F189A
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
amb
= +25°C
T
amb
= 0°C to +70°C
V
CC
= +5.0V ± 10%
SYMBOL
PARAMETER
TEST
V
CC
= +5.0V
UNIT
CONDITION
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
t
t
Propagation delay
An to Qn
2.5
2.0
5.0
4.5
8.0
8.0
2.5
2.0
8.0
8.0
PLH
PHL
Waveform 1
Waveform 2
Waveform 3
Waveform 4
Waveform 4
ns
ns
ns
ns
ns
Access time
t
t
Enable time
CE to Qn
2.0
2.0
3.5
4.0
6.0
7.0
1.5
2.0
7.0
7.5
PZH
PZL
t
t
Disable time
CE to Qn
2.5
1.5
4.5
3.0
7.0
5.5
2.0
1.5
8.0
6.0
PHZ
PLZ
t
t
Write recovery time
Enable time
WE to Qn
2.0
2.5
4.0
4.5
6.5
7.5
2.0
2.5
7.0
8.0
PZH
PZL
t
t
Disable time
WE to Qn
3.5
1.5
5.5
3.5
8.5
6.5
3.0
1.5
9.0
7.0
PHZ
PLZ
AC SETUP REQUIREMENT
LIMITS
T
= +25°C
= +5.0V
T
= 0°C to +70°C
= +5.0V ± 10%
amb
amb
V
SYMBOL
PARAMETER
TEST
V
UNIT
CC
CC
CONDITION
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
t
t
(H)
(L)
Setup time, high or low
An to WE
4.5
4.5
5.0
5.0
su
su
Waveform 4
Waveform 4
Waveform 4
Waveform 4
Waveform 4
Waveform 4
Waveform 4
ns
ns
ns
ns
ns
ns
ns
t (H)
Hold time, high or low
An to WE
0
0
0
0
h
t (L)
h
t
su
t
su
(H)
(L)
Setup time, high or low
Dn to WE
7.5
6.5
9.0
8.0
t (H)
Hold time, high or low
Dn to WE
0
0
0
0
h
t (L)
h
Setup time, low
CE (falling edge) to WE (falling edge)
t
su
(L)
0
0
Hold time, low
WE (falling edge) to WE (rising edge)
t (L)
h
6.5
7.0
7.5
8.0
Pulse width, low
WE
t (L)
w
AC WAVEFORMS FOR READ CYCLES
An
V
M
t
PHL
Qn
V
M
t
PLH
NOTE: For all waveforms, V = 1.5V.
SF00303
M
Waveform 1. Read cycle, address access time
5
1990 Feb 23
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, inverting (3-State)
74F189A
CE
Qn
V
M
t
PZH
V
M
t
PZL
NOTE: For all waveforms, V = 1.5V.
SF00304
M
Waveform 2. Read cycle, chip enable access time
CE
Qn
V
M
t
PHZ
V
M
t
PLZ
NOTE: For all waveforms, V = 1.5V.
SF00305
M
Waveform 3. Read cycle, chip disable time
AC WAVEFORMS FOR WRITE CYCLE
An
V
V
M
M
t
(H or L)
t
(H or L)
su
h
V
V
M
Dn
V
M
M
t
( L)
t (H or L)
h
su
V
V
M
M
CE
WE
Qn
t
(H or L)
t ( L)
h
su
t
( L)
w
V
V
M
M
t
t
PZH
PHZ
Hi–Z
V
V
M
M
t
t
PZL
PLZ
NOTE: For all waveforms, V = 1.5V.
SF00306
M
Waveform 4. Write cycle
6
1990 Feb 23
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, inverting (3-State)
74F189A
TEST CIRCUIT AND WAVEFORM
t
w
AMP (V)
90%
V
CC
90%
NEGATIVE
PULSE
V
V
M
M
10%
10%
V
V
OUT
IN
0V
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
t
t )
T
L
t
t )
TLH ( r
THL ( f
AMP (V)
90%
M
90%
POSITIVE
PULSE
V
V
M
10%
10%
0V
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
R
L
C
L
R
T
=
=
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
Termination resistance should be equal to Z
pulse generators.
family
V
rep. rate
t
t
t
amplitude
3.0V
M
w
TLH
THL
of
OUT
2.5ns 2.5ns
74F
1.5V
1MHz
500ns
SF00006
7
1990 Feb 23
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, inverting (3-State)
74F189A
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
8
1990 Feb 23
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, inverting (3-State)
74F189A
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
9
1990 Feb 23
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, inverting (3-State)
74F189A
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 10-98
9397-750-05092
Document order number:
Philips
Semiconductors
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