74F241AN [NXP]

IC,BUFFER/DRIVER,DUAL,4-BIT,F-TTL,DIP,20PIN,PLASTIC;
74F241AN
型号: 74F241AN
厂家: NXP    NXP
描述:

IC,BUFFER/DRIVER,DUAL,4-BIT,F-TTL,DIP,20PIN,PLASTIC

驱动 光电二极管 逻辑集成电路
文件: 总12页 (文件大小:103K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
74F240/74F240A  
Octal inverter buffer (3-State)  
74F241/74F241A  
Octal buffer (3-State)  
Product specification  
IC15 Data Handbook  
1991 Jan 02  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
74F240/74F240A/  
74F241/74F241A  
Buffers  
FEATURES  
DESCRIPTION  
The 74F240 and 74F241 are octal buffers that are ideal for  
driving bus lines of buffer memory address registers. The  
outputs are all capable of sinking 64mA and sourcing up to  
15mA. The device features two output enables, each  
controlling four of the 3–state outputs.  
Octal bus interface  
3-State buffer outputs sink 64mA  
15mA source current  
Guaranteed output skew less than 2.0ns  
(74F240A/74F241A)  
The 74F240A and 74F241A are functionally equivalent to  
their non–A counterparts. They have been designed to  
reduce effects of ground noise. Other advantages are noted  
in the features.  
Reduced ground bounce (74F240A/74F241A)  
Reduced ICC (74F241A only)  
Reduced loading (74F240A IIL = 100µA,  
74F241A IIL = 40µA)  
TYPE  
TYPICAL PROPAGATION DELAY  
TYPICAL SUPPLY CURRENT (TOTAL)  
74F240  
74F240A  
74F241  
74F241A  
4.3ns  
3.8ns  
5.0ns  
4.5ns  
37mA  
40mA  
53mA  
32mA  
ORDERING INFORMATION  
ORDER CODE  
COMMERCIAL RANGE  
= 5V ±10%, T = 0°C to +70°C  
DESCRIPTION  
PKG DWG #  
V
CC  
amb  
20–pin plastic DIP  
20–pin plastic SOL  
20-pin plastic SSOP II  
N74F240N, N74F240AN, N74F241N, N74F241AN  
N74F240D, N74F240AD, N74F241D, N74F241AD  
N74F240DB  
SOT146-1  
SOT163-1  
SOT339-1  
INPUT AND OUTPUT LOADING AND FAN OUT TABLE  
74F (U.L.)  
HIGH/LOW  
LOAD VALUE  
HIGH/LOW  
PINS  
DESCRIPTION  
Data inputs (74F240)  
Data inputs (74F240A)  
Data inputs (74F241)  
Data inputs (74F241A)  
1.0/1.67  
1.0/0.167  
1.0/2.67  
1.0/0.067  
20µA/1.0mA  
20µA/100µA  
20µA/1.6mA  
20µA/40µA  
Ian, Ibn  
OEa, OEb  
OEa, OEb  
Output enable inputs (active low) (74F240)  
Output enable inputs (active low) (74F240A)  
Output enable input (74F241)  
1.0/0.33  
1.0/0.167  
1.0/1.67  
20µA/0.2mA  
20µA/100µA  
20µA/1.0mA  
20µA/40µA  
15mA/64mA  
15mA/64mA  
Output enable input (74F241A)  
1.0/0.067  
750/106.7  
750/106.7  
Yan, Ybn  
Yan, Ybn  
Data outputs (74F241, 74F241A)  
Data outputs (74F240, 74F240A)  
Note to input and output loading and fan out table  
One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.  
2
January 2, 1991  
853–0355 01345  
Philips Semiconductors  
Product specification  
74F240/74F240A/  
74F241/74F241A  
Buffers  
PIN CONFIGURATION FOR 74F240/74F240A  
IEC/IEEE SYMBOL FOR 74F240/74F240A  
OEa  
Ia0  
1
2
3
4
5
6
7
8
9
20 V  
CC  
1
EN1  
EN2  
19 OEb  
18 Ya0  
17 Ib0  
16 Ya1  
15 Ib1  
14 Ya2  
13 Ib2  
12 Ya3  
11 Ib3  
19  
Yb0  
Ia1  
2
4
18  
16  
14  
12  
2D  
1
2
Yb1  
Ia2  
6
8
Yb2  
Ia3  
17  
3
5
15  
13  
11  
Yb3  
7
9
GND 10  
SF00320  
SF00322  
LOGIC SYMBOL FOR 74F240/74F240A  
LOGIC DIAGRAM FOR 74F240/74F240A  
2
18  
17  
3
5
Ia0  
Ia1  
Ya0  
Ya1  
Ib0  
Ib1  
Yb0  
Yb1  
2
4
6
8
17 15 13 11  
4
16  
15  
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3  
OEa  
OEb  
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3  
1
6
8
14  
12  
13  
11  
7
9
Ia2  
Ia3  
Ya2  
Ya3  
Ib2  
Ib3  
Yb2  
Yb3  
19  
1
10  
OEa  
OEb  
18 16 14 12  
3
5
7
9
V
= Pin 20  
V
= Pin 20  
CC  
CC  
GND = Pin 10  
GND = Pin 10  
SF00321  
SF00323  
FUNCTION TABLE FOR 74F240/74F240A  
INPUTS  
OUTPUTS  
OEa  
L
Ia  
L
OEb  
Ib  
L
Ya  
H
L
Yb  
H
L
L
L
L
H
X
H
X
H
H
Z
Z
Notes to function table for 74F240/74F240A  
H = High voltage level  
L
X
Z
=
=
=
Low voltage level  
Don’t care  
High impedance ”off” state  
3
January 2, 1991  
Philips Semiconductors  
Product specification  
74F240/74F240A/  
74F241/74F241A  
Buffers  
PIN CONFIGURATION FOR 74F241/74F241A  
IEC/IEEE SYMBOL FOR 74F241/74F241A  
1
OEa  
Ia0  
1
2
3
4
5
6
7
8
9
20  
V
CC  
EN1  
EN2  
19  
19 OEb  
18 Ya0  
17 Ib0  
16 Ya1  
15 Ib1  
14 Ya2  
13 Ib2  
12 Ya3  
11 Ib3  
Yb0  
Ia1  
2
4
18  
16  
14  
12  
2D  
1
Yb1  
Ia2  
6
8
Yb2  
Ia3  
17  
3
5
2
15  
Yb3  
7
9
13  
11  
GND 10  
SF00326  
SF00324  
LOGIC SYMBOL FOR 74F241/74F241A  
LOGIC DIAGRAM FOR 74F241/74F241A  
17  
15  
3
5
2
4
18  
16  
2
4
6
8
17 15 13  
11  
Ib0  
Ib1  
Yb0  
Yb1  
Ia0  
Ia1  
Ya0  
Ya1  
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3  
1
OEa  
OEb  
13  
7
9
6
14  
12  
Ib2  
Ib3  
Yb2  
Yb3  
Ia2  
Ia3  
Ya2  
Ya3  
19  
11  
10  
8
1
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3  
OEb  
OEa  
18 16 14 12  
3
5
7
9
V
= Pin 20  
V
= Pin 20  
CC  
CC  
GND = Pin 10  
GND = Pin 10  
SF00325  
SF00327  
FUNCTION TABLE FOR 74F241/74F241A  
INPUTS  
OUTPUTS  
OEa  
L
Ia  
L
OEb  
Ib  
L
Ya  
L
Yb  
L
H
H
L
L
H
X
H
X
H
Z
H
Z
H
Notes to function table for 74F241/74F241A  
H = High voltage level  
L
X
Z
=
=
=
Low voltage level  
Don’t care  
High impedance ”off” state  
4
January 2, 1991  
Philips Semiconductors  
Product specification  
74F240/74F240A/  
74F241/74F241A  
Buffers  
ABSOLUTE MAXIMUM RATINGS  
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the  
operating free air temperature range.)  
SYMBOL  
PARAMETER  
RATING  
–0.5 to +7.0  
–0.5 to +7.0  
–30 to +5  
UNIT  
V
V
CC  
V
IN  
Supply voltage  
Input voltage  
Input current  
V
I
IN  
mA  
V
I
Voltage applied to output in high output state  
Current applied to output in low output state  
–0.5 to V  
V
OUT  
CC  
128  
mA  
°C  
°C  
OUT  
T
amb  
Operating free air temperature range  
Storage temperature range  
0 to +70  
T
stg  
–65 to +150  
RECOMMENDED OPERATING CONDITIONS  
SYMBOL  
PARAMETER  
LIMITS  
UNIT  
MIN  
4.5  
NOM  
MAX  
V
Supply voltage  
5.0  
5.5  
V
V
CC  
IH  
IL  
V
V
High–level input voltage  
Low–level input voltage  
Input clamp current  
2.0  
0.8  
–18  
–15  
64  
V
I
I
I
mA  
mA  
mA  
Ik  
High–level output current  
Low–level output current  
OH  
OL  
T
amb  
Operating free air temperature range  
0
+70  
°C  
5
January 2, 1991  
Philips Semiconductors  
Product specification  
74F240/74F240A/  
74F241/74F241A  
Buffers  
DC ELECTRICAL CHARACTERISTICS  
(Over recommended operating free-air temperature range unless otherwise noted.)  
SYMBOL  
PARAMETER  
TEST  
LIMITS  
UNIT  
1
2
CONDITIONS  
MIN TYP  
MAX  
±10%V  
V
V
V
= MIN,  
I
= –3mA  
2.4  
2.7  
2.0  
2.0  
V
V
V
V
C
CC  
OH  
C
V
OH  
High-level output voltage  
±5%V  
= MAX,  
= MIN  
3.4  
CC  
IL  
±10%V  
I
=
C
IH  
OH  
–15mA  
C
±5%V  
CC  
V
V
= MIN,  
= MAX,  
±10%V  
CC  
IL  
C
V
V
Low-level output voltage  
I
OL  
= MAX  
0.50  
0.50  
V
OL  
C
V
V
V
V
= MIN,  
±5%V  
0.42  
V
IH  
CC  
Input clamp voltage  
= MIN, I = I  
IK  
–0.73 -1.2  
100  
V
IK  
CC  
CC  
CC  
I
I
I
Input current at maximum input voltage  
High–level input current  
= MAX, V = 7.0V  
µA  
µA  
mA  
µA  
mA  
mA  
µA  
I
I
IH  
= MAX, V = 2.7V  
20  
I
74F240 all inputs  
–1.0  
74F240A all inputs  
74F241 OEa, OEb  
74F241 Ian, Ibn  
–100  
–1.0  
I
I
Low–level input current  
V
CC  
= MAX, V = 0.5V  
I
IL  
–1.6  
74F241A all inputs  
–40  
Off–state output current,  
high–level voltage applied  
µA  
µA  
V
CC  
= MAX, V = 2.7V  
50  
OZH  
O
Off–state output current,  
low–level voltage applied  
I
I
V
V
= MAX, V = 0.5V  
–50  
OZL  
CC  
O
3
Short–circuit output current  
= MAX  
-100  
-225  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
OS  
CC  
I
I
12  
50  
35  
28  
58  
34  
40  
60  
65  
20  
49  
26  
18  
70  
45  
37  
75  
50  
60  
90  
90  
30  
65  
40  
CCH  
74F240  
74F240A  
74F241  
I
CCL  
CCZ  
CCH  
V
CC  
= MAX  
I
I
CCL  
CCZ  
CCH  
I
Supply current (total)  
I
CC  
I
I
I
CCL  
CCZ  
CCH  
V
CC  
= MAX  
I
I
74F241A  
I
CCL  
CCZ  
Notes to DC electrical characteristics  
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.  
2. All typical values are at V = 5V, T  
= 25°C.  
amb  
CC  
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold  
OS  
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting  
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any  
sequence of parameter tests, I tests should be performed last.  
OS  
6
January 2, 1991  
Philips Semiconductors  
Product specification  
74F240/74F240A/  
74F241/74F241A  
Buffers  
AC ELECTRICAL CHARACTERISTICS  
LIMITS  
T
= +25°C  
= +5.0V  
T
= 0°C to +70°C  
= +5.0V ± 10%  
amb  
amb  
V
SYMBOL  
PARAMETER  
TEST  
V
UNIT  
CC  
CC  
CONDITION  
C = 50pF, R = 500Ω  
C = 50pF, R = 500Ω  
L
L
L
L
MIN  
TYP  
MAX  
MIN  
MAX  
t
t
Propagation delay  
Ian, Ibn to Yn  
3.0  
2.0  
4.5  
3.0  
6.5  
4.5  
3.0  
2.0  
7.5  
5.0  
PLH  
PHL  
Waveform 1  
ns  
ns  
ns  
ns  
ns  
t
t
Output enable time  
to high or low level  
Waveform 3  
Waveform 4  
3.0  
4.5  
5.0  
6.5  
7.5  
8.5  
3.0  
4.0  
9.0  
10.0  
PZH  
PZL  
74F240  
t
t
Output disable time  
from high or low level  
Waveform 3  
Waveform 4  
3.0  
3.0  
5.5  
5.0  
7.0  
7.0  
3.0  
3.0  
7.5  
7.5  
PHZ  
PLZ  
t
t
Propagation delay  
Ian, Ibn to Yn  
2.5  
2.0  
4.0  
3.5  
5.5  
5.5  
2.0  
2.0  
6.5  
6.0  
PLH  
PHL  
Waveform 1  
t
t
Output enable time  
to high or low level  
Waveform 3  
Waveform 4  
2.0  
3.5  
4.0  
5.0  
6.5  
7.5  
2.0  
3.0  
7.0  
8.5  
PZH  
PZL  
74F240A  
t
t
Output disable time  
from high or low level  
Waveform 3  
Waveform 4  
2.0  
1.5  
3.5  
2.5  
6.0  
5.0  
1.5  
1.0  
6.5  
5.5  
PHZ  
PLZ  
ns  
ns  
ns  
1, 2  
t
Output skew  
Waveform 5  
Waveform 2  
1.5  
2.0  
sk(0)  
t
t
Propagation delay  
Ian, Ibn to Yn  
2.5  
2.5  
4.0  
4.0  
5.2  
5.2  
2.5  
2.5  
6.2  
6.5  
PLH  
PHL  
t
t
Output enable time  
to high or low level  
Waveform 3  
Waveform 4  
2.0  
2.0  
4.0  
5.0  
5.7  
7.0  
2.0  
2.0  
6.7  
8.0  
PZH  
PZL  
74F241  
ns  
ns  
ns  
ns  
t
t
Output disable time  
from high or low level  
Waveform 3  
Waveform 4  
2.0  
2.0  
4.0  
4.0  
6.0  
6.0  
2.0  
2.0  
7.0  
7.0  
PHZ  
PLZ  
t
t
Propagation delay  
Ian, Ibn to Yn  
2.5  
2.5  
4.5  
4.5  
5.8  
5.8  
2.5  
2.5  
6.5  
6.5  
PLH  
PHL  
Waveform 2  
t
t
Output enable time  
to high or low level  
Waveform 3  
Waveform 4  
2.5  
3.5  
4.5  
5.0  
6.0  
7.0  
2.0  
3.0  
6.7  
8.0  
PZH  
PZL  
74F241A  
t
t
Output disable time  
from high or low level  
Waveform 3  
Waveform 4  
2.0  
1.5  
4.0  
3.5  
6.0  
5.5  
1.5  
1.0  
6.5  
6.0  
PHZ  
PLZ  
ns  
ns  
1, 2  
t
Output skew  
Waveform 5  
1.5  
2.0  
sk(0)  
Notes to AC electrical characteristics  
1. | t actual – t actual| for any output compared to any other output where N and M are either LH or HL.  
PN  
PM  
2. Skew times are valid only under same test conditions (temperature, V , loading, etc.,).  
CC  
AC WAVEFORMS  
Ian, Ibn  
V
Ian, Ibn  
V
M
V
V
M
M
M
t
t
t
t
PHL  
PLH  
PHL  
PLH  
Yn  
V
V
V
V
M
M
M
Yn  
M
SF00328  
SF00329  
Waveform 1. Propagation delay for inverting outputs  
Waveform 2. Propagation delay for non–invertIng outputs  
7
January 2, 1991  
Philips Semiconductors  
Product specification  
74F240/74F240A/  
74F241/74F241A  
Buffers  
OEn  
Yn, Yn  
Yn, Yn  
V
V
V
M
M
M
OEb  
V
-0.3V  
0V  
OH  
t
t
t
PHZ  
sk(0)  
PZH  
Yn, Yn  
V
M
V
M
SF00332  
SF00330  
Waveform 3. 3-state output enable time to high level  
and output disable time from high level  
Waveform 5. Output skew  
Notes to AC waveforms  
1. For all waveforms, V = 1.5V.  
2. The shaded areas indicate when the input is permitted to change  
for predictable output performance.  
OEn  
OEb  
M
V
t
V
M
M
t
PZL  
PLZ  
3.5V  
V
M
Yn, Yn  
V
+0.3V  
OL  
SF00331  
Waveform 4. 3-state output enable time to low level and output  
disable time from low level  
TEST CIRCUIT AND WAVEFORMS  
V
CC  
t
w
AMP (V)  
0V  
7.0V  
90%  
90%  
NEGATIVE  
PULSE  
V
V
M
R
M
L
V
V
OUT  
IN  
10%  
10%  
PULSE  
GENERATOR  
D.U.T.  
t
t )  
t
t )  
THL ( f  
TLH ( r  
R
C
R
L
T
L
t
t )  
t
t )  
TLH ( r  
THL ( f  
AMP (V)  
0V  
90%  
M
90%  
POSITIVE  
PULSE  
V
V
M
Test Circuit for Open Collector Outputs  
10%  
10%  
t
w
SWITCH POSITION  
TEST  
SWITCH  
closed  
closed  
open  
Input Pulse Definition  
t
t
PLZ  
PZL  
All other  
DEFINITIONS:  
R
L
C
L
R
T
=
=
=
Load resistor;  
INPUT PULSE REQUIREMENTS  
see AC electrical characteristics for value.  
Load capacitance includes jig and probe capacitance;  
see AC electrical characteristics for value.  
Termination resistance should be equal to Z  
pulse generators.  
family  
V
M
rep. rate  
t
w
t
t
THL  
amplitude  
TLH  
of  
OUT  
2.5ns  
2.5ns  
74F  
3.0V  
1.5V  
1MHz  
500ns  
SF00128  
8
January 2, 1991  
Philips Semiconductors  
Product specification  
74F240/74F240A  
74F241/74F241A  
Buffers  
DIP20: plastic dual in-line package; 20 leads (300 mil)  
SOT146-1  
9
1991 Jan 02  
Philips Semiconductors  
Product specification  
74F240/74F240A  
74F241/74F241A  
Buffers  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
10  
1991 Jan 02  
Philips Semiconductors  
Product specification  
74F240/74F240A  
74F241/74F241A  
Buffers  
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm  
SOT339-1  
11  
1991 Jan 02  
Philips Semiconductors  
Product specification  
74F240/74F240A  
74F241/74F241A  
Buffers  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
Production  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make chages at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1998  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
print code  
Date of release: 10-98  
9397-750-05101  
Document order number:  
Philips  
Semiconductors  

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