74F3893 [NXP]
Quad futurebus backplane transceiver; 四FUTUREBUS背板收发器![74F3893](http://pdffile.icpdf.com/pdf1/p00075/img/icpdf/74F3893_394060_icpdf.jpg)
型号: | 74F3893 |
厂家: | ![]() |
描述: | Quad futurebus backplane transceiver |
文件: | 总10页 (文件大小:76K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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INTEGRATED CIRCUITS
74F3893
Quad futurebus backplane transceiver
Product specification
IC15 Data Handbook
1991 Jan 18
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad Futurebus backplane transceiver
74F3893
FEATURES
much less for BTL, so is its receiver threshold region,
therefore noise margins are excellent.
• Quad backplane transceiver
BTL offers low power consumption, low ground bounce, EMI
and crosstalk, low capacitive loading, superior noise margin
and low propagation delays. This results in a high
bandwidth, reliable backplane.
• Drives heavily loaded backplanes with equivalent load
impedances down to 10 ohms
• Futurebus drivers sink 100mA
• Reduced voltage swing (1 volt) produces less noise and
reduces power consumption
The 74F3893 has four TTL outputs (Rn) on the receiver
side with a common receiver enable input (RE). It has four
data inputs (Dn) which are also TTL. These data inputs are
NANDed with the data enable input (DE). The four I/O pins
(bus side) are futurebus compatible, sink a minimum of
100mA, and are designed to drive heavily loaded
backplanes with load impedances as low as 10 ohms. All
outputs are designed to be glitch–free during power up and
down.
• High speed operation enhances performance of backplane
buses and facilitates incident wave switching
• Compatible with IEEE 896 and IEEE 1194.1 Futurebus
Standards
• Built–in precision band–gap (BG) reference provides
accurate receiver thresholds and improved noise immunity
• Glitch–free power up/power down operation on all outputs
• Pin and function compatible with NSC DS3893
TYPE
TYPICAL
PROPAGATION DELAY
TYPICAL SUPPLY
CURRENT( TOTAL)
DESCRIPTION
74F3893
3.0ns
55mA
The 74F3893 is a quad backplane transceivers and is
intended to be used in very high speed bus systems.
ORDERING INFORMATION
The 74F3893 interfaces to ‘Backplane Transceiver Logic’
(BTL). BTL features a reduced (1V to 2V) voltage swing for
lower power consumption and a series diode on the drivers
to reduce capacitive loading (< 5pF).
ORDER CODE
COMMERCIAL RANGE
= 5V ±10%,
DESCRIPTION
PKG DWG #
V
CC
T
amb
= 0°C to +70°C
Incident wave switching is employed, therefore BTL
propagation delays are short. Although the voltage swing is
20-pin PLCC
N74F3893A
SOT380-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
74F (U.L.)
HIGH/LOW
PINS
DESCRIPTION
LOAD VALUE
HIGH/LOW
D0 – D3
DE
Data inputs
1.0/0.067
1.0/0.33
1.0/0.067
5.0/0.033
OC/166.7
150/40
20µA/40µA
Data enable input
Receiver enable input
Bus inputs
20µA/200µA
20µA/40µA
100µA/20µA
OC/100mA
3mA/24mA
RE
I/O0 – I/O3
I/O0 – I/O3
R0 – R7
Bus outputs
Receiver outputs
Notes to input and output loading and fan out table
One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
OC= Open collector.
2
January 18, 1991
853-1397 01496
Philips Semiconductors
Product specification
Quad Futurebus backplane transceiver
74F3893
PIN CONFIGURATION
FUNCTION TABLE
INPUT/
OUT-
PUT
OUT-
PUT
BG BUS
GNDGND
INPUTS
OPERATING
V
R0 D0
3
CC
2
1
20 19
DE
H
H
H
L
RE
L
Dn
L
I/On
H
Rn
L
MODE
4
5
6
D1
18
I/O0
Transmit to bus
R1
LOGIC GND
D2
17 I/O1
L
H
L
H
Z
16 BUS GND
PLCC
7
8
15
H
H
L
Dn
X
Dn
H
Receiver 3–state,
transmit to bus
I/O2
R2
14
I/O3
Z
9
10 11 12 13
L
X
H
L
Receive, I/On = inputs
D3 R3 DE RE BUS
GND
L
L
X
L
H
SF00573
Notes to function table
1. H = High voltage level
2. L
3. X
4. Z
=
=
=
Low voltage level
Don’t care
High impedance ”off” state
LOGIC SYMBOL
2
4
7
9
LOGIC DIAGRAM
2
D0
18
I/O0
D0 D1 D2 D3
3
4
R0
D1
11
12
DE
RE
17
I/O1
I/O0 I/O1 1/O2 I/O3 R0 R1 R2 R3
5
7
R1
D2
12
RE
15
18 17 15 14
3
5
8
10
V
= Pin 1,
I/O2
CC
LOGIC GND = Pin 8
BUS GND = Pin 13, 16, 19
BG GND = Pin 20
8
R2
D3
SF00574
9
14
I/O3
V
= Pin 1
10
11
CC
R3
DE
LOGIC GND = Pin 6
BUS GND = Pin 13, 16, 19
BG GND = Pin 20
SF00576
IEC/IEEE SYMBOL
11
12
EN1
EN2
3
18
5
2
2
4
7
9
1D
17
7
15
9
14
SF00575
3
January 18, 1991
Philips Semiconductors
Product specification
Quad Futurebus backplane transceiver
74F3893
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
PARAMETER
RATING
–1.5 to +6.5
–1.5 to +6.5
–30 to +5
UNIT
V
V
CC
V
IN
Supply voltage
Input voltage
Input current
V
I
IN
mA
V
I
Voltage applied to output in high output state
Current applied to output in low output state
–0.5 to 5.5
200
V
OUT
mA
°C
°C
OUT
T
amb
Operating free air temperature range
Storage temperature range
0 to +70
T
stg
–65 to +150
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
MIN
4.5
NOM
MAX
UNIT
V
V
Supply voltage
5.0
5.5
CC
IH
IL
V
V
High–level input voltage
Low–level input voltage
Input clamp current
Dn, DE, RE
2.0
V
0.8
–18
1.625
–3
V
I
Ik
mA
mA
mA
mA
V
TH
Bus input threshold
I/On only
Rn only
1.475
1.55
I
I
High–level output current
Low–level output current
OH
OL
100
Operating free air temperature
range
T
amb
0
+70
°C
4
January 18, 1991
Philips Semiconductors
Product specification
Quad Futurebus backplane transceiver
74F3893
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST
LIMITS
UNIT
1
2
CONDITIONS
MIN TYP
MAX
I
High–level output current
I/On
Rn
V
V
V
= MAX, V = MAX, V = MIN, V = 1.5V
10
100
µA
OH
CC
CC
CC
IL
IH
OH
V
V
High-level output voltage
= MAX, V = 1.3V, RE = 0.8V, I = MAX
2.5
V
OH
IL
OH
High-level output bus voltage
I/On
= MAX, Dn = DE = 0.8V, V = 2.0V,
T
OHB
2.5
V
R = 10Ω, RE = 2.0V
T
V
V
Low-level output voltage
Low-level output
bus voltage
Rn
V
= MIN, V = 1.8V, RE = 0.8V, I = 6mA
0.35
1.0
0.5
1.2
1.1
2.9
3.2
V
V
OL
CC
IN
OL
I/On
Dn = DE = V , I = 100mA
0.75
0.75
1.9
OLB
IH OL
Dn = DE = V , I = 80mA
1.0
V
IH OL
V
Driver output positive
clamp voltage
I/On
V
CC
= MAX or 0V,
I/On = 1mA
V
OCB
IK
Dn = DE = 0.8V, RE = 2.0V
I/On = 10mA
2.3
V
V
Input clamp voltage
V
CC
V
CC
V
CC
= MIN, I =I
IK
–0.73 -1.2
V
I
I
I
Input current at maximum input voltage
= MAX, V = 7.0V, DE = RE = Dn = V
100
20
µA
µA
I
I
CC
High–level input current
Dn, RE, DE
= MAX, DE = RE = Dn =5.5V
IH
High–level I/O bus current
(power off)
I
I
I/On
V
= 0V, Dn = DE = 0.8V, I/On =1.2V, RE = 0V
100
µA
IHB
IL
CC
Low–level input current
Dn, RE
DE
V
CC
V
CC
V
CC
= MAX, V = 0.5V, DE = 4.5V
–40
µA
µA
I
= MAX, V = 0.5V, Dn = 4.5V
–200
I
Low–level I/O bus current
(power on)
= MAX, Dn = DE = 0.8V, I/On =0.75V,
I
I
I
I/On
Rn
–20
-60
20
20
µA
µA
ILB
RE = 0V
Off–state output current,
high–level voltage applied
V
V
= MAX, V = 2.7V, RE = 2V
I
OZH
OZL
CC
Off–state output current,
low–level voltage applied
µA
= MAX, V = 0.5V, RE = 2V
–20
CC
I
3
I
I
Short circuit output current
Rn
V
V
= MAX
-150
mA
mA
OS
CC
4
Supply current (total)
= MAX, (RE = V or V )
55
80
CC
CC
IH
IL
Notes to DC electrical characteristics
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T
= 25°C.
amb
CC
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
5
January 18, 1991
Philips Semiconductors
Product specification
Quad Futurebus backplane transceiver
74F3893
AC ELECTRICAL CHARACTERISTICS FOR DRIVER AND DRIVER ENABLE
LIMITS
T
T
amb
= +25°C
= 0°C to +70°C
amb
V
CC
= +5.0V ± 10%
SYMBOL
PARAMETER
TEST
V
CC
= +5.0V
UNIT
CONDITION
C
= 50pF, R = 10Ω
C = 50pF, R = 10Ω
D
T
D
T
MIN
TYP
MAX
MIN
MAX
t
t
Propagation delay
Dn to I/On
1.0
1.5
2.0
3.0
5.0
5.5
1.0
1.5
5.5
6.0
PLH
PHL
Waveform 1
Waveform 1
Waveform 1
ns
ns
t
t
Propagation delay
DE to I/On
1.0
1.5
2.0
3.0
4.5
5.5
1.0
1.5
5.5
6.0
PLH
PHL
t
t
Dn to I/O transition time
10% to 90%, 90% to 10%
1.0
1.0
4.0
4.0
1.0
1.0
5.0
5.0
TLH
THL
ns
ns
t
Skew between drivers in same package
1.0
sk(o)
AC ELECTRICAL CHARACTERISTICS FOR RECEIVER
LIMITS
T
= +25°C
= +5.0V
T
= 0°C to +70°C
= +5.0V ± 10%
amb
amb
V
SYMBOL
PARAMETER
TEST
V
UNIT
CC
CC
CONDITION
C = 50pF, R = 1kΩ
C = 50pF, R = 1kΩ
L
L
L
L
MIN
TYP
MAX
MIN
MAX
t
t
Propagation delay
I/On to Rn
1.0
3.6
2.0
5.5
4.5
7.5
1.0
3.6
5.5
8.5
PLH
PHL
Waveform 2
ns
AC ELECTRICAL CHARACTERISTICS FOR RECEIVER ENABLE
A PORT LIMITS
T
= +25°C
= +5.0V
T
= 0°C to +70°C
= +5.0V ± 10%
amb
amb
V
SYMBOL
PARAMETER
TEST
V
UNIT
CC
CC
CONDITION
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L
L
L
L
MIN
TYP
MAX
MIN
MAX
t
t
Output enable time to high or low level,
RE to Rn
1.5
2.5
3.0
4.0
5.5
7.0
1.5
2.0
6.0
7.5
PZH
PZL
Waveform 3, 4
Waveform 3, 4
ns
ns
t
t
Output disable time from high or low level,
RE to Rn
1.5
1.5
3.0
3.0
5.5
5.5
1.0
1.0
6.5
6.0
PHZ
PLZ
6
January 18, 1991
Philips Semiconductors
Product specification
Quad Futurebus backplane transceiver
74F3893
AC WAVEFORMS
V
V
M
M
RE
Rn
DE, Dn
V
t
V
M
M
V
-0.3V
0V
OH
t
t
PHZ
PHL
t
PZH
PLH
2V
1V
90%
90%
V
M
I/On
t
t
TLH
V
V
THL
M
M
10%
10%
SF00579
SF00577
Waveform 3. 3–state output enable time to high level
and output disable time from high level
Waveform 1. Propagation delay for driver
V
t
V
M
2V
RE
Rn
M
I/On
V
V
M
M
t
PZL
PLZ
1V
t
t
PHL
PLH
V
M
Rn
V
V
M
M
V
+0.3V
OL
SF00580
SF00578
Waveform 4. 3-state output enable time to low level
and output disable time from low level
Waveform 2. Propagation delay for receiver
Notes to AC waveforms
1. For all waveforms, V = 1.5V.
M
2. The shaded areas indicate when the input is permitted to change for predictable output performance.
TEST CIRCUITS AND WAVEFORMS
SWITCH POSITION
t
AMP (V)
Low V
w
TEST
SWITCH
closed
open
90%
90%
V
CC
NEGATIVE
PULSE
t
, t
PLZ PZL
V
V
M
M
7.0V
All other
10%
10%
R
L
V
V
OUT
t
t
)
)
t
t )
IN
THL ( f
TLH ( r
PULSE
GENERATOR
D.U.T.
t
t
t
t )
TLH ( r
THL ( f
R
C
R
L
AMP (V)
Low V
T
L
90%
M
90%
POSITIVE
PULSE
V
V
M
Test circuit for 3–state outputs on D port
10%
10%
t
w
7.0V
V
CC
Input pulse definition
INPUT PULSE REQUIREMENTS
R
T
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
family
V
M
Low V
rep. rate
t
w
t
t
amplitude
TLH
THL
C
R
D
T
D port
3.0V
1.5V
1.5V
1MHz
500ns 2.5ns
500ns 4.0ns
2.5ns
4.0ns
0.0V
I/O port
2.0V
1MHz
1.0V
Test circuit for outputs on I/O port
DEFINITIONS:
R
C
R
C
R
=
=
=
=
=
Load resistor; see AC electrical characteristics for value.
Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.
Pull up resistor; see AC Electrical Characteristics for value.
L
L
U
D
T
Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.
Termination resistance should be equal to Z
of pulse generators.
OUT
SF00581
7
January 18, 1991
Philips Semiconductors
Product specification
Quad futurebus backplane transceiver
74F3893
PLCC20: plastic leaded chip carrier; 20 leads
SOT380-1
8
1991 Jan 18
Philips Semiconductors
Product specification
Quad futurebus backplane transceiver
74F3893
NOTES
9
1991 Jan 18
Philips Semiconductors
Product specification
Quad futurebus backplane transceiver
74F3893
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 10-98
9397-750-05206
Document order number:
Philips
Semiconductors
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