74F597 [NXP]
8-bit shift register with input storage registers; 8位的移位寄存器，输入存储寄存器
| 型号： | 74F597 |
| 厂家： | 
NXP |
| 描述： | 8-bit shift register with input storage registers |
| 文件： | 总12页 (文件大小：100K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F597
8-bit shift register with input storage
registers
Product specification
IC15 Data Handbook
1991 Sep 13
Philips
Semiconductors
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
FEATURES
PIN CONFIGURATION
• High impedance PNP base inputs for reduced loading
(20µA in High and Low states)
D1
D2
D3
D4
D5
1
2
3
4
5
16 V
CC
15 D0
14
• 8-bit parallel storage register
D
S
• 3-State output buffers
13 SHLD
12 STCP
11 SHCP
10 SHRST
• Shift register has asynchronous direct overriding reset
• Shift load SHLD is functional when SHCP is Low and locked out
D6
D7
6
7
8
when SHCP is High
• Guaranteed shift frequency DC to 105MHz
GND
9
Q
S
SF00366
DESCRIPTION
The 74F597 consists of an 8-bit storage register feeding a
parallel-in/serial-in, serial-out 8-bit shift register. The storage register
and shift register have separate positive edge triggered clocks. The
shift register has asynchronous reset and when SHCP is Low, it has
asynchronous load.
TYPICAL SUPPLY CURRENT
(TOTAL)
TYPE
TYPICAL f
MAX
74F597
135MHz
42mA
The shift register load function has been modified to load when both
SHLD and SHCP are Low. When SHCP is High the shift register
load operation is not performed. Data will be properly shifted on the
rising edge of SHCP when SHLD is High.
ORDERING INFORMATION
COMMERCIAL RANGE
= 5V ±10%,
V
CC
DESCRIPTION
PKG DWG #
T
amb
= 0°C to +70°C
16-pin plastic DIP
16-pin plastic SO
N74F597N
SOT38-4
N74F597D
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
LOAD VALUE
74F (U.L.)
HIGH/LOW
PINS
DESCRIPTION
HIGH/LOW
20µA/20µA
20µA/20µA
20µA/20µA
20µA/20µA
20µA/20µA
20µA/20µA
1.0mA/20mA
Ds
Serial data input
1.0/0.033
1.0/0.033
1.0/0.033
1.0/0.033
1.0/0.033
1.0/0.033
50/33
D0–D7
SHCP
STCP
SHLD
SHRST
Qs
Parallel data inputs
Shift register clock pulse input
Storage register clock pulse input
Shift register load input (active Low)
Shift register reset input (active Low)
Serial data output
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
2
1991 Sep 13
853–1556 03964
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
LOGIC SYMBOL
IEC/IEEE SYMBOL (IEEE/IEC)
SRG8
14 15
1
2
3
4
5
6
7
10
11
13
12
R
C3/ !
C2
Ds D0 D1 D2 D3 D4 D5 D6 D7
SHRST
10
C1
SHCP
STCP
11
12
14
15
1
3D
1D
2D
SHLD
13
Qs
14
2
3
4
V
GND
=
=
Pin 16
Pin 8
CC
5
SF01107
6
7
9
SF01108
FUNCTION TABLE
INPUTS
OPERATING MODES
STCP
SHCP
SHLD
SHRST
↑
↑
X
L
L
L
X
↑
X
L
X
H
H
L
Data loaded to storage registers
Data loaded from inputs to shift register
↑
L
Data transferred from storage registers to shift registers
X
X
X
↑
L
Invalid logic, state of shift register indeterminate when signals removed
H
H
X
L
Shift register cleared
H
H
Shift register clocked, Qn=Qn–1, Q0=Ds
Hold
H
H = High voltage level
L
X
↑
=
=
=
=
Low voltage level
Don’t care
Low-to-High clock transition
↑
Not a Low-to-High clock transition
3
1991 Sep 13
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
LOGIC DIAGRAM
10
SHRST
11
SHCP
13
SHLD
12
STCP
14
Ds
15
C2 2D
C2 2D
C2 2D
C2 2D
C2 2D
C2 2D
C2 2D
C2 2D
D0
D1
D2
D3
D4
D5
D6
D7
1D
S
R
C1
1
2
3
4
5
6
7
1D
S
R
C1
1D
S
R
C1
1D
S
R
C1
1D
S
R
C1
1D
S
R
C1
1D
S
R
C1
1D
S
R
9
C1
Qs
V
= Pin 16
CC
GND = Pin 8
SF01109
4
1991 Sep 13
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
Supply voltage
Input voltage
Input current
CC
IN
V
V
I
mA
V
IN
V
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
–0.5 to +V
40
OUT
OUT
CC
I
mA
°C
°C
T
amb
0 to +70
T
stg
–65 to +150
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
NOM
MAX
V
Supply voltage
5.0
5.5
V
V
CC
IH
IL
V
V
High-level input voltage
Low-level input voltage
Input clamp current
2.0
0.8
–18
–1
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
OH
OL
20
T
amb
Operating free-air temperature range
0
+70
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
NO TAG
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
TYP
MIN
MAX
NO TAG
V
V
V
= MIN,
= MAX,
= MIN
±10%V
2.5
2.7
V
V
CC
IL
CC
V
High-level output voltage
Low-level output voltage
I
= –1mA
OH
OH
±5%V
3.4
0.30
0.30
–0.73
IH
CC
±10%V
0.50
0.50
–1.2
100
20
V
V
CC
V
= MIN, V = MAX,
IL
CC
V
V
OL
V
= MIN, I = MAX
IH
OL
±5%V
CC
Input clamp voltage
V
CC
V
CC
V
CC
V
CC
V
CC
= MIN, I = I
IK
V
IK
I
I
I
I
I
Input current at maximum input voltage
High-level input current
= MAX, V = 7.0V
µA
µA
µA
mA
mA
mA
I
I
= MAX, V = 2.7V
IH
IL
I
Low-level input current
= MAX, V = 0.5V
–20
–150
65
I
NO TAG
Short-circuit output current
= MAX
–60
OS
I
43
41
CCH
I
Supply current (total)
V
CC
= MAX
CC
I
60
CCL
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
5
1991 Sep 13
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
AC ELECTRICAL CHARACTERISTICS
LIMITS
V
amb
= +5V
= +25°C
V
amb
= +5V ± 10%
= 0°C to +70°C
CC
CC
TEST
CONDITION
T
T
SYMBOL
PARAMETER
UNIT
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
Waveform
NO TAG
f
Maximum clock frequency
120
135
105
MHz
ns
MAX
t
t
Propagation delay
SHCP to Qs
Waveform
NO TAG
7.0
6.0
8.5
7.5
11.0
10.0
6.0
5.5
12.5
10.5
PLH
PHL
t
t
Propagation delay
SHLD to Qs
Waveform
NO TAG
8.0
6.0
9.5
7.5
12.0
10.0
7.0
5.5
13.5
11.0
PLH
PHL
ns
t
t
Propagation delay
STCP to Qs
Waveform
NO TAG
7.5
8.0
9.5
9.5
11.5
12.0
6.5
7.5
13.0
13.0
PLH
PHL
ns
Propagation delay
SHRST to Qs
Waveform
NO TAG
t
2.5
5.5
9.0
2.5
9.5
ns
PHL
AC SETUP REQUIREMENTS
LIMITS
V
amb
= +5V
= +25°C
V
amb
= +5V ± 10%
= 0°C to +70°C
CC
CC
TEST
CONDITION
T
T
SYMBOL
PARAMETER
UNIT
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
t (H)
t (L)
s
Setup time, High or Low
Dn to STCP
Waveform
NO TAG
1.0
1.5
1.5
2.0
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t (H)
Hold time, High or Low
Dn to STCP
Waveform
NO TAG
2.0
2.0
2.0
3.0
h
t (L)
h
t (H)
Setup time, High or Low
Ds to SHCP
Waveform
NO TAG
1.0
1.5
1.0
2.0
s
t (L)
s
t (H)
Hold time, High or Low
Ds to SHCP
Waveform
NO TAG
1.5
2.0
2.0
2.5
h
t (L)
h
Setup time, High
STCP to SHLD↑
t (H)
s
Waveform 4
8.5
0.0
6.0
9.0
0.0
6.5
Hold time, Low
STCP to SHLD↑ (hold mode)
Waveform
NO TAG
t (L)
h
Setup time, High
SHLD to SHCP↑
Waveform
NO TAG
t (H)
s
t (H)
SHCP Pulse width
High or Low
Waveform
NO TAG
4.5
4.5
5.5
4.5
W
t (L)
W
t (H)
STCP Pulse width
High or Low
Waveform
NO TAG
4.5
4.5
5.0
4.5
W
t (L)
W
Waveform
NO TAG
t (L)
W
SHRST Pulse width, Low
SHLD Pulse width, Low
4.5
4.5
2.0
4.5
4.5
2.5
Waveform
NO TAG
t (L)
W
Waveform
NO TAG
t
Recovery time, SHRST to SHCP
REC
6
1991 Sep 13
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
TYPICAL TIMING DIAGRAM
SHRST
SHLD
SHCP
STCP
Ds
Don’t care
D0
Don’t care
Don’t care
D1
D2
Don’t care
D3
Don’t care
Don’t care
D4
D5
Don’t care
Don’t care
D6
D7
Qs
SF01110
7
1991 Sep 13
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
AC WAVEFORMS
For all waveforms, V = 1.5V.
M
The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
MAX
STCP,
SHCP,
SHLD
SHRST
SHCP
Qs
V
V
t
M
M
V
t
V
t
M
M
SHRST
rec
t
(H)
t (L)
w
w
V
M
PHL
PLH
t
PHL
V
M
V
V
M
M
QS
SF01112
SF00371
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Widths, and Maximum Clock Frequency, Shift
Register Reset and Load Inputs to Serial Data Output
Waveform 2. Propagation Delay, Shift Register Reset and Load
Inputs to Serial Data Output, Shift Register Reset and Load
Inputs to Shift Register Clock Pulse Input Recovery Time
Dn, Ds
SHCP,
SHLD
V
V
V
V
STCP
V
V
M
M
M
M
M
M
t (H)
s
t (H)
h
t (L)
s
t (L)
h
t (H)
s
t (L)
h
SHCP,
STCP,
SHLD
V
V
SHLD,
SHCP
M
M
V
V
M
M
SF01113
SF01114
Waveform 3. Setup and Hold Times
Waveform 4. Setup and Hold Time
TEST CIRCUIT AND WAVEFORMS
t
AMP (V)
V
w
CC
90%
90%
NEGATIVE
PULSE
V
V
M
M
10%
10%
)
V
V
OUT
IN
0V
PULSE
GENERATOR
D.U.T.
t
t )
t
t
THL ( f
TLH ( r
R
C
R
L
t
t )
T
L
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
10%
10%
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
R
L
C
L
R
T
=
=
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
family
74F
V
rep. rate
t
w
t
t
THL
amplitude
M
TLH
Termination resistance should be equal to Z
pulse generators.
of
OUT
2.5ns 2.5ns
3.0V
1.5V
1MHz
500ns
SF00006
8
1991 Sep 13
Philips Semiconductors
Product specification
74F597
8-bit shift register with input storage registers
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
9
1991 Sep 13
Philips Semiconductors
Product specification
74F597
8-bit shift register with input storage registers
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
10
1991 Sep 13
Philips Semiconductors
Product specification
74F597
8-bit shift register with input storage registers
NOTES
11
1991 Sep 13
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 10-98
9397-750-05144
Document order number:
Philips
Semiconductors
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