74F64 [NXP]

4-2-3-2-input AND-OR-invert gate; 4-2-3-2 ,输入与或反向门
74F64
型号: 74F64
厂家: NXP    NXP
描述:

4-2-3-2-input AND-OR-invert gate
4-2-3-2 ,输入与或反向门

文件: 总8页 (文件大小:74K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
74F64  
4-2-3-2-input AND-OR-invert gate  
Product specification  
IC15 Data Handbook  
1996 Mar 14  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
4-2-3-2-input AND-OR-invert gate  
74F64  
PIN CONFIGURATION  
TYPICAL  
PROPAGATION  
DELAY  
TYPICAL  
SUPPLY CURRENT  
(TOTAL)  
TYPE  
Dc  
Da  
Db  
Dg  
Dh  
1
2
3
4
5
14  
V
CC  
74F64  
4.0ns  
2.5mA  
13 Dd  
12 De  
11 Df  
10 Dk  
ORDERING INFORMATION  
COMMERCIAL RANGE  
= 5V ±10%,  
V
DESCRIPTION  
PKG. DWG. #  
CC  
Di  
6
7
9
8
Dj  
Q
T
amb  
= 0°C to +70°C  
GND  
14-pin plastic DIP  
14-pin plastic SO  
N74F64N  
SOT27-1  
SF00094  
N74F64D  
SOT108-1  
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE  
PINS  
Dn  
DESCRIPTION  
74F (U.L.) HIGH/LOW  
LOAD VALUE HIGH/LOW  
20µA/0.6mA  
Data inputs  
Data output  
1.0/1.0  
50/33  
Q
1.0mA/20mA  
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.  
LOGIC SYMBOL  
IEC/IEEE SYMBOL  
2
3
&
&
1
2
3
1
13 12 11  
4
5
6
9
10  
1
13  
12  
11  
4
Da Db Dc Dd De Df Dg Dh Di Dj Dk  
8
&
&
Q
5
6
9
8
10  
V
= Pin 14  
CC  
GND = Pin 7  
SF00095  
SF00096  
2
1996 Mar 14  
853–0334 16574  
Philips Semiconductors  
Product specification  
4-2-3-2-input AND-OR-invert gate  
74F64  
LOGIC DIAGRAM  
2
Da  
3
Db  
1
Dc  
13  
Dd  
12  
De  
11  
Df  
8
Q
4
Dg  
5
Dh  
6
Di  
9
Dj  
10  
Dk  
V
= Pin 14  
CC  
GND = Pin 7  
SF00097  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Da  
H
Db  
H
Dc  
X
Dd  
X
De  
X
Df  
X
Dg  
X
Dh  
X
Di  
X
Dj  
X
Dk  
X
Q
L
X
X
H
H
H
H
X
X
X
X
X
X
L
X
X
X
X
X
H
H
H
X
X
X
L
X
X
X
X
X
X
X
X
H
H
L
All other combinations  
H
NOTES:  
1. H = High voltage level  
2. L = Low voltage level  
3. X = Don’t care  
ABSOLUTE MAXIMUM RATINGS  
(Operation beyond the limits set forth in this table may impair the useful life of the device.  
Unless otherwise noted these limits are over the operating free-air temperature range.)  
SYMBOL  
PARAMETER  
RATING  
–0.5 to +7.0  
–0.5 to +7.0  
–30 to +5  
UNIT  
V
V
Supply voltage  
Input voltage  
Input current  
CC  
IN  
V
V
I
mA  
V
IN  
V
Voltage applied to output in High output state  
Current applied to output in Low output state  
Operating free-air temperature range  
Storage temperature range  
–0.5 to V  
40  
OUT  
OUT  
CC  
I
mA  
°C  
°C  
T
amb  
0 to +70  
T
stg  
–65 to +150  
3
1996 Mar 14  
Philips Semiconductors  
Product specification  
4-2-3-2-input AND-OR-invert gate  
74F64  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
NOM  
5.0  
SYMBOL  
PARAMETER  
UNIT  
MIN  
4.5  
MAX  
V
Supply voltage  
5.5  
V
V
CC  
IH  
IL  
V
V
High-level input voltage  
Low-level input voltage  
Input clamp current  
2.0  
0.8  
–18  
–1  
V
I
I
I
mA  
mA  
mA  
°C  
IK  
High-level output current  
Low-level output current  
OH  
OL  
20  
T
amb  
Operating free-air temperature range  
0
+70  
DC ELECTRICAL CHARACTERISTICS  
(Over recommended operating free-air temperature range unless otherwise noted.)  
LIMITS  
1
SYMBOL  
PARAMETER  
TEST CONDITIONS  
= MIN, V = MAX  
UNIT  
2
MIN  
2.5  
TYP  
MAX  
V
V
V
V
V
±10%V  
V
V
V
V
V
CC  
IL  
CC  
V
OH  
High-level output voltage  
= MIN, I = MAX  
±5%V  
2.7  
3.4  
0.30  
0.30  
–0.73  
IH  
OH  
CC  
= MIN, V = MAX  
±10%V  
0.50  
0.50  
–1.2  
CC  
IL  
CC  
CC  
V
V
Low-level output voltage  
Input clamp voltage  
OL  
= MIN, I = MAX  
±5%V  
IH  
OL  
= MIN, I = I  
IK  
IK  
CC  
I
Input current at maximum input  
voltage  
I
I
V
CC  
= MAX, V = 7.0V  
100  
µA  
I
I
I
I
High-level input current  
Low-level input current  
V
V
V
= MAX, V = 2.7V  
20  
–0.6  
–150  
2.8  
µA  
mA  
mA  
mA  
mA  
IH  
CC  
CC  
CC  
I
= MAX, V = 0.5V  
IL  
I
3
Short-circuit output current  
= MAX  
–60  
OS  
I
V
= GND  
= 4.5V  
IN  
1.9  
3.1  
CCH  
IN  
I
Supply current (total)  
V
CC  
= MAX  
CC  
I
V
4.7  
CCL  
NOTES:  
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.  
2. All typical values are at V = 5V, T = 25°C.  
CC  
amb  
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold  
OS  
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting  
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any  
sequence of parameter tests, I tests should be performed last.  
OS  
4
1996 Mar 14  
Philips Semiconductors  
Product specification  
4-2-3-2-input AND-OR-invert gate  
74F64  
AC ELECTRICAL CHARACTERISTICS  
LIMITS  
V
= +5.0V  
= +25°C  
V
= +5.0V ± 10%  
= 0°C to +70°C  
CC  
CC  
TEST  
CONDITION  
SYMBOL  
PARAMETER  
T
amb  
T
amb  
UNIT  
C = 50pF, R = 500Ω  
C = 50pF, R = 500Ω  
L L  
L
L
MIN  
TYP  
MAX  
MIN  
MAX  
t
t
Propagation delay  
Dn to Q  
2.5  
2.0  
4.6  
3.2  
6.0  
4.5  
2.5  
2.0  
7.0  
5.5  
PLH  
PHL  
Waveform 1  
ns  
AC WAVEFORMS  
For all waveforms, V = 1.5V.  
M
Dn  
V
V
M
M
t
t
PHL  
PLH  
V
V
M
M
Q
SF00098  
Waveform 1. Propagation Delay for Inverting Outputs  
TEST CIRCUIT AND WAVEFORM  
t
w
AMP (V)  
V
CC  
90%  
90%  
NEGATIVE  
V
V
M
M
PULSE  
10%  
10%  
V
V
OUT  
IN  
0V  
PULSE  
GENERATOR  
D.U.T.  
t
t )  
t
t )  
THL ( f  
TLH ( r  
R
C
R
L
t
t )  
T
L
t
t )  
TLH ( r  
THL ( f  
AMP (V)  
0V  
90%  
M
90%  
POSITIVE  
PULSE  
V
V
M
10%  
10%  
Test Circuit for Totem-Pole Outputs  
DEFINITIONS:  
t
w
Input Pulse Definition  
INPUT PULSE REQUIREMENTS  
R
L
C
L
R
T
=
=
=
Load resistor;  
see AC ELECTRICAL CHARACTERISTICS for value.  
Load capacitance includes jig and probe capacitance;  
see AC ELECTRICAL CHARACTERISTICS for value.  
family  
V
rep. rate  
t
w
t
t
THL  
amplitude  
3.0V  
M
TLH  
Termination resistance should be equal to Z  
pulse generators.  
of  
OUT  
2.5ns 2.5ns  
74F  
1.5V  
1MHz  
500ns  
SF00006  
5
1996 Mar 14  
Philips Semiconductors  
Product specification  
4-2-3-2 Input AND-OR Invert Gate  
74F64  
DIP14: plastic dual in-line package; 14 leads (300 mil)  
SOT27-1  
6
1996 Mar 14  
Philips Semiconductors  
Product specification  
4-2-3-2 Input AND-OR Invert Gate  
74F64  
SO14: plastic small outline package; 14 leads; body width 3.9 mm  
SOT108-1  
7
1996 Mar 14  
Philips Semiconductors  
Product specification  
4-2-3-2-input AND-OR-invert gate  
74F64  
DEFINITIONS  
Data Sheet Identification  
Product Status  
Definition  
This data sheet contains the design target or goal specifications for product development. Specifications  
may change in any manner without notice.  
Objective Specification  
Formative or in Design  
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to make changes at any time without notice in order to improve design  
and supply the best possible product.  
Preliminary Specification  
Product Specification  
Preproduction Product  
Full Production  
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes  
at any time without notice, in order to improve design and supply the best possible product.  
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,  
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,  
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes  
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting  
or modification.  
LIFE SUPPORT APPLICATIONS  
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,  
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected  
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips  
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully  
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
Philips Semiconductors and Philips Electronics North America Corporation  
register eligible circuits under the Semiconductor Chip Protection Act.  
Copyright Philips Electronics North America Corporation 1996  
All rights reserved. Printed in U.S.A.  

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