74HC132 [NXP]
Quad 2-input NAND Schmitt trigger; 四2输入与非施密特触发器
| 型号： | 74HC132 |
| 厂家： | 
NXP |
| 描述： | Quad 2-input NAND Schmitt trigger |
| 文件： | 总8页 (文件大小：74K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT132
Quad 2-input NAND Schmitt trigger
September 1993
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74HC/HCT132
FEATURES
• Output capability: standard
• ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT132 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of
transforming slowly changing input signals into sharply defined, jitter-free output signals.
The gate switches at different points for positive and negative-going signals. The difference between the positive voltage
VT+ and the negative voltage VT− is defined as the hysteresis voltage VH.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PHL/ tPLH
PARAMETER
CONDITIONS
UNIT
HC
HCT
t
propagation delay nA, nB to nY
input capacitance
CL = 15 pF; VCC = 5 V 11
17
ns
CI
3.5
24
3.5
20
pF
pF
CPD
power dissipation capacitance per gate
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
September 1993
2
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74HC/HCT132
PIN DESCRIPTION
PIN NO.
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
SYMBOL
1A to 4A
1B to 4B
1Y to 4Y
GND
NAME AND FUNCTION
data inputs
data inputs
data outputs
ground (0 V)
14
VCC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
FUNCTION TABLE
INPUTS
OUTPUT
nY
nA
nB
L
L
L
H
L
H
H
H
L
H
H
H
Notes
1. H = HIGH voltage level
L = LOW voltage level
Fig.5 Logic diagram
(one Schmitt trigger).
Fig.4 Functional diagram.
APPLICATIONS
• Wave and pulse shapers
• Astable multivibrators
• Monostable multivibrators
September 1993
3
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74HC/HCT132
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Transfer characteristics are
given below.
Output capability: standard
ICC category: SSI
Transfer characteristics for 74HC
Voltages are referenced to GND (ground = 0 V)
Tamb (°C)
74HC
TEST CONDITIONS
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85
−40 to +125
min. typ. max. min. max. min. max.
VT+
VT−
VH
positive-going threshold 0.7
1.18 1.5
0.7
1.5
3.15
4.2
1.0
2.2
3.0
1.0
1.4
1.6
0.7
1.7
2.1
0.3
0.9
1.2
0.2
0.4
0.6
1.5
3.15
4.2
1.0
2.2
3.0
1.0
1.4
1.6
V
V
V
2.0 Figs 6 and 7
1.7
2.38 3.15 1.7
4.5
2.1
3.14 4.2
0.63 1.0
1.67 2.2
2.26 3.0
0.55 1.0
0.71 1.4
0.88 1.6
2.1
0.3
0.9
1.2
0.2
0.4
0.6
6.0
negative-going threshold 0.3
2.0 Figs 6 and 7
0.9
1.2
4.5
6.0
hysteresis (VT+ − VT−)
0.2
0.4
0.6
2.0 Figs 6 and 7
4.5
6.0
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
T
amb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 TO +85 −40 TO +125
min. typ. max. min. max. min. max.
t
PHL/ tPLH propagation delay
nA, nB to nY
36
13
10
19
7
125
25
21
75
15
13
155
31
26
95
19
16
190
38
ns
2.0
4.5
6.0
2.0
4.5
6.0
Fig.13
Fig.13
32
t
THL/ tTLH output transition time
110
22
ns
6
19
September 1993
4
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74HC/HCT132
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Transfer characteristics are
given below.
Output capability: standard
ICC category: SSI
Notes to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
nA, nB
0.3
Transfer characteristics for 74HCT
Voltages are referenced to GND (ground = 0 V)
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85
−40 to +125
min. typ. max. min. max. min. max.
VT+
VT−
VH
positive-going threshold 1.2
1.41 1.9
1.59 2.1
0.85 1.2
0.99 1.4
1.2
1.4
0.5
0.6
0.4
0.4
1.9
2.1
1.2
1.4
−
1.2
1.4
0.5
0.6
0.4
0.4
1.9
2.1
1.2
1.4
−
V
V
V
4.5 Figs 6 and 7
1.4
negative-going threshold 0.5
0.6
5.5
4.5 Figs 6 and 7
5.5
hysteresis (VT+ − VT−)
0.4
0.4
0.56
0.60
−
−
4.5 Figs 6 and 7
5.5
−
−
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
−40 to +85
min. typ. max. min. max. min. max.
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +125
t
PHL/ tPLH propagation delay
nA, nB to nY
20
7
33
15
41
19
50 ns
22 ns
4.5 Fig.13
4.5 Fig.13
tTHL/ tTLH output transition time
September 1993
5
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74HC/HCT132
TRANSFER CHARACTERISTIC WAVEFORMS
Fig.7 Waveforms showing the definition of VT+,
VT− and VH; where VT+ and VT− are between
limits of 20% and 70%.
Fig.6 Transfer characteristic.
Fig.8 Typical HC transfer characteristics;
VCC = 2 V.
Fig.9 Typical HC transfer characteristics;
V
CC = 4.5 V.
Fig.10 Typical HC transfer characteristics;
VCC = 6 V.
Fig.11 Typical HCT transfer characteristics;
VCC = 4.5 V.
September 1993
6
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74HC/HCT132
Fig.12 Typical HCT transfer characteristics; VCC = 5.5 V.
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.13 Waveforms showing the input (nA, nB) to output (nY) propagation delays and the output transition times.
September 1993
7
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt trigger
74HC/HCT132
Application information
The slow input rise and fall times cause additional power dissipation, this can be calculated using the following formula:
Pad = fi × (tr × ICCa + tf × ICCa) × VCC
.
Where:
Pad
fi
= additional power dissipation (µW)
= input frequency (MHz)
tr
tf
ICCa
= input rise time (ns); 10% − 90%
= input fall time (ns); 10% − 90%
= average additional supply current (µA)
Average ICCa differs with positive or negative input transitions, as shown in Figs 14 and 15.
Fig.14 Average ICC for HC Schmitt trigger devices;
linear change of Vi between 0.1 VCC to
Fig.15 Average ICC for HCT Schmitt trigger
devices; linear change of Vi between
0.1 VCC to 0.9 VCC
0.9 VCC
.
.
HC/HCT132 used in a relaxation oscillator circuit, see Fig.16.
1
T
1
HC:
f = --- ≈ -----------------
0.8RC
1
T
1
HCT:
f = --- ≈ ---------------------
0.67 RC
Fig.16 Relaxation oscillator using HC/HCT132.
Note to Application information
All values given are typical unless otherwise specified.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
September 1993
8
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