74HC283PW,118 [NXP]

74HC283PWSOT403-1;
74HC283PW,118
型号: 74HC283PW,118
厂家: NXP    NXP
描述:

74HC283PWSOT403-1

光电二极管 逻辑集成电路
文件: 总20页 (文件大小:112K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
74HC283  
4-bit binary full adder with fast carry  
Rev. 03 — 11 November 2004  
Product data sheet  
1. General description  
The 74HC283 is a high-speed Si-gate CMOS device and is pin compatible with low power  
Schottky TTL (LSTTL). The 74HC283 is specified in compliance with JEDEC  
standard no. 7A.  
The 74HC283 adds two 4-bit binary words (An plus Bn) plus the incoming carry (CIN).  
The binary sum appears on the sum outputs (S1 to S4) and the out-going carry (COUT)  
according to the equation:  
CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) =  
= S1 + 2S2 + 4S3 + 8S4 + 16COUT  
Where (+) = plus.  
Due to the symmetry of the binary add function, the 74HC283 can be used with either all  
active HIGH operands (positive logic) or all active LOW operands (negative logic). In case  
of all active LOW operands the results S1 to S4 and COUT should be interpreted also as  
active LOW. With active HIGH inputs, CIN must be held LOW when no carry in is  
intended. Interchanging inputs of equal weight does not affect the operation, thus CIN, A1,  
B1 can be assigned arbitrarily to pins 5, 6, 7, etc.  
See the 74HC583 for the BCD version.  
2. Features  
High-speed 4-bit binary addition  
Cascadable in 4-bit increments  
Fast internal look-ahead carry  
Low-power dissipation  
Complies with JEDEC standard no. 7A  
ESD protection:  
HBM EIA/JESD22-A114-B exceeds 2000 V  
MM EIA/JESD22-A115-A exceeds 200 V.  
Multiple package options  
Specified from 40 °C to +80 °C and from 40 °C to +125 °C.  
 
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
3. Quick reference data  
Table 1:  
Quick reference data  
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
tPHL, tPLH  
propagation delay  
CIN to S1  
CL = 15 pF; VCC = 5 V  
-
-
-
-
-
-
-
-
-
16  
18  
20  
23  
21  
20  
20  
3.5  
88  
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
pF  
pF  
CIN to S2  
CIN to S3  
CIN to S4  
An or Bn to Sn  
CIN to COUT  
An or Bn to COUT  
input capacitance  
CI  
[1]  
CPD  
power dissipation  
capacitance  
VI = GND to VCC  
[1] CPD is used to determine the dynamic power dissipation (PD in µW).  
PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
(CL × VCC2 × fo) = sum of outputs.  
4. Ordering information  
Table 2:  
Ordering information  
Type number  
Package  
Temperature range  
40 °C to +125 °C  
40 °C to +125 °C  
Name  
DIP16  
SO16  
Description  
Version  
74HC283N  
74HC283D  
plastic dual in-line package; 16 leads (300 mil) SOT38-4  
plastic small outline package; 16 leads;  
body width 3.9 mm  
SOT109-1  
74HC283DB  
74HC283PW  
40 °C to +125 °C  
40 °C to +125 °C  
SSOP16  
plastic shrink small outline package; 16 leads; SOT338-1  
body width 5.3 mm  
TSSOP16  
plastic thin shrink small outline package;  
16 leads; body width 4.4 mm  
SOT403-1  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
2 of 20  
 
 
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
5. Functional diagram  
9
COUT  
9
11 B4  
COUT  
11  
B4  
12 A4  
15 B3  
14 A3  
12  
A4  
S4 10  
S3 13  
15  
14  
2
10  
13  
1
S4  
S3  
S2  
S1  
B3  
A3  
B2  
A2  
B1  
A1  
2
3
6
5
B2  
A2  
B1  
A1  
S2  
S1  
1
4
3
4
6
5
CIN  
7
CIN  
7
001aab895  
001aab897  
Fig 1. Functional diagram  
Fig 2. Logic symbol  
5
3
0
P
14  
12  
4
0
1
3
0
S
13  
6
12  
15  
11  
10  
3
Q
3
7
9
CIN  
COUT  
001aab896  
Fig 3. IEC logic symbol  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
3 of 20  
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
CIN  
A1  
B1  
A2  
B2  
A3  
B3  
A4  
B4  
COUT  
S1  
S2  
S3  
S4  
001aab898  
Fig 4. Logic diagram  
6. Pinning information  
6.1 Pinning  
1
2
3
4
5
6
7
8
16  
V
S2  
B2  
CC  
15  
14  
13  
12  
11  
10  
9
B3  
A3  
S3  
A4  
B4  
S4  
A2  
S1  
283  
A1  
B1  
CIN  
GND  
COUT  
001aab894  
Fig 5. Pin configuration  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
4 of 20  
 
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
6.2 Pin description  
Table 3:  
Symbol  
S2  
Pin description  
Pin  
1
Description  
sum output 2  
B2  
2
B operand input 2  
A operand input 2  
sum output 1  
A2  
3
S1  
4
A1  
5
A operand input 1  
B operand input 1  
carry input  
B1  
6
CIN  
GND  
COUT  
S4  
7
8
ground (0 V)  
9
carry output  
10  
11  
12  
13  
14  
15  
16  
sum output 4  
B4  
B operand input 4  
A operand input 4  
sum output 3  
A4  
S3  
B3  
A operand input 3  
B operand input 3  
positive supply voltage  
A3  
VCC  
7. Functional description  
7.1 Function table  
Table 4:  
Pins  
Function table[1]  
Input  
Output  
CIN  
L
A4  
H
1
A3  
L
A2  
H
1
A1  
L
B4  
H
1
B3  
L
B2  
L
B1  
H
1
COUT  
S4  
L
S3  
L
S2  
H
1
S1  
H
1
Logic levels  
H
1
0
Active HIGH[2]  
Active LOW[3]  
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
1
0
0
[1] H = HIGH voltage level;  
L = LOW voltage level.  
[2] Example for active HIGH: 10 + 9 (0 + 1010 + 1001) = 19 (10011).  
[3] Example for active LOW: 5 + 6 (1 + 0101 + 0110) = 12 (01100).  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
5 of 20  
 
 
 
 
 
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
8. Limiting values  
Table 5:  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to  
GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
Max Unit  
VCC  
IIK  
supply voltage  
0.5 +7  
V
input diode current  
output diode current  
VI < 0.5 V or VI > VCC + 0.5 V  
-
-
±20  
mA  
mA  
IOK  
VO < 0.5 V or  
VO > VCC + 0.5 V  
±20  
±25  
±50  
IO  
output source or sink  
current  
VO = 0.5 V to VCC + 0.5 V  
-
mA  
ICC, IGND VCC or GND current  
-
mA  
Tstg  
Ptot  
storage temperature  
power dissipation  
DIP16 package  
65  
+150 °C  
[1]  
[2]  
-
-
750  
500  
mW  
SO16, SSOP16 and  
TSSOP16 packages  
mW  
[1] Above 70 °C: Ptot derates linearly with 12 mW/K.  
[2] Above 70 °C: Ptot derates linearly with 8 mW/K.  
9. Recommended operating conditions  
Table 6:  
Symbol  
VCC  
Recommended operating conditions  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
V
supply voltage  
input voltage  
output voltage  
2.0  
5.0  
6.0  
VI  
0
-
VCC  
VCC  
1000  
500  
400  
+125  
V
VO  
0
-
V
tr, tf  
input rise and fall times VCC = 2.0 V  
VCC = 4.5 V  
-
-
ns  
ns  
ns  
°C  
-
6.0  
VCC = 6.0 V  
-
-
-
Tamb  
ambient temperature  
40  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
6 of 20  
 
 
 
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
10. Static characteristics  
Table 7:  
Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol  
Tamb = 25 °C  
VIH  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
HIGH-level input voltage  
VCC = 2.0 V  
1.5  
1.2  
2.4  
3.2  
0.8  
2.1  
2.8  
-
V
V
V
V
V
V
VCC = 4.5 V  
3.15  
-
VCC = 6.0 V  
4.2  
-
VIL  
LOW-level input voltage  
HIGH-level output voltage  
VCC = 2.0 V  
-
-
-
0.5  
1.35  
1.8  
VCC = 4.5 V  
VCC = 6.0 V  
VOH  
VI = VIH or VIL  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
VI = VIH or VIL  
1.9  
2.0  
-
-
-
-
-
V
V
V
V
V
4.4  
4.5  
5.9  
6.0  
3.98  
5.48  
4.32  
5.81  
VOL  
LOW-level output voltage  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
VI = VCC or GND; VCC = 6.0 V  
VI = VCC or GND; IO = 0 A;  
-
-
-
-
-
-
-
0
0.1  
V
0
0.1  
V
0
0.1  
V
0.15  
0.26  
0.26  
±0.1  
8.0  
V
0.16  
V
ILI  
input leakage current  
-
-
µA  
µA  
ICC  
quiescent supply current  
VCC = 6.0 V  
CI  
input capacitance  
-
3.5  
-
pF  
Tamb = 40 °C to +85 °C  
VIH HIGH-level input voltage  
VCC = 2.0 V  
1.5  
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V  
3.15  
-
VCC = 6.0 V  
4.2  
-
VIL  
LOW-level input voltage  
HIGH-level output voltage  
VCC = 2.0 V  
-
-
-
0.5  
1.35  
1.8  
VCC = 4.5 V  
VCC = 6.0 V  
VOH  
VI = VIH or VIL  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
1.9  
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
4.4  
5.9  
3.84  
5.34  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
7 of 20  
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
Table 7:  
Static characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
VOL  
LOW-level output voltage  
VI = VIH or VIL  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
VI = VCC or GND; VCC = 6.0 V  
VI = VCC or GND; IO = 0 A;  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1  
V
0.1  
V
0.1  
V
0.33  
0.33  
±1.0  
80  
V
V
ILI  
input leakage current  
µA  
µA  
ICC  
quiescent supply current  
VCC = 6.0 V  
Tamb = 40 °C to +125 °C  
VIH HIGH-level input voltage  
VCC = 2.0 V  
1.5  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V  
3.15  
-
VCC = 6.0 V  
4.2  
-
VIL  
LOW-level input voltage  
HIGH-level output voltage  
VCC = 2.0 V  
-
-
-
0.5  
1.35  
1.8  
VCC = 4.5 V  
VCC = 6.0 V  
VOH  
VI = VIH or VIL  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
VI = VIH or VIL  
1.9  
4.4  
5.9  
3.7  
5.2  
-
-
-
-
-
V
V
V
V
V
VOL  
LOW-level output voltage  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
VI = VCC or GND; VCC = 6.0 V  
VI = VCC or GND; IO = 0 A;  
-
-
-
-
-
-
-
0.1  
0.1  
0.1  
0.4  
0.4  
±1.0  
160  
V
V
V
V
V
ILI  
input leakage current  
µA  
µA  
ICC  
quiescent supply current  
VCC = 6.0 V  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
8 of 20  
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
11. Dynamic characteristics  
Table 8:  
Dynamic characteristics  
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 7.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Tamb = 25 °C  
tPHL, tPLH propagation delay CIN to S1  
see Figure 6  
VCC = 2.0 V  
-
-
-
-
52  
19  
15  
16  
160  
32  
27  
-
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 5.0 V; CL = 15 pF  
see Figure 6  
propagation delay CIN to S2  
propagation delay CIN to S3  
propagation delay CIN to S4  
propagation delay An or Bn to Sn  
propagation delay CIN to COUT  
VCC = 2.0 V  
-
-
-
-
58  
21  
17  
18  
180  
36  
31  
-
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 5.0 V; CL = 15 pF  
see Figure 6  
VCC = 2.0 V  
-
-
-
-
63  
23  
18  
20  
195  
39  
33  
-
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 5.0 V; CL = 15 pF  
see Figure 6  
VCC = 2.0 V  
-
-
-
-
74  
27  
22  
23  
230  
46  
39  
-
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 5.0 V; CL = 15 pF  
see Figure 6  
VCC = 2.0 V  
-
-
-
-
69  
25  
20  
21  
210  
42  
36  
-
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 5.0 V; CL = 15 pF  
see Figure 6  
VCC = 2.0 V  
-
-
-
-
63  
23  
18  
20  
195  
39  
33  
-
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 5.0 V; CL = 15 pF  
see Figure 6  
propagation delay An or Bn to  
COUT  
VCC = 2.0 V  
-
-
-
-
63  
23  
18  
20  
195  
39  
33  
-
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 5.0 V; CL = 15 pF  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
9 of 20  
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
Table 8:  
Dynamic characteristics …continued  
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 7.  
Symbol  
Parameter  
Conditions  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
VI = GND to VCC  
Min  
Typ  
Max  
Unit  
tTHL, tTLH output transition time  
-
-
-
-
19  
7
75  
15  
13  
-
ns  
ns  
ns  
pF  
6
[1]  
CPD  
power dissipation capacitance  
88  
Tamb = 40 °C to +85 °C  
tPHL, tPLH propagation delay CIN to S1  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
-
-
-
-
-
-
200  
40  
ns  
ns  
ns  
34  
propagation delay CIN to S2  
propagation delay CIN to S3  
propagation delay CIN to S4  
propagation delay An or Bn to Sn  
propagation delay CIN to COUT  
-
-
-
-
-
-
225  
45  
ns  
ns  
ns  
38  
-
-
-
-
-
-
245  
49  
ns  
ns  
ns  
42  
-
-
-
-
-
-
290  
58  
ns  
ns  
ns  
49  
-
-
-
-
-
-
265  
53  
ns  
ns  
ns  
45  
-
-
-
-
-
-
245  
49  
ns  
ns  
ns  
42  
propagation delay An or Bn to  
COUT  
-
-
-
-
-
-
245  
49  
ns  
ns  
ns  
42  
tTHL, tTLH output transition time  
-
-
-
-
-
-
95  
19  
16  
ns  
ns  
ns  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
10 of 20  
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
Table 8:  
Dynamic characteristics …continued  
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 7.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Tamb = 40 °C to +125 °C  
tPHL, tPLH propagation delay CIN to S1  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
see Figure 6  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
-
-
-
-
-
-
240  
48  
ns  
ns  
ns  
41  
propagation delay CIN to S2  
propagation delay CIN to S3  
propagation delay CIN to S4  
propagation delay An or Bn to Sn  
propagation delay CIN to COUT  
-
-
-
-
-
-
270  
54  
ns  
ns  
ns  
46  
-
-
-
-
-
-
295  
59  
ns  
ns  
ns  
50  
-
-
-
-
-
-
345  
69  
ns  
ns  
ns  
59  
-
-
-
-
-
-
315  
63  
ns  
ns  
ns  
54  
-
-
-
-
-
-
295  
59  
ns  
ns  
ns  
50  
propagation delay An or Bn to  
COUT  
-
-
-
-
-
-
295  
59  
ns  
ns  
ns  
50  
tTHL, tTLH output transition time  
-
-
-
-
-
-
110  
22  
ns  
ns  
ns  
19  
[1] CPD is used to determine the dynamic power dissipation (PD in µW).  
PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
(CL × VCC2 × fo) sum of outputs.  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
11 of 20  
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
12. Waveforms  
CIN, An, Bn,  
input  
V
M
t
t
PLH  
PHL  
Sn, COUT,  
output  
V
M
t
t
THL  
TLH  
001aab899  
VM = 0.5 × VI.  
Fig 6. Waveforms showing the inputs (CIN, An and Bn) to the outputs (Sn and COUT)  
propagation delays and the output transition times  
V
CC  
V
V
O
I
PULSE  
GENERATOR  
D.U.T.  
C
L
R
T
mna101  
Test data is given in Table 9.  
Definitions for test circuit:  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = Load capacitance including jig and probe capacitance.  
Fig 7. Load circuitry for switching times  
Table 9:  
Supply  
VCC  
Test data  
Input  
VI  
Load  
CL  
tr, tf  
6 ns  
6 ns  
6 ns  
6 ns  
2.0 V  
VCC  
VCC  
VCC  
VCC  
50 pF  
50 pF  
50 pF  
15 pF  
4.5 V  
6.0 V  
5.0 V  
13. Application information  
Figure 8 shows a 3-bit adder using the 74HC283. Trying the operand inputs of the fourth  
adder (A4 and B4) LOW makes S4 dependent on, and equal to, the carry from the third  
adder.  
Figure 9, based on the same principle, shows a method of dividing the 74HC283 into a  
2-bit and 1-bit adder. The third stage adder (A3, B3 and S3) is used simply as means of  
transferring the carry into the fourth stage (via A3 and B3) and transferring the carry from  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
12 of 20  
 
 
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
the second stage on S3. As long as A3 and B3 are the same, HIGH or LOW, they do not  
influence S3. Similarly, when A3 and B3 are the same, the carry into the third stage does  
not influence the carry out of the third stage.  
L
C1  
COUT  
COUT  
B10  
A10  
C10  
B4  
A4  
B3  
A3  
B4  
A4  
B3  
A3  
B2  
A2  
B1  
A1  
C3  
S10  
C2  
S2  
S4  
S3  
S2  
S1  
S4  
S3  
S2  
S1  
B2  
A2  
B1  
A1  
B2  
A2  
B1  
A1  
S1  
CIN  
CIN  
CIN  
001aab900  
001aab901  
Fig 8. 3-bit adder  
Fig 9. 2-bit and 1-bit adder  
Figure 10 shows a method of implementing a 5-input encoder, where the inputs are  
equally weighted. The outputs S1, S2 and S3 produce a binary number equal to the  
number inputs (I1 to I5) that are HIGH.  
Figure 11 shows a method of implementing a 5-input majority gate. When three or more  
inputs (I1 to I5) are HIGH, the output M5 is HIGH.  
COUT  
COUT  
I5  
B4  
A4  
B3  
A3  
B2  
A2  
B1  
A1  
I5  
I4  
I3  
B4  
A4  
B3  
A3  
B2  
A2  
B1  
A1  
I4  
I3  
S4  
S4  
S3  
S2  
M5  
S3  
S2  
L
I2  
I1  
I2  
I1  
S1  
S1  
CIN  
CIN  
001aab902  
001aab903  
Fig 10. 5-input encoder  
Fig 11. 5-input majority gate  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
13 of 20  
 
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
14. Package outline  
DIP16: plastic dual in-line package; 16 leads (300 mil)  
SOT38-4  
D
M
E
A
2
A
A
1
L
c
e
w M  
Z
b
1
(e )  
1
b
b
2
16  
9
M
H
pin 1 index  
E
1
8
0
5
10 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
(1)  
A
A
A
2
(1)  
(1)  
Z
1
w
UNIT  
mm  
b
b
b
c
D
E
e
e
L
M
M
H
1
2
1
E
max.  
min.  
max.  
max.  
1.73  
1.30  
0.53  
0.38  
1.25  
0.85  
0.36  
0.23  
19.50  
18.55  
6.48  
6.20  
3.60  
3.05  
8.25  
7.80  
10.0  
8.3  
4.2  
0.51  
3.2  
2.54  
0.1  
7.62  
0.3  
0.254  
0.01  
0.76  
0.068 0.021 0.049 0.014  
0.051 0.015 0.033 0.009  
0.77  
0.73  
0.26  
0.24  
0.14  
0.12  
0.32  
0.31  
0.39  
0.33  
inches  
0.17  
0.02  
0.13  
0.03  
Note  
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
95-01-14  
03-02-13  
SOT38-4  
Fig 12. Package outline SOT38-4 (DIP16)  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
14 of 20  
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
SO16: plastic small outline package; 16 leads; body width 3.9 mm  
SOT109-1  
D
E
A
X
v
c
y
H
M
A
E
Z
16  
9
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
8
e
w
M
detail X  
b
p
0
2.5  
scale  
5 mm  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
10.0  
9.8  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.27  
0.05  
1.05  
0.041  
1.75  
0.25  
0.01  
0.25  
0.01  
0.25  
0.1  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.39  
0.014 0.0075 0.38  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.020  
0.028  
0.012  
inches  
0.069  
0.01 0.004  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT109-1  
076E07  
MS-012  
Fig 13. Package outline SOT109-1 (SO16)  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
15 of 20  
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm  
SOT338-1  
D
E
A
X
c
y
H
v
M
A
E
Z
9
16  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
8
1
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.  
8o  
0o  
0.21  
0.05  
1.80  
1.65  
0.38  
0.25  
0.20  
0.09  
6.4  
6.0  
5.4  
5.2  
7.9  
7.6  
1.03  
0.63  
0.9  
0.7  
1.00  
0.55  
mm  
2
0.25  
0.65  
1.25  
0.2  
0.13  
0.1  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT338-1  
MO-150  
Fig 14. Package outline SOT338-1 (SSOP16)  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
16 of 20  
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm  
SOT403-1  
D
E
A
X
c
y
H
v
M
A
E
Z
9
16  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
8
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.40  
0.06  
mm  
1.1  
0.65  
0.25  
1
0.2  
0.13  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT403-1  
MO-153  
Fig 15. Package outline SOT403-1 (TSSOP16)  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
17 of 20  
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
15. Revision history  
Table 10: Revision history  
Document ID  
Release  
date  
Data sheet status  
Change notice Doc. number  
Supersedes  
74HC283_3  
20041111 Product data sheet  
-
9397 750 13811 74HC_HCT283_CNV_2  
Modifications:  
The format of this data sheet has been redesigned to comply with the current presentation  
and information standard of Philips Semiconductors.  
Removed type number 74HCT283.  
Inserted family specification.  
74HC_HCT283_CNV_2 19970828 Product specification -  
-
-
74HC_HCT283_1  
-
74HC_HCT283_1  
19901201 Product specification -  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
18 of 20  
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
16. Data sheet status  
Level Data sheet status[1] Product status[2] [3]  
Definition  
I
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips  
Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Qualification  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
[3]  
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
17. Definitions  
18. Disclaimers  
Short-form specification The data in a short-form specification is  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes in the products - including circuits, standard cells, and/or  
software - described or contained herein in order to improve design and/or  
performance. When the product is in full production (status ‘Production’),  
relevant changes will be communicated via a Customer Product/Process  
Change Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
19. Contact information  
For additional information, please visit: http://www.semiconductors.philips.com  
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com  
9397 750 13811  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 03 — 11 November 2004  
19 of 20  
 
 
 
 
74HC283  
Philips Semiconductors  
4-bit binary full adder with fast carry  
20. Contents  
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5  
7
7.1  
8
Functional description . . . . . . . . . . . . . . . . . . . 5  
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Recommended operating conditions. . . . . . . . 6  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 7  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Application information. . . . . . . . . . . . . . . . . . 12  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 18  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 19  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Contact information . . . . . . . . . . . . . . . . . . . . 19  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
© Koninklijke Philips Electronics N.V. 2004  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner. The information presented in this document does  
not form part of any quotation or contract, is believed to be accurate and reliable and may  
be changed without notice. No liability will be accepted by the publisher for any  
consequence of its use. Publication thereof does not convey nor imply any license under  
patent- or other industrial or intellectual property rights.  
Date of release: 11 November 2004  
Document number: 9397 750 13811  
Published in The Netherlands  

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