74HC2G04GW-Q100 [NXP]
IC INVERT GATE, Gate;
| 型号： | 74HC2G04GW-Q100 |
| 厂家： | 
NXP |
| 描述： | IC INVERT GATE, Gate 栅 光电二极管 逻辑集成电路 |
| 文件： | 总15页 (文件大小：139K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC2G04-Q100; 74HCT2G04-Q100
Triple inverting Schmitt trigger
Rev. 1 — 19 May 2014
Product data sheet
1. General description
The 74HC2G04-Q100; 74HCT2G04-Q100 is a dual inverter. Inputs include clamp diodes
that enable the use of current limiting resistors to interface inputs to voltages in excess of
VCC
.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Wide supply voltage range from 2.0 V to 6.0 V
Complies with JEDEC standard no. 7A
High noise immunity
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Low power dissipation
Balanced propagation delays
Unlimited input rise and fall times
Multiple package options
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC2G04GW-Q100 40 C to +125 C
SC-88
plastic surface-mounted package; 6 leads
SOT363
74HCT2G04GW-Q100
74HC2G04GV-Q100
74HCT2G04GV-Q100
40 C to +125 C
SC-74
plastic surface-mounted package (TSOP6); 6 leads
SOT457
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
4. Marking
Table 2.
Marking
Type number
Marking code
74HC2G04GW-Q100
74HCT2G04GW-Q100
74HC2G04GV-Q100
74HCT2G04GV-Q100
H4
T4
H04
T04
5. Functional diagram
1
1
3
6
4
1Y
2Y
1
3
1A
2A
6
4
1
<
$
mnb080
mnb079
PQDꢀꢀꢁ
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram (one gate)
6. Pinning information
6.1 Pinning
ꢀꢁ+&ꢂ*ꢃꢁꢄ4ꢅꢃꢃ
ꢀꢁ+&7ꢂ*ꢃꢁꢄ4ꢅꢃꢃ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢀ$
*1'
ꢁ$
ꢀ<
9
&&
ꢁ<
DDDꢂꢁꢀꢁꢁꢁꢀ
Fig 4. Pin configuration
6.2 Pin description
Table 3.
Symbol
1A
Pin description
Pin
1
Description
data input
GND
2A
2
ground (0 V)
data input
3
2Y
4
data output
supply voltage
data output
VCC
5
1Y
6
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
2 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
7. Functional description
Table 4.
Function table[1]
Input
nA
L
Output
nY
H
H
L
[1] H = HIGH voltage level;
L = LOW voltage level.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max Unit
VCC
IIK
supply voltage
0.5 +7.0
V
[1]
[1]
[1]
[1]
[1]
input clamping current
output clamping current
output current
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
VO = 0.5 V to VCC + 0.5 V
-
20
20
25
+50
50
mA
mA
mA
mA
mA
IOK
IO
-
-
ICC
IGND
Tstg
Ptot
supply current
-
ground current
-
storage temperature
total power dissipation
65
+150 C
250 mW
[2]
-
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SC-88 and SC-74 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
9. Recommended operating conditions
Table 6.
Symbol
Recommended operating conditions
Parameter
Conditions
Min
Typ
Max
Unit
Type 74HC2G04-Q100
VCC
VI
supply voltage
2.0
0
5.0
6.0
V
input voltage
-
VCC
VCC
+125
V
VO
Tamb
tr
output voltage
ambient temperature
rise time
0
-
V
40
+25
C
except for Schmitt trigger inputs
VCC = 2.0 V
-
-
-
-
-
-
1000
500
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
400
tf
fall time
except for Schmitt trigger inputs
VCC = 2.0 V
-
-
-
-
-
-
1000
500
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
400
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
3 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
Table 6.
Symbol
Recommended operating conditions …continued
Parameter
Conditions
Min
Typ
Max
Unit
Type 74HCT2G04-Q100
VCC
VI
supply voltage
4.5
0
5.0
5.5
V
input voltage
-
VCC
VCC
+125
V
VO
Tamb
tr
output voltage
ambient temperature
rise time
0
-
V
40
+25
C
except for Schmitt trigger inputs
VCC = 4.5 V
-
-
-
-
500
500
ns
ns
tf
fall time
except for Schmitt trigger inputs
VCC = 4.5 V
10. Static characteristics
Table 7.
Static characteristics for 74HC2G04-Q100
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Tamb = 25 C
VIH
Parameter
Conditions
Min
Typ
Max
Unit
HIGH-level input voltage
VCC = 2.0 V
1.5
1.2
2.4
3.2
0.8
2.1
2.8
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
-
VCC = 6.0 V
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
VCC = 2.0 V
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
VCC = 6.0 V
VOH
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
VI = VIH or VIL
1.9
2.0
-
-
-
-
-
V
V
V
V
V
4.4
4.5
5.9
6.0
4.18
5.68
4.32
5.81
VOL
LOW-level output voltage
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
VI = GND or VCC; VCC = 6.0 V
-
-
-
-
-
-
-
0
0.1
V
0
0.1
V
0
0.1
V
0.15
0.26
0.26
0.1
1.0
V
0.16
V
II
input leakage current
supply current
-
-
A
A
ICC
VI = GND or VCC; IO = 0 A;
VCC = 6.0 V
CI
input capacitance
-
1.5
-
pF
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
4 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
Table 7.
Static characteristics for 74HC2G04-Q100 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Tamb = 40 C to +85 C
VIH HIGH-level input voltage
Parameter
Conditions
Min
Typ
Max
Unit
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
-
VCC = 6.0 V
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
VCC = 2.0 V
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
VCC = 6.0 V
VOH
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
VI = VIH or VIL
1.9
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
4.4
5.9
4.13
5.63
VOL
LOW-level output voltage
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
VI = GND or VCC; VCC = 6.0 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
V
0.1
V
0.1
V
0.33
0.33
1.0
10.0
V
V
II
input leakage current
supply current
A
A
ICC
VI = GND or VCC; IO = 0 A;
VCC = 6.0 V
Tamb = 40 C to +125 C
VIH HIGH-level input voltage
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
-
VCC = 6.0 V
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
VCC = 2.0 V
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
VCC = 6.0 V
VOH
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
5 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
Table 7.
Static characteristics for 74HC2G04-Q100 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
VI = GND or VCC; VCC = 6.0 V
VI = GND or VCC; IO = 0 A;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
V
0.1
V
0.1
V
0.4
V
0.4
V
II
input leakage current
supply current
1.0
20.0
A
A
ICC
VCC = 6.0 V
Table 8.
Static characteristics for 74HCT2G04-Q100
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Tamb = 25 C
VIH
Parameter
Conditions
Min
Typ
Max
Unit
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
VI = VIH or VIL
2.0
-
1.6
1.2
-
V
V
VIL
0.8
VOH
IO = 20 A; VCC = 4.5 V
IO = 4.0 mA; VCC = 4.5 V
VI = VIH or VIL
4.4
4.5
-
-
V
V
4.18
4.32
VOL
LOW-level output voltage
IO = 20 A; VCC = 4.5 V
IO = 4.0 mA; VCC = 4.5 V
VI = GND or VCC; VCC = 5.5 V
-
-
-
-
0
0.1
V
0.15
0.26
0.1
1.0
V
II
input leakage current
supply current
-
-
A
A
ICC
VI = GND or VCC; IO = 0 A;
VCC = 5.5 V
ICC
additional supply current
VI = VCC 2.1 V;
VCC = 4.5 V to 5.5 V; IO = 0 A
-
-
-
300
-
A
CI
input capacitance
1.5
pF
Tamb = 40 C to +85 C
VIH
VIL
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
VI = VIH or VIL
2.0
-
-
-
-
V
V
LOW-level input voltage
HIGH-level output voltage
0.8
VOH
IO = 20 A; VCC = 4.5 V
IO = 4.0 mA; VCC = 4.5 V
VI = VIH or VIL
4.4
-
-
-
-
V
V
4.13
VOL
LOW-level output voltage
IO = 20 A; VCC = 4.5 V
IO = 4.0 mA; VCC = 4.5 V
VI = GND or VCC; VCC = 5.5 V
-
-
-
-
-
-
-
-
0.1
V
0.33
1.0
10.0
V
II
input leakage current
supply current
A
A
ICC
VI = GND or VCC; IO = 0 A;
VCC = 5.5 V
ICC
additional supply current
VI = VCC 2.1 V;
VCC = 4.5 V to 5.5 V; IO = 0 A
-
-
375
A
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
6 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
Table 8.
Static characteristics for 74HCT2G04-Q100 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 40 C to +125 C
VIH
VIL
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
VI = VIH or VIL
2.0
-
-
-
-
V
V
LOW-level input voltage
HIGH-level output voltage
0.8
VOH
IO = 20 A; VCC = 4.5 V
IO = 4.0 mA; VCC = 4.5 V
VI = VIH or VIL
4.4
3.7
-
-
-
-
V
V
VOL
LOW-level output voltage
IO = 20 A; VCC = 4.5 V
IO = 4.0 mA; VCC = 4.5 V
VI = GND or VCC; VCC = 5.5 V
-
-
-
-
-
-
-
-
0.1
V
0.4
V
II
input leakage current
supply current
1.0
20.0
A
A
ICC
VI = GND or VCC; IO = 0 A;
VCC = 5.5 V
ICC
additional supply current
VI = VCC 2.1 V;
VCC = 4.5 V to 5.5 V; IO = 0 A
-
-
410
A
11. Dynamic characteristics
Table 9.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 6.
Symbol Parameter
Conditions
25 C
Typ Max
40 C to +125 C
Min Max Max
(85 C) (125 C)
Unit
Min
74HC2G04-Q100
[1]
[2]
[3]
tpd
propagation delay
nA to nY; see Figure 5
VCC = 2.0 V; CL = 50 pF
VCC = 4.5 V; CL = 50 pF
VCC = 6.0 V; CL = 50 pF
nY; see Figure 5
-
-
-
22
8
75
15
13
-
-
-
90
18
16
110
22
ns
ns
ns
6
20
tt
transition time
VCC = 2.0 V; CL = 50 pF
VCC = 4.5 V; CL = 50 pF
VCC = 6.0 V; CL = 50 pF
VI = GND to VCC
-
-
-
-
18
6
75
15
13
-
-
-
-
-
95
19
16
-
125
25
20
-
ns
ns
ns
pF
5
CPD
power dissipation
capacitance
9
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
7 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
Table 9.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 6.
Symbol Parameter
Conditions
25 C
40 C to +125 C
Unit
Min
Typ Max
Min
Max
Max
(85 C) (125 C)
74HCT2G04-Q100
[1]
[2]
[3]
tpd
propagation delay
nA to nY; see Figure 5
VCC = 4.5 V; CL = 50 pF
nY; see Figure 5
-
10
18
-
23
29
ns
tt
transition time
VCC = 4.5 V; CL = 50 pF
VI = GND to VCC 1.5 V
-
-
6
9
15
-
-
-
19
-
22
-
ns
CPD
power dissipation
capacitance
pF
[1] tpd is the same as tPLH and tPHL
[2] tt is the same as tTLH and tTHL
.
.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of the outputs.
12. Waveforms
9
,
9
0
9
0
Q$ꢈLQSXW
*1'
W
W
3+/
3/+
9
2+
ꢆꢇꢈꢉ
9
9
Q<ꢈRXWSXW
0
0
ꢀꢇꢈꢉ
9
2/
W
W
7/+
7+/
PQDꢃꢄꢄ
Measurement points are given in Table 10.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5. The data input (nA) to output (nY) propagation delays and output transition times
Table 10. Measurement points
Type
Input
VM
Output
VM
VI
tr = tf
74HC2G04-Q100
74HCT2G04-Q100
0.5VCC
1.3 V
GND to VCC
GND to 3.0 V
6.0 ns
6.0 ns
0.5VCC
1.3 V
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
8 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
9
9
&&
&&
9
9
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2
38/6(ꢈ
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RSHQ
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PJNꢅꢆꢇ
Test data is given in Table 11.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 6. Test circuit for measuring switching times
Table 11. Test data
Type
Input
Test
VI
tr, tf
6 ns
6 ns
tPHL, tPLH
open
74HC2G04-Q100
74HCT2G04-Q100
GND to VCC
GND to 3.0 V
open
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
9 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
13. Package outline
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74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
10 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
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Fig 8. Package outline SOT457 (SC-74)
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
11 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
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14. Abbreviations
Table 12. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
ESD
HBM
MM
15. Revision history
Table 13. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HC_HCT2G04_Q100 v.1
20140519
Product data sheet
-
-
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
12 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use in automotive applications — This NXP
16.2 Definitions
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
13 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74HC_HCT2G04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 19 May 2014
14 of 15
74HC2G04-Q100; 74HCT2G04-Q100
NXP Semiconductors
Triple inverting Schmitt trigger
18. Contents
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 1
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
7
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 3
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
8
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 14
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2014.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 May 2014
Document identifier: 74HC_HCT2G04_Q100
相关型号：
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