74HC2G17GW [NXP]

Dual non-inverting Schmitt trigger; 双非反相施密特触发器
74HC2G17GW
型号: 74HC2G17GW
厂家: NXP    NXP
描述:

Dual non-inverting Schmitt trigger
双非反相施密特触发器

触发器 逻辑集成电路 光电二极管
文件: 总18页 (文件大小:96K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
74HC2G17; 74HCT2G17  
Dual non-inverting Schmitt trigger  
Rev. 01 — 6 October 2006  
Product data sheet  
1. General description  
The 74HC2G17; 74HCT2G17 is a high-speed Si-gate CMOS device.  
The 74HC2G17; 74HCT2G17 provides two non-inverting Schmitt trigger buffers. They are  
capable of transforming slowly changing input signals into sharply defined, jitter-free  
output signals.  
The inputs switch at different points for positive and negative-going signals. The difference  
between the positive voltage VT+ and the negative voltage VTis defined as the input  
hysteresis voltage VH.  
2. Features  
I Wide supply voltage range from 2.0 V to 6.0 V  
I Complies with JEDEC standard no. 7A  
I High noise immunity  
I ESD protection:  
N HBM JESD22-A114-D exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
I Low power dissipation  
I Balanced propagation delays  
I Unlimited input rise and fall times  
I Multiple package options  
I Specified from 40 °C to +85 °C and 40 °C to +125 °C  
3. Applications  
I Wave and pulse shaper for highly noisy environments  
I Astable multivibrators  
I Monostable multivibrators  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
4. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
SOT363  
SOT457  
SOT363  
SOT457  
74HC2G17GW  
74HC2G17GV  
74HCT2G17GW  
74HCT2G17GV  
40 °C to +125 °C  
40 °C to +125 °C  
40 °C to +125 °C  
40 °C to +125 °C  
SC-88  
SC-74  
SC-88  
SC-74  
plastic surface-mounted package; 6 leads  
plastic surface-mounted package (TSOP6); 6 leads  
plastic surface-mounted package; 6 leads  
plastic surface-mounted package (TSOP6); 6 leads  
5. Marking  
Table 2.  
Marking  
Type number  
74HC2G17GW  
74HC2G17GV  
74HCT2G17GW  
74HCT2G17GV  
Marking code  
HV  
HV  
TV  
TV  
6. Functional diagram  
1
3
6
4
1
3
1A  
2A  
1Y  
2Y  
6
4
mnb067  
mnb066  
Fig 1. Logic symbol  
Fig 2. IEC logic symbol  
1A  
1Y  
2A  
2Y  
mnb068  
Fig 3. Logic diagram  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
2 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
7. Pinning information  
7.1 Pinning  
74HC2G17  
74HCT2G17  
1
2
3
6
5
4
1A  
GND  
2A  
1Y  
V
CC  
2Y  
001aaf201  
Fig 4. Pin configuration  
7.2 Pin description  
Table 3.  
Symbol  
1A  
Pin description  
Pin  
1
Description  
data input  
GND  
2A  
2
ground (0 V)  
data input  
3
2Y  
4
data output  
supply voltage  
data output  
VCC  
5
1Y  
6
8. Functional description  
Table 4.  
Function table[1]  
Input  
nA  
L
Output  
nY  
L
H
H
[1] H = HIGH voltage level;  
L = LOW voltage level.  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
3 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
9. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
Max Unit  
VCC  
IIK  
supply voltage  
0.5 +7.0  
V
[1]  
[1]  
[1]  
[1]  
[1]  
input clamping current  
output clamping current  
output current  
VI < 0.5 V or VI > VCC + 0.5 V  
VO < 0.5 V or VO > VCC + 0.5 V  
VO = 0.5 V to VCC + 0.5 V  
-
±20  
±20  
±25  
50  
mA  
mA  
mA  
mA  
mA  
IOK  
IO  
-
-
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
ground current  
-
50  
storage temperature  
total power dissipation  
65  
+150 °C  
250 mW  
[2]  
-
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For SC-88 and SC-74 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.  
10. Recommended operating conditions  
Table 6.  
Symbol  
Recommended operating conditions  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Type 74HC2G17  
VCC  
VI  
supply voltage  
2.0  
0
5.0  
6.0  
V
input voltage  
-
VCC  
VCC  
+125  
V
VO  
output voltage  
0
-
V
Tamb  
ambient temperature  
40  
+25  
°C  
Type 74HCT2G17  
VCC  
VI  
supply voltage  
4.5  
0
5.0  
5.5  
V
input voltage  
-
VCC  
VCC  
+125  
V
VO  
output voltage  
0
-
V
Tamb  
ambient temperature  
40  
+25  
°C  
11. Static characteristics  
Table 7.  
Static characteristics for 74HC2G17  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol  
Tamb = 25 °C  
VOH  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
HIGH-level output voltage  
VI = VIH or VIL  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4.0 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
1.9  
4.4  
5.9  
2.0  
-
-
-
-
-
V
V
V
V
V
4.5  
6.0  
4.18  
5.68  
4.32  
5.81  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
4 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
Table 7.  
Static characteristics for 74HC2G17 …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
VOL  
LOW-level output voltage  
VI = VIH or VIL  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4.0 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
VI = GND or VCC; VCC = 6.0 V  
VI = GND or VCC; IO = 0 A;  
-
-
-
-
-
-
-
0
0.1  
V
0
0.1  
V
0
0.1  
V
0.15  
0.26  
0.26  
±0.1  
1.0  
V
0.16  
V
II  
input leakage current  
supply current  
-
-
µA  
µA  
ICC  
VCC = 6.0 V  
CI  
input capacitance  
-
2.0  
-
pF  
Tamb = 40 °C to +85 °C  
VOH HIGH-level output voltage  
VI = VIH or VIL  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4.0 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
VI = VIH or VIL  
1.9  
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
4.4  
5.9  
4.13  
5.63  
VOL  
LOW-level output voltage  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4.0 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
VI = GND or VCC; VCC = 6.0 V  
VI = GND or VCC; IO = 0 A;  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1  
V
0.1  
V
0.1  
V
0.33  
0.33  
±1.0  
10.0  
V
V
II  
input leakage current  
supply current  
µA  
µA  
ICC  
VCC = 6.0 V  
Tamb = 40 °C to +125 °C  
VOH  
HIGH-level output voltage  
VI = VIH or VIL  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4.0 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
1.9  
4.4  
5.9  
3.7  
5.2  
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
5 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
Table 7.  
Static characteristics for 74HC2G17 …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
VOL  
LOW-level output voltage  
VI = VIH or VIL  
IO = 20 µA; VCC = 2.0 V  
IO = 20 µA; VCC = 4.5 V  
IO = 20 µA; VCC = 6.0 V  
IO = 4.0 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
VI = GND or VCC; VCC = 6.0 V  
VI = GND or VCC; IO = 0 A;  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1  
V
0.1  
V
0.1  
V
0.4  
V
0.4  
V
II  
input leakage current  
supply current  
±1.0  
20.0  
µA  
µA  
ICC  
VCC = 6.0 V  
Table 8.  
Static characteristics for 74HCT2G17  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol  
Tamb = 25 °C  
VOH  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
HIGH-level output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 20 µA  
4.4  
4.5  
-
-
V
V
IO = 4.0 mA  
4.18  
4.32  
VOL  
LOW-level output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 20 µA  
-
-
-
-
0
0.1  
V
IO = 4.0 mA  
0.15  
0.26  
±0.1  
1.0  
V
II  
input leakage current  
supply current  
VI = GND or VCC; VCC = 5.5 V  
-
-
µA  
µA  
ICC  
VI = GND or VCC; IO = 0 A;  
V
CC = 5.5 V  
VI = VCC 2.1 V;  
CC = 4.5 V to 5.5 V; IO = 0 A  
ICC  
additional supply current  
input capacitance  
-
-
-
300  
-
µA  
V
CI  
2.0  
pF  
Tamb = 40 °C to +85 °C  
VOH HIGH-level output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 20 µA  
4.4  
-
-
-
-
V
V
IO = 4.0 mA  
4.13  
VOL  
LOW-level output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 20 µA  
-
-
-
-
-
-
-
-
0.1  
V
IO = 4.0 mA  
0.33  
±1.0  
10.0  
V
II  
input leakage current  
supply current  
VI = GND or VCC; VCC = 5.5 V  
µA  
µA  
ICC  
VI = GND or VCC; IO = 0 A;  
VCC = 5.5 V  
ICC  
additional supply current  
VI = VCC 2.1 V;  
-
-
375  
µA  
VCC = 4.5 V to 5.5 V; IO = 0 A  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
6 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
Table 8.  
Static characteristics for 74HCT2G17 …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol  
Tamb = 40 °C to +125 °C  
VOH HIGH-level output voltage  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
VI = VIH or VIL; VCC = 4.5 V  
IO = 20 µA  
4.4  
3.7  
-
-
-
-
V
V
IO = 4.0 mA  
VOL  
LOW-level output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 20 µA  
-
-
-
-
-
-
-
-
0.1  
V
IO = 4.0 mA  
0.4  
V
II  
input leakage current  
supply current  
VI = GND or VCC; VCC = 5.5 V  
±1.0  
20.0  
µA  
µA  
ICC  
VI = GND or VCC; IO = 0 A;  
V
CC = 5.5 V  
VI = VCC 2.1 V;  
CC = 4.5 V to 5.5 V; IO = 0 A  
ICC  
additional supply current  
-
-
410  
µA  
V
12. Dynamic characteristics  
Table 9.  
Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.  
Symbol Parameter  
Conditions  
25 °C  
Typ Max  
40 °C to +125 °C  
Unit  
Min  
Min  
Max  
Max  
(85 °C) (125 °C)  
74HC2G17  
[1]  
[2]  
[3]  
tpd  
propagation delay  
nA to nY; see Figure 5  
VCC = 2.0 V; CL = 50 pF  
VCC = 4.5 V; CL = 50 pF  
VCC = 6.0 V; CL = 50 pF  
nY; see Figure 5  
-
-
-
36  
12  
10  
115  
22  
-
-
-
140  
27  
175  
34  
ns  
ns  
ns  
18  
22  
28  
tt  
transition time  
VCC = 2.0 V; CL = 50 pF  
VCC = 4.5 V; CL = 50 pF  
VCC = 6.0 V; CL = 50 pF  
VI = GND to VCC  
-
-
-
-
20  
7
75  
15  
13  
-
-
-
-
-
95  
19  
16  
-
110  
22  
19  
-
ns  
ns  
ns  
pF  
5
CPD  
power dissipation  
capacitance  
10  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
7 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
Table 9.  
Dynamic characteristics …continued  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +125 °C  
Unit  
Min  
Typ Max  
Min  
Max  
Max  
(85 °C) (125 °C)  
74HCT2G17  
[1]  
[2]  
[3]  
tpd  
propagation delay  
nA to nY; see Figure 5  
VCC = 4.5 V; CL = 50 pF  
nY; see Figure 5  
-
21  
29  
-
36  
45  
ns  
tt  
transition time  
VCC = 4.5 V; CL = 50 pF  
VI = GND to VCC 1.5 V  
-
-
6
15  
-
-
-
19  
-
22  
-
ns  
CPD  
power dissipation  
capacitance  
10  
pF  
[1] tpd is the same as tPLH and tPHL  
[2] tt is the same as tTLH and tTHL  
[3] CPD is used to determine the dynamic power dissipation (PD in µW).  
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
Σ(CL × VCC2 × fo) = sum of the outputs.  
13. Waveforms  
V
I
nA input  
GND  
V
V
M
M
t
t
PLH  
PHL  
V
OH  
90 %  
90 %  
nY output  
10 %  
10 %  
V
OL  
t
t
TLH  
THL  
001aaf302  
Measurement points are given in Table 10.  
VOL and VOH are typical voltage output drop that occur with the output load.  
Fig 5. The data input (nA) to output (nY) propagation delays and output transition times  
Table 10. Measurement points  
Type  
Input  
VM  
Output  
VM  
VI  
tr = tf  
74HC2G17  
0.5VCC  
1.3 V  
GND to VCC  
GND to 3.0 V  
6.0 ns  
6.0 ns  
0.5VCC  
1.3 V  
74HCT2G17  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
8 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
V
V
CC  
CC  
V
V
R
= 1 k  
I
O
L
PULSE  
GENERATOR  
open  
D.U.T  
R
C
50 pF  
T
L
mgk563  
Test data is given in Table 11.  
Definitions test circuit:  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
Fig 6. Load circuitry for switching times  
Table 11. Test data  
Type  
Input  
Test  
VI  
tr, tf  
6 ns  
6 ns  
tPHL, tPLH  
open  
74HC2G17  
GND to VCC  
GND to 3.0 V  
74HCT2G17  
open  
14. Transfer characteristics  
Table 12. Transfer characteristics  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +125 °C  
Unit  
Min  
Typ Max  
Min  
Max  
Max  
(85 °C) (125 °C)  
74HC2G17  
VT+  
VT  
VH  
positive-going  
threshold voltage  
see Figure 7, Figure 8  
VCC = 2.0 V  
1.00 1.18 1.50 1.00  
2.30 2.60 3.15 2.30  
3.00 3.46 4.20 3.00  
1.50  
3.15  
4.20  
1.50  
3.15  
4.20  
V
V
V
VCC = 4.5 V  
VCC = 6.0 V  
negative-going  
threshold voltage  
see Figure 7, Figure 8  
VCC = 2.0 V  
0.30 0.60 0.90 0.30  
1.13 1.47 2.00 1.13  
1.50 2.06 2.60 1.50  
0.90  
2.00  
2.60  
0.90  
2.00  
2.60  
V
V
V
VCC = 4.5 V  
VCC = 6.0 V  
hysteresis voltage  
VT+ VT; see Figure 7,  
Figure 8 and Figure 9  
VCC = 2.0 V  
0.30 0.60 1.00 0.30  
0.60 1.13 1.40 0.60  
0.80 1.40 1.70 0.80  
1.00  
1.40  
1.70  
1.00  
1.40  
1.70  
V
V
V
VCC = 4.5 V  
VCC = 6.0 V  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
9 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
Table 12. Transfer characteristics …continued  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +125 °C  
Unit  
Min  
Typ Max  
Min  
Max  
Max  
(85 °C) (125 °C)  
74HCT2G17  
VT+  
VT−  
VH  
positive-going  
threshold voltage  
see Figure 7 and Figure 8  
VCC = 4.5 V  
1.20 1.58 1.90 1.20  
1.40 1.78 2.10 1.40  
1.90  
2.10  
1.90  
2.10  
V
V
VCC = 5.5 V  
negative-going  
threshold voltage  
see Figure 7 and Figure 8  
VCC = 4.5 V  
0.50 0.87 1.20 0.50  
0.60 1.11 1.40 0.60  
1.20  
1.40  
1.20  
1.40  
V
V
VCC = 5.5 V  
hysteresis voltage  
VT+ VT; see Figure 7,  
Figure 8 and Figure 10  
VCC = 4.5 V  
0.40 0.71  
0.40 0.67  
-
-
0.40  
0.40  
-
-
-
-
V
V
VCC = 5.5 V  
15. Waveforms transfer characteristics  
V
T+  
V
O
V
I
V
H
V
T  
V
O
V
I
mnb155  
V
H
V
V
T+  
T−  
mnb154  
VT+ and VT- limits at 70 % and 20 %.  
Fig 7. Transfer characteristic  
Fig 8. Definition of VT+, VT- and VH  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
10 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
mna029  
mna028  
1.0  
100  
I
CC  
(mA)  
I
CC  
(µA)  
0.8  
0.6  
0.4  
0.2  
0
50  
0
0
2.5  
5.0  
0
1.0  
2.0  
V (V)  
I
V (V)  
I
a. VCC = 2.0 V  
b. VCC = 4.5 V  
mna030  
1.6  
I
CC  
(mA)  
0.8  
0
0
3.0  
6.0  
V (V)  
I
c.  
VCC = 6.0 V  
Fig 9. Typical 74HC2G17 transfer characteristics  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
11 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
mna031  
mna032  
2.0  
3.0  
I
CC  
I
CC  
(mA)  
(mA)  
2.0  
1.0  
1.0  
0
0
0
2.5  
5.0  
0
3.0  
6.0  
V (V)  
I
V (V)  
I
a. VCC = 4.5 V.  
b. VCC = 5.5 V.  
Fig 10. Typical 74HCT2G17 transfer characteristics  
16. Application information  
The slow input rise and fall times cause additional power dissipation, this can be  
calculated using the following formula:  
Padd = fi × (tr × ∆ICC(AV) + tf × ∆ICC(AV)) × VCC where:  
Padd = additional power dissipation (µW);  
fi = input frequency (MHz);  
tr = input rise time (ns); 10 % to 90 %;  
tf = input fall time (ns); 90 % to 10 %;  
ICC(AV) = average additional supply current (µA).  
ICC(AV) differs with positive or negative input transitions, as shown in Figure 11 and  
Figure 12.  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
12 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
mna036  
200  
I  
CC(AV)  
(mA)  
150  
100  
50  
positive-going  
edge  
negative-going  
edge  
0
0
2.0  
4.0  
6.0  
V
(V)  
CC  
Fig 11. ICC(AV) as a function of VCC for 74HC2G17; linear change of VI between 0.1VCC to 0.9VCC  
mna058  
200  
I  
CC(AV)  
(µA)  
150  
100  
50  
positive-going  
edge  
negative-going  
edge  
0
0
2
4
6
V
(V)  
CC  
Fig 12. ICC(AV) as a function of VCC for 74HCT2G17; linear change of VI between 0.1VCC to 0.9VCC  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
13 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
17. Package outline  
Plastic surface-mounted package; 6 leads  
SOT363  
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1  
index  
A
A
1
1
2
3
c
e
1
b
p
L
p
w
M B  
e
detail X  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
1
UNIT  
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max  
0.30  
0.20  
1.1  
0.8  
0.25  
0.10  
2.2  
1.8  
1.35  
1.15  
2.2  
2.0  
0.45  
0.15  
0.25  
0.15  
mm  
0.1  
1.3  
0.65  
0.2  
0.2  
0.1  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
04-11-08  
06-03-16  
SOT363  
SC-88  
Fig 13. Package outline SOT363 (SC-88)  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
14 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
Plastic surface-mounted package (TSOP6); 6 leads  
SOT457  
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1  
index  
A
A
1
c
1
2
3
L
p
e
b
p
w
M B  
detail X  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
UNIT  
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.1  
0.013  
0.40  
0.25  
1.1  
0.9  
0.26  
0.10  
3.1  
2.7  
1.7  
1.3  
3.0  
2.5  
0.6  
0.2  
0.33  
0.23  
mm  
0.95  
0.2  
0.2  
0.1  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
05-11-07  
06-03-16  
SOT457  
SC-74  
Fig 14. Package outline SOT457 (SC-74)  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
15 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
18. Abbreviations  
Table 13. Abbreviations  
Acronym  
CMOS  
ESD  
Description  
Complementary Metal Oxide Semiconductor  
ElectroStatic Discharge  
Human Body Model  
HBM  
MM  
Machine Model  
DUT  
Device Under Test  
19. Revision history  
Table 14. Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
74HC_HCT2G17_1 20061006  
Product data sheet  
-
-
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
16 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
20. Legal information  
20.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
malfunction of a NXP Semiconductors product can reasonably be expected to  
20.2 Definitions  
result in personal injury, death or severe property or environmental damage.  
NXP Semiconductors accepts no liability for inclusion and/or use of NXP  
Semiconductors products in such equipment or applications and therefore  
such inclusion and/or use is at the customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
20.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
20.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
21. Contact information  
For additional information, please visit: http://www.nxp.com  
For sales office addresses, send an email to: salesaddresses@nxp.com  
74HC_HCT2G17_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 6 October 2006  
17 of 18  
74HC2G17; 74HCT2G17  
NXP Semiconductors  
Dual non-inverting Schmitt trigger  
22. Contents  
1
2
3
4
5
6
General description . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
7
7.1  
7.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
8
Functional description . . . . . . . . . . . . . . . . . . . 3  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Recommended operating conditions. . . . . . . . 4  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Transfer characteristics. . . . . . . . . . . . . . . . . . . 9  
Waveforms transfer characteristics. . . . . . . . 10  
Application information. . . . . . . . . . . . . . . . . . 12  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 17  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
20.1  
20.2  
20.3  
20.4  
21  
22  
Contact information. . . . . . . . . . . . . . . . . . . . . 17  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2006.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 6 October 2006  
Document identifier: 74HC_HCT2G17_1  

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