74HC366 [NXP]
Hex buffer/line driver; 3-state; inverting; 六角缓冲器/线路驱动器;三态;反相
| 型号： | 74HC366 |
| 厂家： | 
NXP |
| 描述： | Hex buffer/line driver; 3-state; inverting |
| 文件： | 总7页 (文件大小：50K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT366
Hex buffer/line driver; 3-state;
inverting
December 1990
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT366
The 74HC/HCT366 are hex inverting buffer/line drivers
with 3-state outputs. The 3-state outputs (nY) are
controlled by the output enable inputs (OE1, OE2).
FEATURES
• Inverting outputs
• Output capability: bus driver
• ICC category: MSI
A HIGH on OEn causes the outputs to assume a high
impedance OFF-state.
The ”366” is identical to the “365” but has inverting outputs.
GENERAL DESCRIPTION
The 74HC/HCT366 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PARAMETER
propagation delay
CONDITIONS
UNIT
ns
HC
HCT
11
tPHL/ tPLH
CL = 15 pF; VCC = 5 V
10
nA to nY
CI
input capacitance
3.5
30
3.5
30
pF
pF
CPD
power dissipation capacitance per buffer
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT366
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1, 15
OE1, OE2
1A to 6A
1Y to 6Y
GND
output enable inputs (active LOW)
data inputs
2, 4, 6, 10, 12, 14
3, 5, 7, 9, 11, 13
data outputs
8
ground (0 V)
16
VCC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT366
FUNCTION TABLE
INPUTS
OUTPUT
nY
OE1
OE2
nA
L
L
X
H
L
L
H
X
L
H
X
X
H
L
Z
Z
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
Fig.4 Functional diagram.
Fig.5 Logic diagram.
December 1990
4
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT366
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
nA to nY
33
12
10
100
20
17
125
25
21
150
30
26
ns
ns
ns
ns
2.0 Fig.6
4.5
6.0
t
t
t
PZH/ tPZL 3-state output enable time
OEn to nY
44
16
13
150
30
26
190
38
33
225
45
38
2.0 Fig.7
4.5
6.0
PHZ/ tPLZ 3-state output disable time
OEn to nY
55
20
16
150
30
26
190
38
33
225
45
38
2.0 Fig.7
4.5
6.0
THL/ tTLH output transition time
14
5
4
60
12
10
75
15
13
90
18
15
2.0 Fig.6
4.5
6.0
December 1990
5
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT366
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
OE1
OE2
nA
1.00
0.90
1.00
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
nA to nY
13
16
20
5
24
35
35
12
30
44
44
15
36
53
53
18
ns
ns
ns
ns
4.5 Fig.6
4.5 Fig.7
4.5 Fig.7
4.5 Fig.6
t
t
t
PZH/ tPZL 3-state output enable time
OEn to nY
PHZ/ tPLZ 3-state output disable time
OEn to nY
THL/ tTLH output transition time
December 1990
6
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT366
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.6 Waveforms showing the input (nA) to output (nY) propagation delays and the output transition times.
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7 Waveforms showing the 3-state enable and disable times.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
7
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