74HC4066DB,112 [NXP]
74HC(T)4066 - Quad single-pole single-throw analog switch SSOP1 14-Pin;
| 型号： | 74HC4066DB,112 |
| 厂家： | 
NXP |
| 描述： | 74HC(T)4066 - Quad single-pole single-throw analog switch SSOP1 14-Pin 光电二极管 输出元件 |
| 文件： | 总25页 (文件大小：453K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC4066; 74HCT4066
Quad single-pole single-throw analog switch
Rev. 7 — 2 April 2013
Product data sheet
1. General description
The 74HC4066; 74HCT4066 is a quad single pole, single throw analog switch. Each
switch features two input/output terminals (nY and nZ) and an active HIGH enable input
(nE). When nE is LOW, the analog switch is turned off. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
VCC
.
2. Features and benefits
Input levels nE inputs:
For 74HC4066: CMOS level
For 74HCT4066: TTL level
Low ON resistance:
50 (typical) at VCC = 4.5 V
45 (typical) at VCC = 6.0 V
35 (typical) at VCC = 9.0 V
Specified in compliance with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC4066N
74HCT4066N
74HC4066D
74HCT4066D
74HC4066DB
74HCT4066DB
40 C to +125 C
40 C to +125 C
40 C to +125 C
DIP14
plastic dual in-line package; 14 leads (300 mil)
SOT27-1
SOT108-1
SOT337-1
SO14
plastic small outline package; 14 leads; body width
3.9 mm
SSOP14
TSSOP14
plastic shrink small outline package; 14 leads; body
width 5.3 mm
74HC4066PW 40 C to +125 C
plastic thin shrink small outline package; 14 leads; body SOT402-1
width 4.4 mm
74HCT4066PW
74HC4066BQ
74HCT4066BQ
40 C to +125 C
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
SOT762-1
4. Functional diagram
1Y
1Z
1
2
3
1
2
1
1
1
1
1
13 #
X1
1E
2Y
2E
3Y
3E
13
4
1
2
3
4
2Z
3Z
1
13 #
4
3
9
5 #
X1
5
5 #
8
8
9
1
8
9
6 #
X1
6 #
11
6
11
10
10
1
4Y
4E
4Z
11
12
10
12 #
12 #
X1
(a)
(b)
001aad270
001aad269
Fig 1. Logic symbol
Fig 2. IEC logic symbol
74HC_HCT4066
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 2 April 2013
2 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
nY
nE
V
V
CC
CC
GND
nZ
001aad271
Fig 3. Schematic diagram (one switch)
5. Pinning information
5.1 Pinning
terminal 1
index area
1
2
3
4
5
6
7
14
13
12
11
10
9
1Y
1Z
V
CC
1E
4E
4Y
4Z
3Z
3Y
2
3
4
5
6
13
12
11
10
9
1Z
1E
4E
4Y
4Z
3Z
2Z
2Y
2E
3E
2Z
4066
2Y
4066
(1)
V
CC
2E
3E
001aac116
8
GND
Transparent top view
001aad268
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to VCC.
Fig 4. Pin configuration for DIP14, SO14, SSOP14
and TSSOP14
Fig 5. Pin configuration for DHVQFN14
5.2 Pin description
Table 2.
Symbol
Pin description
Pin
Description
1Z, 2Z, 3Z, 4Z
1Y, 2Y, 3Y, 4Y
GND
2, 3, 9, 10
1, 4, 8, 11
7
independent input or output
independent input or output
ground (0 V)
1E, 2E, 3E, 4E
VCC
13, 5, 6, 12
14
enable input (active HIGH)
supply voltage
74HC_HCT4066
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 2 April 2013
3 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
6. Functional description
Table 3.
Function table[1]
Input nE
Switch
OFF
L
H
ON
[1] H = HIGH voltage level;
L = LOW voltage level.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
+11.0
20
20
25
50
Unit
V
VCC
IIK
supply voltage
0.5
input clamping current
switch clamping current
switch current
VI < 0.5 V or VI > VCC + 0.5 V
VSW < 0.5 V or VSW > VCC + 0.5 V
VSW = 0.5 V to VCC + 0.5 V
-
mA
mA
mA
mA
mA
C
ISK
-
[1]
[2]
ISW
ICC
IGND
Tstg
Ptot
-
supply current
-
ground current
-
50
+150
storage temperature
total power dissipation
65
Tamb = 40 C to +125 C
DIP14 package
-
-
750
500
SO14, (T)SSOP14 and DHVQFN14
packages
P
power dissipation
per switch
-
100
mW
[1] To avoid drawing VCC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn. In this case there is
no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or GND.
[2] For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C.
For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
74HC_HCT4066
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 2 April 2013
4 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Symbol Parameter
Conditions
74HC4066
74HCT4066
Unit
Min
Typ
Max
10.0
VCC
VCC
+125
625
139
83
Min
Typ
Max
5.5
VCC
VI
supply voltage
input voltage
2.0
5.0
4.5
5.0
V
V
V
GND
-
GND
-
VCC
VCC
VSW
Tamb
t/V
switch voltage
ambient temperature
GND
-
GND
-
40
+25
40
+25
+125 C
input transition rise
and fall rate
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 10.0 V
-
-
-
-
-
-
-
-
-
-
-
ns/V
1.67
1.67
139
ns/V
ns/V
ns/V
-
-
-
-
-
-
35
9. Static characteristics
Table 6.
RON resistance per switch for types 74HC4066 and 74HCT4066
VI = VIH or VIL; for test circuit see Figure 6.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
For 74HC4066: VCC GND = 2.0 V, 4.5 V, 6.0 V and 9.0 V.
For 74HCT4066: VCC GND = 4.5 V.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
RON(peak) ON resistance (peak) Vis = VCC to GND
VCC = 2.0 V; ISW = 100 A
[2]
[2]
[2]
-
-
-
-
-
-
-
-
-
-
-
VCC = 4.5 V; ISW = 1000 A
VCC = 6.0 V; ISW = 1000 A
VCC = 9.0 V; ISW = 1000 A
Vis = GND
54
42
32
118
105
88
142
126
105
RON(rail)
ON resistance (rail)
VCC = 2.0 V; ISW = 100 A
VCC = 4.5 V; ISW = 1000 A
VCC = 6.0 V; ISW = 1000 A
VCC = 9.0 V; ISW = 1000 A
Vis = VCC
-
-
-
-
80
35
27
20
-
-
-
-
-
-
95
82
70
115
100
85
VCC = 2.0 V; ISW = 100 A
VCC = 4.5 V; ISW = 1000 A
VCC = 6.0 V; ISW = 1000 A
VCC = 9.0 V; ISW = 1000 A
-
-
-
-
100
42
-
-
-
-
-
-
106
94
78
128
113
95
35
20
74HC_HCT4066
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 2 April 2013
5 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
Table 6.
VI = VIH or VIL; for test circuit see Figure 6.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
RON resistance per switch for types 74HC4066 and 74HCT4066 …continued
V
For 74HC4066: VCC GND = 2.0 V, 4.5 V, 6.0 V and 9.0 V.
For 74HCT4066: VCC GND = 4.5 V.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
RON
ON resistance
mismatch between
channels
Vis = VCC to GND
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
[2]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
5
4
3
[1] Typical values are measured at Tamb = 25 C.
[2] At supply voltages (VCC GND) approaching 2 V, the analog switch ON resistance becomes extremely non-linear. Therefore it is
recommended that these devices be used to transmit digital signals only, when using these supply voltages.
aaa-003459
60
R
ON
(Ω)
V
= 4.5 V
CC
50
6 V
V
SW
40
30
20
10
9 V
V
CC
nE
nY
V
IH
nZ
GND
V
I
SW
is
0
1.8
3.6
5.4
7.2
9.0
V
(V)
is
aaa-003458
Vis = 0 V to VCC
Vis = 0 V to VCC
VSW
RON
=
---------
ISW
Fig 6. Test circuit for measuring RON
Fig 7. Typical RON as a function of input voltage Vis
74HC_HCT4066
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 2 April 2013
6 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
Table 7.
Static characteristics 74HC4066
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol
Tamb = 40 C to +85 C
VIH HIGH-level input voltage
Parameter
Conditions
Min
Typ[1] Max
Unit
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
VI = VCC or GND
VCC = 6.0 V
VCC = 10.0 V
1.5
1.2
2.4
3.2
4.7
0.8
2.1
2.8
4.3
-
V
V
V
V
V
V
V
V
3.15
-
4.2
-
6.3
-
VIL
LOW-level input voltage
-
-
-
-
0.5
1.35
1.80
2.70
II
input leakage current
-
-
-
-
1.0
2.0
A
A
IS(OFF)
OFF-state leakage current
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC GND; see Figure 8
per channel
-
-
-
-
1.0
1.0
A
A
IS(ON)
ICC
ON-state leakage current
supply current
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC GND; see Figure 9
VI = VCC or GND; Vis = GND or VCC
Vos = VCC or GND
;
VCC = 6.0 V
-
-
-
-
-
20.0
A
A
pF
pF
VCC = 10.0 V
-
40.0
CI
input capacitance
switch capacitance
3.5
8
-
-
Csw
Tamb = 40 C to +125 C
VIH HIGH-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
VI = VCC or GND
VCC = 6.0 V
VCC = 10.0 V
1.5
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
3.15
-
4.2
-
6.3
-
VIL
LOW-level input voltage
input leakage current
-
-
-
-
0.50
1.35
1.80
2.70
II
-
-
-
-
1.0
2.0
A
A
IS(OFF)
OFF-state leakage current
ON-state leakage current
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC GND; see Figure 8
per channel
-
-
-
-
1.0
1.0
A
A
IS(ON)
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC GND; see Figure 9
74HC_HCT4066
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 2 April 2013
7 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
Table 7.
Static characteristics 74HC4066 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
V
os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol
ICC
Parameter
Conditions
Min
Typ[1] Max
Unit
supply current
VI = VCC or GND; Vis = GND or VCC
Vos = VCC or GND
;
VCC = 6.0 V
-
-
-
-
40
80
A
A
VCC = 10.0 V
[1] Typical values are measured at Tamb = 25 C.
Table 8.
Static characteristics 74HCT4066
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
V
os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol
Parameter
Conditions
Min
Typ[1] Max
Unit
Tamb = 40 C to +85 C
VIH
VIL
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
2.0
1.6
1.2
-
-
V
LOW-level input voltage
input leakage current
VCC = 4.5 V to 5.5 V
-
-
0.8
1.0
V
II
VI = VCC or GND; VCC = 5.5 V
A
IS(OFF)
OFF-state leakage current VCC = 5.5 V; VI = VIH or VIL;
VSW = VCC GND; see Figure 8
per channel
-
-
-
-
1.0
1.0
A
A
IS(ON)
ICC
ON-state leakage current
supply current
VCC = 5.5 V; VI = VIH or VIL;
VSW = VCC GND; see Figure 9
VI = VCC or GND; Vis = GND or VCC
Vos = VCC or GND; VCC = 4.5 V to 5.5 V
;
-
-
-
20.0
450
A
A
ICC
additional supply current
per input pin; VI = VCC 2.1 V; other inputs
100
at VCC or GND; VCC = 4.5 V to 5.5 V
CI
input capacitance
switch capacitance
-
-
3.5
8
-
-
pF
pF
Csw
Tamb = 40 C to +125 C
VIH
VIL
HIGH-level input voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
LOW-level input voltage
input leakage current
VCC = 4.5 V to 5.5 V
-
-
0.8
1.0
V
II
VI = VCC or GND; VCC = 5.5 V
A
IS(OFF)
OFF-state leakage current VCC = 5.5 V; VI = VIH or VIL;
VSW = VCC GND; see Figure 8
per channel
-
-
-
-
1.0
1.0
A
A
IS(ON)
ICC
ON-state leakage current
supply current
VCC = 5.5 V; VI = VIH or VIL;
VSW = VCC GND; see Figure 9
VI = VCC or GND; Vis = GND or VCC
Vos = VCC or GND; VCC = 4.5 V to 5.5 V
;
-
-
-
-
40
A
A
ICC
additional supply current
per input pin; VI = VCC 2.1 V; other inputs
490
at VCC or GND; VCC = 4.5 V to 5.5 V
[1] Typical values are measured at Tamb = 25 C.
74HC_HCT4066
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 2 April 2013
8 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
V
V
CC
CC
E
E
Z
V
IL
V
IH
Yn
Z
Yn
V
I
I
SW
I
os
SW
SW
GND
V
V
V
is
is
os
GND
aaa-003456
aaa-003457
V
V
is = VCC and Vos = GND
is = GND and Vos = VCC
Vis = VCC and Vos = open
is = GND and Vos = open
V
Fig 8. Test circuit for measuring OFF-state leakage
current
Fig 9. Test circuit for measuring ON-state leakage
current
10. Dynamic characteristics
Table 9.
Dynamic characteristics 74HC4066
GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 12.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
[2]
tpd
propagation delay nY to nZ or nZ to nY; RL = ;
see Figure 10
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
-
-
-
-
8
3
2
2
75
15
13
10
-
-
-
-
90
18
15
12
ns
ns
ns
ns
[4]
toff
turn-off time
nE to nY or nZ; see Figure 11
VCC = 2.0 V
-
-
-
-
-
44
16
13
13
16
190
38
-
-
-
-
-
-
225
45
-
ns
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
33
26
38
30
VCC = 9.0 V
[3]
ton
turn-on time
nE to nY or nZ; see Figure 11
VCC = 2.0 V
-
-
36
13
11
10
8
125
25
-
-
-
-
-
-
-
150
30
-
ns
ns
ns
ns
ns
pF
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
-
-
21
16
-
26
20
-
VCC = 9.0 V
-
[5]
CPD
power dissipation per switch; VI = GND to VCC
capacitance
11
[1] Typical values are measured at Tamb = 25 C.
[2]
t
pd is the same as tPHL and tPLH
.
[3] ton is the same as tPHZ and tPLZ
.
74HC_HCT4066
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 2 April 2013
9 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
[4] toff is the same as tPZH and tPZL
.
[5]
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi + {(CL + Csw) VCC2 fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
{(CL + Csw) VCC2 fo} = sum of outputs;
CL = output load capacitance in pF;
Csw = switch capacitance in pF;
VCC = supply voltage in V.
Table 10. Dynamic characteristics 74HCT4066
GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 12.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
V
os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
[2]
[4]
tpd
propagation
delay
nY to nZ or nZ to nY; RL = ;
see Figure 10
VCC = 4.5 V
-
3
15
-
18
ns
toff
turn-off time
turn-on time
nE to nY or nZ; see Figure 11
VCC = 4.5 V
-
-
20
16
44
-
-
-
53
-
ns
ns
VCC = 5.0 V; CL = 15 pF
nE to nY or nZ; see Figure 11
VCC = 4.5 V
[3]
[5]
ton
-
-
-
12
12
12
30
-
-
-
-
36
-
ns
ns
pF
VCC = 5.0 V; CL = 15 pF
CPD
power dissipation per switch;
capacitance VI = GND to (VCC 1.5 V)
-
-
[1] Typical values are measured at Tamb = 25 C.
[2] tpd is the same as tPHL and tPLH
[3] on is the same as tPHZ and tPLZ
[4] toff is the same as tPZH and tPZL
.
t
.
.
[5] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi + {(CL + Csw) VCC2 fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
{(CL + Csw) VCC2 fo} = sum of outputs;
CL = output load capacitance in pF;
Csw = switch capacitance in pF;
VCC = supply voltage in V.
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
10 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
11. Waveforms
50 %
V
is
input
t
t
PLH
PHL
50 %
V
output
os
001aad555
Fig 10. Input (Vis) to output (Vos) propagation delays
V
I
V
M
E input
0 V
t
t
PZL
PLZ
50 %
V
V
output
output
os
10 %
t
PHZ
t
PZH
90 %
50 %
os
switch ON
switch OFF
switch ON
aaa-003460
Measurement points are shown in Table 11.
Fig 11. Turn-on and turn-off times
Table 11. Measurement points
Type
VI
VM
74HC4066
74HCT4066
VCC
3.0 V
0.5VCC
1.3 V
74HC_HCT4066
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 2 April 2013
11 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
V
V
CC
CC
is
V
V
os
I
S1
R
L
PULSE
GENERATOR
open
DUT
R
T
C
L
GND
001aag732
Test data is given in Table 12.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistor.
S1 = Test selection switch.
Fig 12. Load circuitry for measuring switching times
Table 12. Test data
Test
Input
Output
S1 position
Control E
VI[1]
Switch Yn (Z)
Vis
tr, tf
Switch Z (Yn)
CL
RL
tPHL, tPLH
tPHZ, tPZH
tPLZ, tPZL
GND
GND to VCC
VCC
6 ns
6 ns
6 ns
50 pF
-
open
GND
VCC
GND to VCC
GND to VCC
50 pF, 15 pF
50 pF, 15 pF
1 k
1 k
GND
[1] For 74HCT4066: maximum input voltage VI = 3.0 V.
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
12 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
12. Additional dynamic characteristics
Table 13. Additional dynamic characteristics
Recommended conditions and typical values; GND = 0 V; Tamb = 25 C.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
THD
total harmonic distortion
fi = 1 kHz; RL = 10 k; CL = 50 pF;
%
see Figure 13
VCC = 4.5 V; VI = 4.0 V (p-p)
VCC = 9.0 V; VI = 8.0 V (p-p)
-
-
0.04
0.02
-
-
%
%
fi = 10 kHz; RL = 10 k; CL = 50 pF;
see Figure 13
VCC = 4.5 V; VI = 4.0 V (p-p)
-
-
0.12
0.06
-
-
%
%
VCC = 9.0 V; VI = 8.0 V (p-p)
[2]
[1]
f(3dB)
3 dB frequency response RL = 50 ; CL = 10 pF; see Figure 15
VCC = 4.5 V
VCC = 9.0 V
-
-
180
200
-
-
MHz
MHz
iso
isolation (OFF-state)
crosstalk voltage
RL = 600 ; CL = 50 pF; fi = 1 MHz;
see Figure 14
VCC = 4.5 V
VCC = 9.0 V
-
-
50
50
-
-
dB
dB
Vct
between digital input and switch (peak to
peak value); RL = 600 ; CL = 50 pF;
fi = 1 MHz; see Figure 16
VCC = 4.5 V
VCC = 9.0 V
-
-
110
220
-
-
mV
mV
[1]
Xtalk
crosstalk
between switches; RL = 600 ; CL = 50 pF;
fi = 1 MHz; see Figure 17
VCC = 4.5 V
VCC = 9.0 V
-
-
60
60
-
-
dB
dB
[1] Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 ).
[2] Adjust input voltage Vis to 0 dBm level at Vos for fi = 1 MHz (0 dBm = 1 mW into 50 ). After set-up, fi is increased to obtain a reading of
3 dB at Vos
.
V
V
CC
CC
nE
V
IH
2R
L
10 μF
nY/nZ
nZ/nY
V
O
f
2R
L
C
L
D
i
001aaj468
Fig 13. Test circuit for measuring total harmonic distortion
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
13 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
mna082
0
(dB)
−20
−40
−60
−80
−100
2
3
4
5
6
10
10
10
10
10
10
f (kHz)
i
a. Isolation (OFF-state)
V
V
CC
CC
nE
V
IL
2R
L
0.1 μF
nY/nZ
nZ/nY
V
O
f
C
L
2R
L
dB
i
001aaj470
b. Test circuit
VCC = 4.5 V; GND = 0 V; RL = 600 ; Rsource = 1 k.
Fig 14. Isolation (OFF-state) as a function of frequency
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
14 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
mna083
5
(dB)
0
−5
2
3
4
5
6
10
10
10
10
10
10
f (kHz)
i
a. Typical 3 dB frequency response
V
V
CC
CC
nE
V
IH
2R
L
0.1 μF
nY/nZ
nZ/nY
V
O
f
2R
L
C
L
dB
i
001aaj469
b. Test circuit
VCC = 4.5 V; GND = 0 V; RL = 50 ; Rsource = 1 k.
Fig 15. 3 dB frequency response
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
15 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
V
CC
nE
V
CC
V
CC
GND
2R
L
2R
L
nY/nZ
nZ/nY
DUT
2R
L
2R
L
C
L
oscilloscope
GND
mnb011
a. Circuit
V(p−p)
mnb012
b. Crosstalk voltage
Fig 16. Test circuit for measuring crosstalk voltage (between the digital input and the switch)
V
CC
1E
V
IH
2R
L
0.1 μF
R
L
1Y or 1Z
1Z or 1Y
CHANNEL
ON
f
V
i
V
O1
2R
L
C
L
2E
V
IL
V
CC
V
CC
2R
L
L
2R
L
2Y or 2Z
2Z or 2Y
CHANNEL
OFF
V
2R
L
2R
C
L
V
O2
001aai846
Fig 17. Test circuit for measuring crosstalk (between the switches)
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
16 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
13. Package outline
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
M
H
14
8
pin 1 index
E
1
7
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
2
(1)
(1)
Z
1
UNIT
mm
b
b
c
D
E
e
e
L
M
M
H
w
1
1
E
max.
min.
max.
max.
1.73
1.13
0.53
0.38
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.1
7.62
0.3
0.254
0.01
2.2
0.068
0.044
0.021
0.015
0.014
0.009
0.77
0.73
0.26
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.02
0.13
0.087
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-13
SOT27-1
050G04
MO-001
SC-501-14
Fig 18. Package outline SOT27-1 (DIP14)
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
17 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
v
c
y
H
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
Fig 19. Package outline SOT108-1 (SO14)
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
18 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
7
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.4
0.9
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT337-1
MO-150
Fig 20. Package outline SOT337-1 (SSOP14)
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
19 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
7
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.72
0.38
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT402-1
MO-153
Fig 21. Package outline SOT402-1 (TSSOP14)
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
20 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
SOT762-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
6
L
1
7
8
E
h
e
14
13
9
D
h
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
b
c
E
e
e
1
y
D
D
E
L
v
w
y
1
h
h
1
max.
0.05 0.30
0.00 0.18
3.1
2.9
1.65
1.35
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
2
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT762-1
- - -
MO-241
- - -
Fig 22. Package outline SOT762-1 (DHVQFN14)
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
21 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
14. Abbreviations
Table 14. Abbreviations
Acronym
CMOS
ESD
Description
Complementary Metal Oxide Semiconductor
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
15. Revision history
Table 15. Revision history
Document ID
Release date
20130402
Data sheet status
Change notice
Supersedes
74HC_HCT4066 v.7
Modifications:
Product data sheet
-
74HC_HCT4066 v.6
• Descriptive title corrected (errata).
• New general description (errata).
74HC_HCT4066 v.6
Modifications:
20120718
Product data sheet
-
74HC_HCT4066 v.5
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
74HC_HCT4066 v.5
74HC_HCT4066 v.4
20041111
Product data sheet
Product data sheet
Product data sheet
Product specification
-
-
-
-
74HC_HCT4066 v.4
74HC_HCT4066_CNV v.3
74HC_HCT4066_CNV v.2
-
20030617
74HC_HCT4067_CNV v.3 19981110
74HC_HCT4066_CNV v.2 19981002
74HC_HCT4066
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Product data sheet
Rev. 7 — 2 April 2013
22 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
16.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
74HC_HCT4066
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 2 April 2013
23 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74HC_HCT4066
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 2 April 2013
24 of 25
74HC4066; 74HCT4066
NXP Semiconductors
Quad single-pole single-throw analog switch
18. Contents
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Additional dynamic characteristics . . . . . . . . 13
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 22
7
8
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 23
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 24
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 24
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 2 April 2013
Document identifier: 74HC_HCT4066
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