74HC4514PW,112 [NXP]
74HC(T)4514 - 4-to-16 line decoder/demultiplexer with input latches TSSOP2 24-Pin;
| 型号： | 74HC4514PW,112 |
| 厂家： | 
NXP |
| 描述： | 74HC(T)4514 - 4-to-16 line decoder/demultiplexer with input latches TSSOP2 24-Pin |
| 文件： | 总13页 (文件大小：179K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4514
4-to-16 line decoder/demultiplexer
with input latches
September 1993
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
The 74HC/HCT4514 are 4-to-16 line
FEATURES
decoders/demultiplexers having four binary weighted
address inputs (A0 to A3), with latches, a latch enable input
(LE), and an active LOW enable input (E). The 16 outputs
(Q0 to Q15) are mutually exclusive active HIGH. When LE
is HIGH, the selected output is determined by the data on
An. When LE goes LOW, the last data present at An are
stored in the latches and the outputs remain stable. When
E is LOW, the selected output, determined by the contents
of the latch, is HIGH. At E HIGH, all outputs are LOW. The
enable input (E) does not affect the state of the latch.
• Non-inverting outputs
• Output capability: standard
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4514 are high-speed Si-gate CMOS
devices and are pin compatible with “4514” of the “4000B”
series. They are specified in compliance with JEDEC
standard no. 7A.
When the “4514” is used as a demultiplexer, E is the data
input and A0 to A3 are the address inputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PARAMETER
propagation delay An to Qn
CONDITIONS
UNIT
ns
HC
23
HCT
26
tPHL/ tPLH
CI
CL = 15 pF; VCC = 5 V
input capacitance
3.5
44
3.5
45
pF
pF
CPD
power dissipation capacitance per package
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
2
PD = CPD × VCC2 × fi +∑ (CL × VCC × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
September 1993
2
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1
LE
latch enable input (active HIGH)
address inputs
2, 3, 21, 22
A0 to A3
Q0 to Q15
GND
E
11, 9, 10, 8, 7, 6, 5, 4, 18, 17, 20, 19, 14, 13, 16, 15
multiplexer outputs (active HIGH)
ground (0 V)
12
23
24
enable input (active LOW)
positive supply voltage
VCC
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
September 1993
3
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
APPLICATIONS
• Digital multiplexing
• Address decoding
• Hexadecimal/BCD decoding
Fig.4 Functional diagram.
FUNCTION TABLE
INPUTS
OUTPUTS
E
A0 A1 A2 A3 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 Q15
H
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
H
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
H
L
L
L
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
H
L
L
L
H
H
L
L
L
L
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
H
L
L
L
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
H
L
L
L
L
H
L
H
Notes
1. LE = HIGH
H = HIGH voltage level
L = LOW voltage level
X = don’t care
September 1993
4
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
Fig.5 Logic diagram.
September 1993
5
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
An to Qn
74
27
22
230
46
39
290
58
49
345
69
59
ns
ns
ns
ns
ns
ns
ns
2.0 Fig.6
4.5
6.0
t
t
t
PHL/ tPLH propagation delay
LE to Qn
74
27
22
230
46
39
290
58
49
345
69
59
2.0 Fig.6
4.5
6.0
PHL/ tPLH propagation delay
E to Qn
41
15
12
175
35
30
220
44
37
265
53
45
2.0 Fig.6
4.5
6.0
THL/ tTLH output transition time
19
7
6
75
15
13
95
19
16
110
22
19
2.0 Fig.6
4.5
6.0
tW
tsu
th
latch enable pulse width 80
HIGH
14
5
4
100
20
17
120
24
20
2.0 Fig.7
4.5
6.0
16
14
set-up time
An to LE
90
18
15
25
9
7
115
23
20
135
27
23
2.0 Fig.7
4.5
6.0
hold time
An to LE
1
1
1
−11
−4
−3
1
1
1
1
1
1
2.0 Fig.7
4.5
6.0
September 1993
6
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
An
LE
E
0.65
1.40
1.00
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t
PHL/ tPLH propagation delay
An to Qn
30
29
17
7
55
50
40
15
69
63
50
19
83
75
60
22
ns
ns
ns
ns
ns
ns
ns
4.5 Fig.6
4.5 Fig.6
4.5 Fig.6
4.5 Fig.6
4.5 Fig.7
4.5 Fig.7
4.5 Fig.7
tPHL/ tPLH propagation delay
LE to Qn
t
PHL/ tPLH propagation delay
E to Qn
tTHL/ tTLH output transition time
latch enable pulse width
HIGH
tW
16
18
3
4
20
23
3
24
27
3
set-up time
An to LE
tsu
9
hold time
An to LE
th
−3
September 1993
7
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.6 Waveforms showing the input (An, LE, E) to output (Qn) propagation delays and the output transition times.
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7 Waveforms showing the minimum pulse width of the latch enable input (LE) and the set-up and hold times
for LE to An. Set-up and hold times are shown as positive values but may be specified as negative values.
September 1993
8
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches
74HC/HCT4514
APPLICATION INFORMATION
Fig.8 Code-to-code conversion; hexadecimal to BCD.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
September 1993
9
Information as of 2002-11-28
74HC/HCT4514; 4-to-16 line
decoder/demultiplexer with
input latches
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•
The 74HC/HCT4514 are high-speed Si-gate CMOS devices and are pin compatible with '4514' of the '4000B' series. They
are specified in compliance with JEDEC standard no. 7A.
Catalog by
System
•
•
•
The 74HC/HCT4514 are 4-to-16 line decoders/demultiplexers having four binary weighted address inputs (A to A ), with
0
3
Cross-reference
End of Life
information
Distributors Go
Here!
latches, a latch enable input (LE), and an active LOW enable input (E). The 16 outputs (Q to Q ) are mutually exclusive
0
15
active HIGH. When LE is HIGH, the selected output is determined by the data on A . When LE goes LOW, the last data
n
present at A are stored in the latches and the outputs remain stable. When E is LOW, the selected output, determined by
n
the contents of the latch, is HIGH. At E HIGH, all outputs are LOW. The enable input (E) does not affect the state of the
latch.
•
When the '4514' is used as a demultiplexer, E is the data input and A to A are the address inputs.
0
3
Features
●
●
●
Non-inverting outputs
Output capability: standard
I
category: MSI
CC
Datasheet
Type number Title
Publication
release date
Datasheet status Page
File Datasheet
count size
(kB)
74HC/HCT4514 4-to-16 line
01-Sep-93
Product
9
74
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decoder/demultiplexer with
specification
input latches
Additional datasheet info
To complete the device datasheet with package and family information, also download the following PDF files. The "Logic
Package Information" document is required to determine in which package(s) this device is available.
Document
Description
1
HCT_FAMILY_SPECIFICATIONS HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family
Specifications
2
3
HCT_PACKAGE_INFO
HC/T Package Info, The IC06 74HC/HCT/HCMOS Logic Package
Information
HCT_PACKAGE_OUTLINES
HC/T Package Outlines, The IC06 74HC/HCT/HCMOS Logic Package
Outlines
Parametrics
Type number Package Description
Propagation Voltage No. Power
Logic
Output
Delay(ns)
of Dissipation
Pins Considerations Levels
Switching Drive
Capability
4-of-16
Decoder/Demultiplexer
Low Power or
24 Battery
SOT137
(SO24)
5 Volts
+
74HC4514D
74HC4514DB
74HC4514N
74HC4514PW
74HC4514U
with Input Latches;
Outputs LOW at Data
Input HIGH
15
CMOS
CMOS
CMOS
CMOS
CMOS
Low
Applications
4-of-16
Decoder/Demultiplexer
with Input Latches;
Outputs LOW at Data
Input HIGH
Low Power or
24 Battery
SOT340-1
(SSOP24)
5 Volts
+
15
15
15
15
Low
Low
Low
Low
Applications
4-of-16
Decoder/Demultiplexer
with Input Latches;
Outputs LOW at Data
Input HIGH
Low Power or
24 Battery
SOT101-1
(DIP24)
5 Volts
+
Applications
4-of-16
Decoder/Demultiplexer
with Input Latches;
Outputs LOW at Data
Input HIGH
Low Power or
24 Battery
SOT355-1
(TSSOP24)
5 Volts
+
Applications
4-of-16
Decoder/Demultiplexer
with Input Latches;
Outputs LOW at Data
Input HIGH
Low Power or
24 Battery
uncased
die
5 Volts
+
Applications
4-of-16
Decoder/Demultiplexer
with Input Latches;
Outputs LOW at Data
Input HIGH; TTL
Enabled
Low Power or
24 Battery
SOT137
(SO24)
5 Volts
+
74HCT4514D
74HCT4514DB
74HCT4514N
15
15
15
TTL
TTL
TTL
Low
Low
Low
Applications
4-of-16
Decoder/Demultiplexer
with Input Latches;
Outputs LOW at Data
Input HIGH; TTL
Enabled
Low Power or
24 Battery
SOT340-1
(SSOP24)
5 Volts
+
Applications
4-of-16
Decoder/Demultiplexer
with Input Latches;
Outputs LOW at Data
Input HIGH; TTL
Enabled
Low Power or
24 Battery
Applications
SOT101-1
(DIP24)
5 Volts
+
4-of-16
Decoder/Demultiplexer
with Input Latches;
Outputs LOW at Data
Input HIGH; TTL
Enabled
Low Power or
24 Battery
SOT355-1
(TSSOP24)
5 Volts
+
74HCT4514PW
74HCT4514U
15
15
TTL
TTL
Low
Low
Applications
4-of-16
Decoder/Demultiplexer
with Input Latches;
Outputs LOW at Data
Input HIGH; TTL
Enabled
Low Power or
24 Battery
Applications
uncased
die
5 Volts
+
Products, packages, availability and ordering
Type number North American Ordering code Marking/Packing Package Device status Buy online
Discretes packing
type number
(12NC)
info
Standard Marking
9337 156 70652 * Bulk Pack,
CECC
SOT137
(SO24)
74HC4514D
74HC4514D
Full production
Standard Marking
9337 156 70653 * Reel Pack, SMD,
13", CECC
SOT137
(SO24)
74HC4514D-T
Full production
Full production
Full production
SOT340-1
(SSOP24)
Standard Marking
9351 900 90112
74HC4514DB 74HC4514DB
* Bulk Pack
Standard Marking
SOT340-1
(SSOP24)
74HC4514DB-T 9351 900 90118 * Reel Pack, SMD,
13"
Standard Marking
9336 710 40652 * Bulk Pack,
CECC
SOT101-1
(DIP24)
74HC4514N
74HC4514N
Full production
Full production
Full production
SOT355-1
Standard Marking
* Bulk Pack
74HC4514PW 74HC4514PW
9352 624 15112
(TSSOP24)
Standard Marking
SOT355-1
74HC4514PW-T 9352 624 15118 * Reel Pack, SMD,
13"
(TSSOP24)
No Marking *
9338 396 30005 Chips on Wafer,
Pre-Sawn, On FFC
NAU000
74HC4514U
Full production
Full production
-
Standard Marking
9337 156 90652 * Bulk Pack,
CECC
SOT137
(SO24)
74HCT4514D 74HCT4514D
Standard Marking
74HCT4514D-T 9337 156 90653 * Reel Pack, SMD,
13", CECC
SOT137
(SO24)
Full production
Full production
Full production
SOT340-1
(SSOP24)
Standard Marking
* Bulk Pack
74HCT4514DB 74HCT4514DB
9351 900 80112
Standard Marking
9351 900 80118 * Reel Pack, SMD,
13"
SOT340-1
(SSOP24)
74HCT4514DB-
T
Standard Marking
9336 710 70652 * Bulk Pack,
CECC
SOT101-1
(DIP24)
74HCT4514N 74HCT4514N
Full production
SOT355-1
Standard Marking
* Bulk Pack
74HCT4514PW 74HCT4514PW
9352 624 14112
Full production
Full production
(TSSOP24)
Standard Marking
SOT355-1
74HCT4514PW-
T
9352 624 14118 * Reel Pack, SMD,
13"
(TSSOP24)
No Marking *
9338 396 40005 Chips on Wafer,
Pre-Sawn, On FFC
NAU000
74HCT4514U
Full production
-
Products in the above table are all in production. Some variants are discontinued; click here for information on these
variants.
Similar products
74HC/HCT4514 links to the similar products page containing an overview of products that are similar in function or
related to the type number(s) as listed on this page. The similar products page includes products from the same catalog
tree(s), relevant selection guides and products from the same functional category.
Support & tools
HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications (date 01-Mar-98)
HC/T User Guide (date 01-Nov-97)
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