74HCT137 [NXP]
3-to-8 line decoder/demultiplexer with address latches; inverting; 3至8线译码器/解复用器与地址锁存器;反相
| 型号： | 74HCT137 |
| 厂家： | 
NXP |
| 描述： | 3-to-8 line decoder/demultiplexer with address latches; inverting |
| 文件： | 总19页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC137
3-to-8 line decoder, demultiplexer with address latches;
inverting
Rev. 03 — 11 November 2004
Product data sheet
1. General description
The 74HC137 is a high-speed Si-gate CMOS device and is pin compatible with low power
Schottky TTL (LSTTL). The 74HC137 is specified in compliance with JEDEC
standard no. 7A.
The 74HC137 is a 3-to-8 line decoder, demultiplexer with latches at the three address
inputs (An). The 74HC137 essentially combines the 3-to-8 decoder function with a 3-bit
storage latch. When the latch is enabled (LE = LOW), the 74HC137 acts as a 3-to-8 active
LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present
at the inputs before this transition, is stored in the latches. Further address changes are
ignored as long as LE remains HIGH.
The output enable input (E1 and E2) controls the state of the outputs independent of the
address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH.
The 74HC137 is ideally suited for implementing non-overlapping decoders in 3-state
systems and strobed (stored address) applications in bus oriented systems.
2. Features
■ Combines 3-to-8 decoder with 3-bit latch
■ Multiple input enable for easy expansion or independent controls
■ Active LOW mutually exclusive outputs
■ Low-power dissipation
■ Complies with JEDEC standard no. 7A
■ ESD protection:
◆ HBM EIA/JESD22-A114-B exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V.
■ Multiple package options
■ Specified from −40 °C to +80 °C and from −40 °C to +125 °C.
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.
Symbol
Parameter
propagation delay
An to Yn
Conditions
Min
Typ
Max Unit
tPHL, tPLH
CL = 15 pF; VCC = 5 V
-
-
-
-
-
-
18
17
15
15
3.5
57
-
-
-
-
-
-
ns
ns
ns
ns
pF
pF
LE to Yn
E1 to Yn
E2 to Yn
CI
input capacitance
[1]
CPD
power dissipation
capacitance
VI = GND to VCC
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
4. Ordering information
Table 2:
Ordering information
Type number
Package
Temperature range
−40 °C to +125 °C
−40 °C to +125 °C
Name
DIP16
SO16
Description
Version
74HC137N
74HC137D
plastic dual in-line package; 16 leads (300 mil) SOT38-4
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HC137DB
−40 °C to +125 °C
SSOP16
plastic shrink small outline package; 16 leads; SOT338-1
body width 5.3 mm
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
2 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
5. Functional diagram
4
LE
Y0
Y1
Y2
Y3
Y4
Y5
Y6
15
14
13
12
11
10
9
A0
A1
1
2
INPUT
LATCHES
3 TO 8
DECODER
3 A2
Y7 7
5 E1
6 E2
001aab881
Fig 1. Functional diagram
DX
4
1
2
3
15
14
13
12
11
10
9
C8
0
0
1
2
3
4
5
6
7
0
7
8D,G
4
2
LE
15
Y0
5
6
14
&
Y1
7
13
Y2
1
A0
12
Y3
2
3
INPUT
LATCHES
3 TO 8
DECODER
A1
A2
11
Y4
10
X/Y
Y5
4
1
2
3
15
14
13
12
11
10
9
9
C8
0
1
2
3
4
5
6
7
Y6
7
8D,1
8D,2
8D,4
Y7
E1
E2
5
6
001aab879
5
6
&
7
EN
001aab880
Fig 2. Logic symbol
Fig 3. IEC logic symbol
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
3 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
A0
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A0
A1
A2
LE
LATCH
LATCH
LATCH
A0
LE
LE
LE
LE
A1
A1
LE
A2
A2
LE
E1
E2
001aab882
Fig 4. Logic diagram
6. Pinning information
6.1 Pinning
1
16
15
14
13
12
11
10
9
A0
A1
A2
LE
E1
E2
Y7
V
CC
2
3
4
5
6
7
8
Y0
Y1
Y2
Y3
Y4
Y5
Y6
137
GND
001aab878
Fig 5. Pin configuration
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
4 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
6.2 Pin description
Table 3:
Symbol
A0
Pin description
Pin
1
Description
data input 0
A1
2
data input 1
A2
3
data input 2
LE
4
latch enable input (active LOW)
data enable input 1 (active LOW)
data enable input 2 (active HIGH)
multiplexer output 7
ground (0 V)
E1
5
E2
6
Y7
7
GND
Y6
8
9
multiplexer output 6
multiplexer output 5
multiplexer output 4
multiplexer output 3
multiplexer output 2
multiplexer output 1
multiplexer output 0
positive supply voltage
Y5
10
11
12
13
14
15
16
Y4
Y3
Y2
Y1
Y0
VCC
7. Functional description
7.1 Function table
Table 4:
Function table[1]
Input
Enable
Output
LE
H
X
E1
L
E2
H
X
A0
X
X
X
L
A1
X
X
X
L
A2
X
X
X
L
Y0
stable
H
Y1
Y2
Y3
Y4
Y5
Y6
Y7
H
X
H
H
H
L
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
X
L
H
L
L
H
L
H
L
L
L
H
H
H
L
L
H
H
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
H
H
H
H
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
5 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
8. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max Unit
VCC
IIK
supply voltage
−0.5 +7
V
input diode current
output diode current
VI < −0.5 V or VI > VCC + 0.5 V
-
-
±20
mA
mA
IOK
VO < −0.5 V or
VO > VCC + 0.5 V
±20
±25
±50
IO
output source or sink
current
VO = −0.5 V to VCC + 0.5 V
-
mA
ICC, IGND VCC or GND current
-
mA
Tstg
Ptot
storage temperature
power dissipation
DIP16 package
−65
+150 °C
[1]
[2]
-
-
750
500
mW
SO16 and SSOP16
packages
mW
[1] Above 70 °C: Ptot derates linearly with 12 mW/K.
[2] Above 70 °C: Ptot derates linearly with 8 mW/K.
9. Recommended operating conditions
Table 6:
Symbol
VCC
Recommended operating conditions
Parameter
Conditions
Min
Typ
Max
Unit
V
supply voltage
input voltage
output voltage
2.0
5.0
6.0
VI
0
-
VCC
VCC
1000
500
400
+125
V
VO
0
-
V
tr, tf
input rise and fall
times
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
ns
ns
ns
°C
-
6.0
-
-
-
Tamb
ambient
−40
temperature
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
6 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
10. Static characteristics
Table 7:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Tamb = 25 °C
VIH
Parameter
Conditions
Min
Typ
Max
Unit
HIGH-level input voltage
VCC = 2.0 V
1.5
1.2
2.4
3.2
0.8
2.1
2.8
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
-
VCC = 6.0 V
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
VCC = 2.0 V
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
VCC = 6.0 V
VOH
VI = VIH or VIL
IO = −20 µA; VCC = 2.0 V
IO = −20 µA; VCC = 4.5 V
IO = −20 µA; VCC = 6.0 V
IO = −4 mA; VCC = 4.5 V
IO = −5.2 mA; VCC = 6.0 V
VI = VIH or VIL
1.9
2.0
-
-
-
-
-
V
V
V
V
V
4.4
4.5
5.9
6.0
3.98
5.48
4.32
5.81
VOL
LOW-level output voltage
IO = 20 µA; VCC = 2.0 V
IO = 20 µA; VCC = 4.5 V
IO = 20 µA; VCC = 6.0 V
IO = 4 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
VI = VCC or GND; IO = 0 A;
-
-
-
-
-
-
-
0
0.1
V
0
0.1
V
0
0.1
V
0.15
0.26
0.26
±0.1
8.0
V
0.16
V
ILI
input leakage current
-
-
µA
µA
ICC
quiescent supply current
VCC = 6.0 V
CI
input capacitance
-
3.5
-
pF
Tamb = −40 °C to +85 °C
VIH HIGH-level input voltage
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
-
VCC = 6.0 V
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
VCC = 2.0 V
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
VCC = 6.0 V
VOH
VI = VIH or VIL
IO = −20 µA; VCC = 2.0 V
IO = −20 µA; VCC = 4.5 V
IO = −20 µA; VCC = 6.0 V
IO = −4 mA; VCC = 4.5 V
IO = −5.2 mA; VCC = 6.0 V
1.9
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
4.4
5.9
3.84
5.34
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
7 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
Table 7:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 20 µA; VCC = 2.0 V
IO = 20 µA; VCC = 4.5 V
IO = 20 µA; VCC = 6.0 V
IO = 4 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
VI = VCC or GND; IO = 0 A;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
V
0.1
V
0.1
V
0.33
0.33
±1.0
80
V
V
ILI
input leakage current
µA
µA
ICC
quiescent supply current
VCC = 6.0 V
Tamb = −40 °C to +125 °C
VIH HIGH-level input voltage
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
-
VCC = 6.0 V
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
VCC = 2.0 V
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
VCC = 6.0 V
VOH
VI = VIH or VIL
IO = −20 µA; VCC = 2.0 V
IO = −20 µA; VCC = 4.5 V
IO = −20 µA; VCC = 6.0 V
IO = −4 mA; VCC = 4.5 V
IO = −5.2 mA; VCC = 6.0 V
VI = VIH or VIL
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
VOL
LOW-level output voltage
IO = 20 µA; VCC = 2.0 V
IO = 20 µA; VCC = 4.5 V
IO = 20 µA; VCC = 6.0 V
IO = 4 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
VI = VCC or GND; IO = 0 A;
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
±1.0
160
V
V
V
V
V
ILI
input leakage current
µA
µA
ICC
quiescent supply current
VCC = 6.0 V
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
8 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
11. Dynamic characteristics
Table 8:
Dynamic characteristics
GND = 0 V; tr = tf = 6 ns; CL = 50 pF.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 °C
tPHL, tPLH propagation delay An to Yn
see Figure 6
VCC = 2.0 V
-
-
-
-
58
21
17
18
180
36
31
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
VCC = 5.0 V; CL = 15 pF
see Figure 7
VCC = 2.0 V
propagation delay LE to Yn
propagation delay E1 to Yn
-
-
-
-
55
20
16
17
190
38
32
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
VCC = 5.0 V; CL = 15 pF
see Figure 7
VCC = 2.0 V
-
-
-
-
50
18
14
15
145
29
25
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
VCC = 5.0 V; CL = 15 pF
see Figure 6
VCC = 2.0 V
propagation delay E2 to Yn
-
-
-
-
50
18
14
15
145
29
25
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
VCC = 5.0 V; CL = 15 pF
see Figure 6
VCC = 2.0 V
tTHL, tTLH output transition time
-
-
-
19
7
75
15
13
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
6
tW
tsu
th
LE pulse width HIGH
set-up time An to LE
hold time An to LE
see Figure 8
VCC = 2.0 V
50
10
9
11
4
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
3
see Figure 8
VCC = 2.0 V
50
10
9
3
1
1
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
30
6
3
-
-
-
-
ns
ns
ns
pF
VCC = 4.5 V
1
VCC = 6.0 V
5
1
[1]
CPD
power dissipation capacitance
VI = GND to VCC
-
57
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
9 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
Table 8:
Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +85 °C
tPHL, tPLH propagation delay An to Yn
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
-
-
-
-
225
45
ns
ns
ns
38
propagation delay LE to Yn
propagation delay E1 to Yn
-
-
-
-
-
-
240
48
ns
ns
ns
41
-
-
-
-
-
-
180
36
ns
ns
ns
31
propagation delay E2 to Yn
-
-
-
-
-
-
180
36
ns
ns
ns
31
tTHL, tTLH output transition time
-
-
-
-
-
-
95
19
16
ns
ns
ns
tW
tsu
th
LE pulse width HIGH
set-up time An to LE
hold time An to LE
65
13
11
-
-
-
-
-
-
ns
ns
ns
65
13
11
-
-
-
-
-
-
ns
ns
ns
40
8
-
-
-
-
-
-
ns
ns
ns
7
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
10 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
Table 8:
Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +125 °C
tPHL, tPLH propagation delay An to Yn
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
-
-
-
-
270
54
ns
ns
ns
46
propagation delay LE to Yn
propagation delay E1 to Yn
-
-
-
-
-
-
285
57
ns
ns
ns
48
-
-
-
-
-
-
220
44
ns
ns
ns
38
propagation delay E2 to Yn
-
-
-
-
-
-
220
44
ns
ns
ns
38
tTHL, tTLH output transition time
-
-
-
-
-
-
110
22
ns
ns
ns
19
tW
tsu
th
LE pulse width HIGH
set-up time An to LE
hold time An to LE
-
-
-
-
-
-
75
15
13
ns
ns
ns
-
-
-
-
-
-
75
15
13
ns
ns
ns
-
-
-
-
-
-
45
9
ns
ns
ns
8
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
11 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
12. Waveforms
An, E2 input
V
M
t
t
PLH
PHL
Yn output
V
M
t
t
THL
TLH
001aab883
VM = 0.5 × VI.
Fig 6. Waveforms showing the address input (An) and enable input (E2) to output (Yn)
propagation delays and the output transition times
E1, LE
input
V
M
t
t
PLH
PHL
Yn output
V
M
t
t
THL
TLH
001aab884
VM = 0.5 × VI.
Fig 7. Waveforms showing the enable input (E1, LE) to output (Yn) propagation delays
and the output transition times
An input
LE input
V
M
t
t
h
h
t
t
su
su
V
M
transparant
latched
transparant
latched
t
W
001aab875
The shaded areas indicate when the input is permitted to change for predictable output
performance.
VM = 0.5 × VI.
Fig 8. Waveforms showing the data set-up, hold times for An input to LE input and the
latch enable pulse width
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
12 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
V
CC
V
V
O
I
PULSE
GENERATOR
D.U.T.
C
L
R
T
mna101
Test data is given in Table 9.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
Fig 9. Load circuitry for switching times
Table 9:
Supply
VCC
Test data
Input
VI
Load
CL
tr, tf
6 ns
6 ns
6 ns
6 ns
2.0 V
VCC
VCC
VCC
VCC
50 pF
50 pF
50 pF
15 pF
4.5 V
6.0 V
5.0 V
13. Application information
strobe
decoder enable
X0
X1
X2
LE
A2 A1 A0
137
E1 E2
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
input
address
0
1
2
3
4
5
6
7
to five
other
decoders
X3
X4
X5
LE
A2 A1 A0
137
E1 E2
LE
A2 A1 A0
137
E1 E2
LE
A2 A1 A0
137
E1 E2
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
16 17 18 19 20 21 22 23
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
outputs
outputs
outputs
001aab885
Fig 10. 6-to-64 line decoder with input address storage
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
13 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
14. Package outline
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
b
2
16
9
M
H
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
Z
A
A
A
2
(1)
(1)
1
w
UNIT
mm
b
b
b
c
D
E
e
e
L
M
M
H
1
2
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
1.25
0.85
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.1
7.62
0.3
0.254
0.01
0.76
0.068 0.021 0.049 0.014
0.051 0.015 0.033 0.009
0.77
0.73
0.26
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.02
0.13
0.03
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
95-01-14
03-02-13
SOT38-4
Fig 11. Package outline SOT38-4 (DIP16)
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
14 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig 12. Package outline SOT109-1 (SO16)
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
15 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
8
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT338-1
MO-150
Fig 13. Package outline SOT338-1 (SSOP16)
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
16 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
15. Revision history
Table 10: Revision history
Document ID
Release Data sheet status
Change notice Doc. number
Supersedes
date
74HC137_3
20041111 Product data sheet
-
9397 750 13804 74HC_HCT137_CNV_2
Modifications:
• The format of this data sheet has been redesigned to comply with the current presentation
and information standard of Philips Semiconductors.
• Removed type number 74HCT137.
• Inserted family specification.
74HC_HCT137_CNV_2 19970827 Product specification -
-
-
74HC_HCT137_1
-
74HC_HCT137_1
19901201 Product specification -
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
17 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
16. Data sheet status
Level Data sheet status[1] Product status[2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
17. Definitions
18. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
19. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
18 of 19
74HC137
Philips Semiconductors
3-to-8 line decoder, demultiplexer with address latches; inverting
20. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7
7.1
8
Functional description . . . . . . . . . . . . . . . . . . . 5
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended operating conditions. . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Application information. . . . . . . . . . . . . . . . . . 13
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 17
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 18
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Contact information . . . . . . . . . . . . . . . . . . . . 18
9
10
11
12
13
14
15
16
17
18
19
© Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 11 November 2004
Document number: 9397 750 13804
Published in The Netherlands
相关型号：
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