74HCT138PW-Q100,118 [NXP]
Decoder/Driver, HCT Series, Inverted Output, CMOS, PDSO16;
| 型号： | 74HCT138PW-Q100,118 |
| 厂家： | 
NXP |
| 描述： | Decoder/Driver, HCT Series, Inverted Output, CMOS, PDSO16 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总17页 (文件大小：178K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC138-Q100; 74HCT138-Q100
3-to-8 line decoder/demultiplexer; inverting
Rev. 2 — 26 January 2015
Product data sheet
1. General description
The 74HC138-Q100; 74HCT138-Q100 decodes three binary weighted address inputs
(A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three
enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and
E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to
32 lines) decoder with just four ‘138’ ICs and one inverter. The ‘138’ can be used as an
eight output demultiplexer by using one of the active LOW enable inputs as the data input
and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the
use of current limiting resistors to interface inputs to voltages in excess of VCC
.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Complies with JEDEC standard no. 7A
Input levels:
For 74HC138-Q100: CMOS level
For 74HCT138-Q100: TTL level
Demultiplexing capability
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC138D-Q100
40 C to +125 C
40 C to +125 C
40 C to +125 C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74 HCT138D-Q100
74HC138PW-Q100
74HCT138PW-Q100
74HC138BQ-Q100
74HCT138BQ-Q100
TSSOP16
plastic thin shrink small outline package;
16 leads; body width 4.4 mm
SOT403-1
DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1
very thin quad flat package; no leads;
16 terminals; body 2.5 3.5 0.85 mm
4. Functional diagram
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PQDꢀꢁꢂ
PQDꢀꢁꢃ
Fig 1. Logic symbol
Fig 2. Functional diagram
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
2 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
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(ꢃ
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ꢂꢂꢄDDHꢂꢅꢆ
Fig 3. Logic diagram
5. Pinning information
5.1 Pinning
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$ꢀ
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9
&&
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DDDꢇꢂꢂꢀꢄꢅꢈ
7UDQVSDUHQWꢉWRSꢉYLHZ
DDDꢇꢂꢂꢀꢄꢅꢀ
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4. Pin configuration SO16 and TSSOP16
Fig 5. Pin configuration DHVQFN16
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
3 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
5.2 Pin description
Table 2.
Symbol
A0, A1, A2
E1, E2
E3
Pin description
Pin
1, 2, 3
4, 5
6
Description
address input A0, A1, A2
enable input E1, E2 (active LOW)
enable input E3 (active HIGH)
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 15, 14, 13, 12, 11, 10, 9, 7
output Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 (active LOW)
ground (0 V)
GND
VCC
8
16
positive supply voltage
6. Functional description
Table 3.
Function table[1]
Control
Input
A2
Output
E1
H
X
E2
E3
X
A1
A0
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
X
H
X
L
X
X
X
H
H
H
H
H
H
H
H
X
X
L
L
H
L
L
L
H
H
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
L
H
H
H
L
H
H
L
H
L
L
L
L
H
L
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
4 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max
+7
Unit
V
supply voltage
0.5
input clamping current
output clamping current
output current
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
VO = 0.5 V to (VCC + 0.5 V)
-
20
20
25
50
mA
mA
mA
mA
mA
C
IOK
-
IO
-
ICC
supply current
-
IGND
Tstg
Ptot
ground current
-
50
+150
500
storage temperature
total power dissipation
65
[1]
-
mW
[1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
For TSSOP16 package: Ptot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN16 package: Ptot derates linearly with 4.5 mW/K above 60 C.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions
74HC138-Q100
74HCT138-Q100
Unit
Min
Typ
Max
Min
Typ
Max
VCC
VI
supply voltage
2.0
5.0
6.0
VCC
VCC
+125
625
139
83
4.5
5.0
5.5
VCC
VCC
V
V
V
input voltage
0
-
0
-
VO
output voltage
0
-
+25
-
0
-
+25
-
Tamb
t/V
ambient temperature
input transition rise and fall rate VCC = 2.0 V
VCC = 4.5 V
40
40
+125 C
-
-
-
-
-
-
-
ns/V
1.67
-
1.67
-
139 ns/V
VCC = 6.0 V
-
ns/V
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
5 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Tamb = 25 C
Tamb = 40 C to Tamb = 40 C to Unit
+85 C +125 C
Min Typ Max
Min
Max
Min
Max
74HC138-Q100
VIH
HIGH-level
input voltage
VCC = 2.0 V
1.5
1.2
2.4
3.2
0.8
-
-
1.5
-
-
1.5
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
3.15
3.15
VCC = 6.0 V
4.2
-
4.2
-
4.2
-
VIL
LOW-level
input voltage
VCC = 2.0 V
-
-
-
0.5
-
-
-
0.5
1.35
1.8
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
2.1 1.35
VCC = 6.0 V
2.8
1.8
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
1.9
4.4
5.9
2.0
4.5
6.0
-
-
-
-
-
1.9
4.4
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
5.9
IO = 4.0 mA; VCC = 4.5 V 3.98 4.32
IO = 5.2 mA; VCC = 6.0 V 5.48 5.81
VI = VIH or VIL
3.84
5.34
VOL
LOW-level
output voltage
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
-
-
-
-
-
-
0
0
0
0.1
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
1.0
V
V
0.1
V
0.15 0.26
0.16 0.26
0.33
0.33
1.0
V
V
II
input leakage
current
VI = VCC or GND;
VCC = 6.0 V
-
0.1
8.0
-
A
ICC
CI
supply current VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
-
-
80
-
160
A
input
3.5
pF
capacitance
74HCT138-Q100
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
1.6
1.2
-
2.0
-
-
2.0
-
-
V
V
VIL
LOW-level
0.8
0.8
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
4.4
4.5
-
-
4.4
-
-
4.4
3.7
-
-
V
V
IO = 4 mA
3.98 4.32
3.84
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
-
-
-
0
0.1
-
-
-
0.1
-
-
-
0.1
0.4
V
IO = 4.0 mA
0.15 0.26
0.1
0.33
1.0
V
II
input leakage
current
VI = VCC or GND;
VCC = 5.5 V
-
1.0
A
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
6 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Tamb = 25 C
Tamb = 40 C to Tamb = 40 C to Unit
+85 C +125 C
Min Typ Max
Min
Max
Min
Max
ICC
supply current VI = VCC or GND; IO = 0 A;
CC = 5.5 V
-
-
8.0
-
80
-
160
A
V
ICC
additional
VI = VCC 2.1 V;
supply current other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V;
IO = 0 A
per input pin; An inputs
per input pin; En inputs
per input pin; E3 input
-
-
-
-
150
125
100
3.5
540
450
360
-
-
-
-
675
562.5
450
-
-
-
735
A
612.5 A
490
A
CI
input
pF
capacitance
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8.
Symbol Parameter Conditions
Tamb = 25 C
Min
Tamb = 40 C
to +85 C
Tamb = 40 C
to +125 C
Unit
Typ Max Min
Max
Min
Max
74HC138-Q100
[1]
[1]
[1]
[2]
tpd
propagation An to Yn; see Figure 6
delay
VCC = 2.0 V
-
-
-
-
41
15
12
12
150
30
-
-
-
-
-
190
38
-
-
-
-
-
225
45
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
26
33
38
E3 to Yn; see Figure 6
VCC = 2.0 V
-
-
-
-
47
17
14
14
150
20
-
-
-
-
-
190
38
-
-
-
-
-
225
45
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
26
33
38
En to Yn; see Figure 7
VCC = 2.0 V
-
-
-
-
47
17
14
14
150
20
-
-
-
-
-
190
38
-
-
-
-
-
225
45
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
26
33
38
tt
transition
time
Yn; see Figure 6 and
Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
-
19
7
75
15
13
-
-
-
95
19
16
-
-
-
110
22
ns
ns
ns
6
19
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
7 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8.
Symbol Parameter Conditions
Tamb = 25 C
Min
Tamb = 40 C
to +85 C
Tamb = 40 C
to +125 C
Unit
Typ Max Min
Max
Min
Max
[3]
CPD
power
dissipation
capacitance
CL = 50 pF; f = 1 MHz;
VI = GND to VCC
-
67
-
-
-
-
-
pF
74HCT138-Q100
[1]
[1]
[1]
tpd
propagation An to Yn; see Figure 6
delay
VCC = 4.5 V
-
-
20
17
35
-
-
-
44
-
-
-
53
-
ns
ns
VCC = 5 V; CL = 15 pF
E3 to Yn; see Figure 6
VCC = 4.5 V
-
-
18
19
40
-
-
-
50
-
-
-
60
-
ns
ns
VCC = 5 V; CL = 15 pF
En to Yn; see Figure 7
VCC = 4.5 V
-
-
19
19
40
-
-
-
50
-
-
-
60
-
ns
ns
VCC = 5 V; CL = 15 pF
[2]
[3]
tt
transition
time
Yn; see Figure 6 and
Figure 7
VCC = 4.5 V
-
-
7
15
-
-
-
19
-
-
-
22
-
ns
CPD
power
CL = 50 pF; f = 1 MHz;
67
pF
dissipation
capacitance
VI = GND to VCC 1.5 V
[1] tpd is the same as tPLH and tPHL
[2] tt is the same as tTHL and tTLH
.
.
[3]
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
8 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
11. Waveforms
9
&&
$Qꢎꢉ(ꢃꢉ
LQSXWꢉ
ꢉ
9
0
*1'
W
W
3/+
3+/
9
2+
<Qꢉ
RXWSXW
9
0
9
2/
W
W
7+/
7/+
PQDꢀꢁꢀ
Measurement points are given in Table 8.
OL and VOH are typical voltage output levels that occur with the output load.
V
Fig 6. Propagation delay input (An) and enable input (E3) to output (Yn) and transition time output (Yn)
9
&&
(ꢁꢎꢉ(ꢂ
LQSXWꢉ
ꢉ
ꢉ
9
0
*1'
W
W
3/+
3+/
9
2+
<Qꢉ
RXWSXW
9
0
9
2/
W
W
7+/
7/+
PQDꢀꢁꢈ
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 7. Propagation delay enable input (En) to output (Yn) and transition time output (Yn)
Table 8.
Type
Measurement points
Input
VM
Output
VM
74HC138-Q100
74HCT138-Q100
0.5VCC
1.3 V
0.5VCC
1.3 V
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
9 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
W
:
9
,
ꢈꢀꢉꢏ
QHJDWLYHꢉ
SXOVH
9
9
9
0
0
0
ꢁꢀꢉꢏ
ꢀꢉ9
W
W
U
I
W
W
U
I
9
,
ꢈꢀꢉꢏ
SRVLWLYHꢉ
SXOVH
9
0
ꢁꢀꢉꢏ
ꢀꢉ9
W
:
9
9
&&
&&
9
,
9
2
ꢉ
5
/
6ꢁ
*
RSHQ
'87
5
7
&
/
ꢂꢂꢄDDGꢆꢉꢀ
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 8. Test circuit for measuring switching times
Table 9.
Type
Test data
Input
VI
Load
S1 position
tPHL, tPLH
open
tr, tf
6 ns
6 ns
CL
RL
tPZH, tPHZ
GND
tPZL, tPLZ
VCC
74HC138-Q100 VCC
74HCT138-Q100 3 V
15 pF, 50 pF
15 pF, 50 pF
1 k
1 k
open
GND
VCC
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
10 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
12. Package outline
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All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
11 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
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74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
12 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
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Fig 11. Package outline SOT763-1 (DHVQFN16)
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
13 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
13. Abbreviations
Table 10. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Transistor-Transistor Logic
Machine Model
ESD
HBM
TTL
MM
MIL
Military
14. Revision history
Table 11. Revision history
Document ID
Release date
20150126
Data sheet status
Change notice
Supersedes
74HC_HCT138_Q100 v.2
Modifications:
Product data sheet
-
74HC_HCT138_Q100 v.1
• Table 6: OFF-state output current removed because device has no 3-state outputs.
• Table 7: Power dissipation capacitance condition for 74HCT138-Q100 is corrected.
74HC_HCT138_Q100 v.1
20120716
Product data sheet
-
-
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
14 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use in automotive applications — This NXP
15.2 Definitions
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
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Applications — Applications that are described herein for any of these
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Customers are responsible for the design and operation of their applications
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NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
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Notwithstanding any damages that customer might incur for any reason
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customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
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products are sold subject to the general terms and conditions of commercial
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purchase of NXP Semiconductors products by customer.
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changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
15 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
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Translations — A non-English (translated) version of a document is for
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Notice: All referenced brands, product names, service names and trademarks
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16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74HC_HCT138_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 26 January 2015
16 of 17
74HC138-Q100; 74HCT138-Q100
NXP Semiconductors
3-to-8 line decoder/demultiplexer; inverting
17. Contents
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14
7
8
9
10
11
12
13
14
15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
15.1
15.2
15.3
15.4
16
17
Contact information. . . . . . . . . . . . . . . . . . . . . 16
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2015.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 26 January 2015
Document identifier: 74HC_HCT138_Q100
相关型号：
74HCT138PW-T
IC HCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16, 4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16, Decoder/Driver
NXP
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