74HCT1G66GW-R [NXP]
Bilateral switch - Description: PicoGate Bilateral Switch; TTL Enabled ; Logic switching levels: TTL ; Number of pins: 5 ; On resistance: 35 Ohms; Power dissipation considerations: Low Power ; Propagation delay: 3 ns; Voltage: 4.5-5.5 V;
| 型号： | 74HCT1G66GW-R |
| 厂家： | 
NXP |
| 描述： | Bilateral switch - Description: PicoGate Bilateral Switch; TTL Enabled ; Logic switching levels: TTL ; Number of pins: 5 ; On resistance: 35 Ohms; Power dissipation considerations: Low Power ; Propagation delay: 3 ns; Voltage: 4.5-5.5 V 开关 |
| 文件： | 总20页 (文件大小：104K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74HC1G66; 74HCT1G66
Bilateral switch
Product specification
2002 May 15
Supersedes data of 2001 Mar 02
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
FEATURES
DESCRIPTION
• Wide operating voltage range from 2.0 to 9.0 V
• Very low ON-resistance:
The 74HC1G/HCT1G66 is a high-speed Si-gate CMOS
device.
The 74HC1G/HCT1G66 provides an analog switch. The
switch has two input/output pins (Y and Z) and an active
HIGH enable input pin (E). When pin E is LOW, the analog
switch is turned off.
– 45 Ω (typical) at VCC = 4.5 V
– 30 Ω (typical) at VCC = 6.0 V
– 25 Ω (typical) at VCC = 9.0 V.
• High noise immunity
The non standard output currents are equal compared to
the 74HC/HCT4066.
• Low power dissipation
• Very small 5 pins package
• Output capability: non standard.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6.0 ns.
TYPICAL
SYMBOL
PARAMETER
turn-on time E to Vos
CONDITIONS
UNIT
ns
HC1G HCT1G
tPZH/tPZL
CL = 15 pF; RL = 1 kΩ; VCC = 5 V 11
CL = 15 pF; RL = 1 kΩ; VCC = 5 V 11
1.5
12
12
1.5
9
t
PHZ/tPLZ
turn-off time E to Vos
ns
pF
pF
pF
CI
input capacitance
CPD
CS
power dissipation capacitance
maximum switch capacitance
notes 1 and 2
9
8
8
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑ ((CL +CS)× VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = maximum switch capacitance in pF;
VCC = supply voltage in Volts;
∑ ((CL +CS)× VCC2 × fo) = sum of outputs.
2. For HC1G the condition is VI = GND to VCC
.
For HCT1G the condition is VI = GND to VCC − 1.5 V.
FUNCTION TABLE
See note 1.
INPUT E
SWITCH
OFF
L
H
ON
Note
1. H = HIGH voltage level;
L = LOW voltage level.
2002 May 15
2
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
ORDERING INFORMATION
OUTSIDE NORTH
PACKAGE
PACKAGE MATERIAL
TEMPERATURE
AMERICA
PINS
CODE
MARKING
RANGE
74HC1G66GW
74HCT1G66GW
74HC1G66GV
74HCT1G66GV
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
5
5
5
5
SC-88A
SC-88A
SC-74A
SC-74A
plastic
plastic
plastic
plastic
SOT353
SOT353
SOT753
SOT753
HL
TL
H66
T66
PINNING
PIN
SYMBOL
DESCRIPTION
1
2
3
4
5
Y
Z
independent input/output Y
independent input/output Z
ground (0 V)
GND
E
enable input E (active HIGH)
supply voltage
VCC
handbook, halfpage
handbook, halfpage
Y
Z
1
2
3
5
4
V
E
CC
1
2
Y
Z
4
E
66
GND
MNA075
MNA074
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Y
handbook, halfpage
E
1
handbook, halfpage
1
X1
2
1
V
V
CC
4
#
CC
MNA076
Z
GND
MNA077
Fig.3 IEC logic symbol.
Fig.4 Logic diagram.
2002 May 15
3
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
RECOMMENDED OPERATING CONDITIONS
74HC1G66
74HCT1G66
UNIT
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
2.0
TYP. MAX. MIN.
TYP. MAX.
VCC
VI
5.0
−
10.0
4.5
5.0
5.5
V
V
V
input voltage
GND
GND
−40
VCC
VCC
GND
GND
−
−
−
VCC
VCC
VS
switch voltage
−
Tamb
operating ambient
temperature
see DC and AC
characteristics per
device
−
+125 −40
+125 °C
tr, tf
input rise and fall times VCC = 2.0 V
VCC = 4.5 V
−
−
−
−
−
1000
500
400
250
−
−
−
−
−
−
ns
ns
ns
ns
6.0
−
6.0
−
500
−
VCC = 6.0 V
VCC = 10.0 V
−
−
−
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V);
see note 1.
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN. MAX. UNIT
VCC
IIK
−0.5
−
+11.0
±20
V
input diode current
VI < − 0.5 V or VI > VCC + 0.5 V
VS < − 0.5 V or VS > VCC + 0.5 V
−0.5 V < VS < VCC + 0.5 V
mA
mA
mA
mA
ISK
IS
switch diode current
−
±20
switch source or sink current
VCC or GND current
−
±25
ICC
Tstg
PD
−
±50
storage temperature
−65
−
+150 °C
power dissipation per package
for temperature range from −40 to + 125 °C;
200
mW
note 2
PS
power dissipation per switch
−
100
mW
Notes
1. To avoid drawing VCC current out of pin Z, when switch current flows in pin Y, the voltage drop across the
bidirectional switch must not exceed 0.4 V. If the switch current flows into pin Z, no VCC current will flow out of
terminal Y. In this case there is no limit for the voltage drop across the switch, but the voltage at pins Y and Z may
not exceed VCC or GND.
2. Above 55 °C the value of PD derates linearly with 2.5 mW/K.
2002 May 15
4
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
DC CHARACTERISTICS
Family 74HC1G66
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
Tamb (°C)
SYMBOL
PARAMETER
−40 to +85
−40 to +125
MIN. MAX.
1.5
UNIT
OTHER
VCC (V)
MIN. TYP.(1) MAX.
VIH
HIGH-level input
voltage
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
6.0
10.0
10.0
1.5
3.15
4.2
6.3
−
1.2
2.4
3.2
4.7
0.8
2.1
2.8
4.3
0.1
0.2
0.1
−
−
V
−
3.15
4.2
6.3
−
−
V
−
−
V
−
−
V
VIL
LOW-level input
voltage
0.5
1.35
1.8
2.7
1.0
2.0
1.0
0.5
1.35
1.8
2.7
1.0
2.0
1.0
V
−
−
V
−
−
V
−
−
V
ILI
input leakage
current
VI = VCC or GND
−
−
µA
µA
µA
−
−
IS
analog switch
current, OFF-state
VI = VIH or VIL;
VS = VCC − GND;
see Fig.6
−
−
analog switch
current, ON-state
VI = VIH or VIL;
VS = VCC − GND;
see Fig.7
10.0
−
0.1
1.0
−
1.0
µA
ICC
quiescent supply
current
VI = VCC or GND;
Vis = GND or VCC
Vos = VCC or GND
6.0
−
−
1.0
2.0
10
20
−
−
20
40
µA
µA
;
10.0
Note
1. All typical values are measured at Tamb = 25 °C.
2002 May 15
5
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
Family 74HCT1G66
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
T
amb (°C)
−40 to +85
MIN. TYP.(1) MAX. MIN. MAX.
SYMBOL
PARAMETER
−40 to +125 UNIT
OTHER
VCC (V)
VIH
HIGH-level input
voltage
4.5 to 5.5 2.0 1.6
−
2.0
−
V
VIL
ILI
IS
LOW-level input voltage
input leakage current
4.5 to 5.5 0.1 1.2
0.8
1.0
1.0
−
−
−
0.8
1.0
1.0
V
VI = VCC or GND
5.5
5.5
−
−
0.1
0.1
µA
µA
analog switch current,
OFF-state
VI = VIH or VIL;
VS = VCC − GND;
see Fig.6
analog switch current,
ON-state
VI = VIH or VIL;
VS = VCC − GND;
see Fig.7
5.5
−
−
−
0.1
1
1.0
10
−
−
−
1.0
20
µA
µA
µA
ICC
quiescent supply
current
VI = VCC or GND;
4.5 to 5.5
4.5 to 5.5
Vis = GND or VCC
;
Vos = VCC or GND
∆ICC
additional supply
current per input
VI = VCC − 2.1 V
−
500
850
Note
1. All typical values are measured at Tamb = 25 °C.
2002 May 15
6
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
Family 74HC1G66 and 74HCT1G66
For 74HC1G66: VCC = 2.0, 4.5, 6.0 or 9.0 V; note 1.
For 74HCT1G66: VCC = 4.5 V.
TEST CONDITIONS
Tamb (°C)
SYMBOL PARAMETER
−40 to +85
−40 to +125 UNIT
VCC
(V)
IS
(µA)
OTHER
MIN. TYP.(2) MAX. MIN. MAX.
RON
ON-resistance Vis = VCC to GND;
2.0
100
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
(peak)
VI = VIH or VIL;
see Fig.5
4.5
6.0
9.0
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
1000 −
1000 −
1000 −
42
31
23
75
29
23
18
75
35
27
21
118
105
88
−
142
126
105
−
ON-resistance Vis = GND;
100
−
(rail)
VI = VIH or VIL;
see Fig.5
1000 −
1000 −
1000 −
95
82
70
−
115
100
80
Vis = VCC
;
100
−
−
VI = VIH or VIL;
see Fig.5
1000 −
1000 −
1000 −
106
94
78
128
113
95
Notes
1. At supply voltages approaching 2 V, the analog switch ON-resistance becomes extremely non-linear. Therefore it is
recommended that these devices be used to transmit digital signals only, when using this supply voltage.
2. All typical values are measured at Tamb = 25 °C.
2002 May 15
7
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
LOW
(from enable input)
HIGH
(from enable inputs)
V
Y
Z
Y
Z
A
A
V
= 0 to V
- GND
I
is
is
CC
V = V
I
or GND
V
= GND or V
O
CC
CC
GND
GND
MNA078
MNA079
Fig.5 Test circuit for measuring ON-resistance
(RON).
Fig.6 Test circuit for measuring OFF-state
current.
MNA081
80
handbook, halfpage
R
ON
(Ω)
HIGH
(from enable input)
60
V
= 4.5 V
CE
Y
Z
40
20
0
A
A
6.0 V
9.0 V
V = V
I
or GND
V
(open circuit)
GND
CC
O
MNA080
0
2
4
6
6
10
(V)
V
is
Fig.8 Typical ON-resistance (RON) as a function
of input voltage (Vis) for Vis = 0 to VCC
Fig.7 Test circuit for measuring ON-state current.
.
2002 May 15
8
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
AC CHARACTERISTICS
Type 74HC1G66
GND = 0 V; tr = tf = 6 ns.
TEST CONDITIONS
WAVEFORMS VCC (V)
PHL/tPLH propagation delay RL = ∞; CL = 50 pF;
Tamb (°C)
SYMBOL
PARAMETER
−40 to +85
−40 to +125
UNIT
MIN. TYP.(1) MAX. MIN. MAX.
t
t
t
2.0
4.5
6.0
9.0
−
−
−
−
−
−
−
−
−
−
−
−
8
75
15
13
10
125
25
21
16
190
38
33
16
−
−
−
−
−
−
−
−
−
−
−
−
90
18
15
12
150
30
26
20
225
45
38
20
ns
Vis to Vos
see Fig.12
3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
1
PZH/tPZL
turn-on time
E to Vos
RL = 1 kΩ; CL = 50 pF; 2.0
50
16
13
9
see Figs 13 and 14
4.5
6.0
9.0
PHZ/tPLZ
turn-off time
E to Vos
RL = 1 kΩ; CL = 50 pF: 2.0
27
16
14
12
see Figs 13 and 14
4.5
6.0
9.0
Note
1. All typical values are measured at Tamb = 25 °C.
Type 74HCT1G66
GND = 0 V; tr = tf = 6 ns; Vis is the input voltage at pins Yor Z, whichever is assigned as an input. Vos is the output
voltage at pins Yor Z, whichever is assigned as an output.
TEST CONDITIONS
WAVEFORMS VCC (V)
tPHL/tPLH propagation delay RL = ∞; CL = 50 pF; 4.5
T
amb (°C)
SYMBOL
PARAMETER
−40 to +85
−40 to +125
UNIT
MIN. TYP.(1) MAX. MIN. MAX.
−
−
−
3
15
30
44
−
−
−
18
36
53
ns
Vis to Vos
see Fig.12.
tPZH/tPZL
turn-on time
E to Vos
RL = 1 kΩ; CL = 50 pF; 4.5
see Figs 15 and 16.
15
13
ns
ns
tPHZ/tPLZ
turn-off time
E to Vos
RL = 1 kΩ; CL = 50 pF; 4.5
see Figs 15 and 16.
Note
1. All typical values are measured at Tamb = 25 °C.
2002 May 15
9
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
Type 74HC1G66 and 74HCT1G66
At recommended conditions and typical values. GND = 0 V; tr = tf = 6.0 ns. Vis is the input voltage at pins Yor Z,
whichever is assigned as an input; Vos is the output voltage at pins Yor Z, whichever is assigned as an output.
SYMBOL
PARAMETER
TEST CONDITIONS
Vis(p-p) (V) VCC (V) TYP. UNIT
sine-wave distortion
f = 1 kHz
RL = 10 kΩ; CL = 50 pF; see Fig.12 4.0
4.5
9.0
4.5
9.0
4.5
9.0
4.5
9.0
0.04
0.02
0.12
0.06
−50
−50
180
200
8
%
8.0
RL = 10 kΩ; CL = 50 pF; see Fig.12 4.0
8.0
%
sine-wave distortion
f = 10 kHz
%
%
switch OFF signal
feed-through
RL = 600 Ω; CL = 50 pF; f = 1 MHz; note 1
see Figs 9 and 13
dB
dB
MHz
MHz
pF
fmax
minimum frequency
response (−3 dB)
RL = 50 Ω; CL = 10 pF;
note 2
see Figs 10 and 11
CS
maximum switch
capacitance
Notes
1. Adjust input voltage Vis is 0 dBm level (0 dBM = 1 mW into 600 Ω).
2. Adjust input voltage Vis is 0 dBm level at Vos for 1 MHz (0 dBM = 1 mW into 50 Ω).
2002 May 15
10
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
MNA082
0
(dB)
−20
−40
−60
−80
−100
2
3
4
5
6
10
10
10
10
10
10
f (kHz)
Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; RSOURCE = 1 kΩ.
Fig.9 Typical switch OFF signal feed-through as a function of frequency.
MNA083
5
(dB)
0
−5
10
2
3
4
5
6
10
10
10
10
10
f (kHz)
Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; RSOURCE = 1 kΩ.
Fig.10 Typical frequency response.
11
2002 May 15
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
V
CC
2R
L
0.1 µF
Y/Z
Z/Y
V
V
os
is
sine-wave
2R
C
dB
L
L
channel
ON
GND
MNA084
Adjust input voltage to obtain 0 dBm at Vos when fin = 1 MHz.
After set-up, frequency of fin is increased to obtain a reading of −3 db at Vos
.
Fig.11 Test circuit for measuring minimum frequency response.
V
CC
2R
L
10 µF
Y/Z
Z/Y
V
V
os
is
= 1 kHz
f
in
sine-wave
DISTORTION
METER
2R
C
L
L
channel
ON
GND
MNA085
Fig.12 Test circuit for measuring sine-wave distortion.
V
CC
2R
L
0.1 µF
Y/Z
Z/Y
V
V
os
is
2R
C
dB
L
L
channel
OFF
GND
MNA086
Fig.13 Test circuit for measuring switch OFF signal feed-through.
12
2002 May 15
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
AC WAVEFORMS
V
I
(1)
V
E INPUT
M
V
handbook, halfpage
I
GND
(1)
t
t
PZL
V
PLZ
V
M
is
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
GND
(1)
V
M
t
t
PLH
PHL
(2)
V
X
(2)
V
OH
t
t
PHZ
PZH
(1)
(3)
V
Y
V
V
M
os
OUTPUT
(1)
V
HIGH-to-OFF
OFF-to-HIGH
M
(2)
MNA087
V
OL
GND
outputs
enabled
outputs
enabled
outputs
disabled
MNA088
(1) For HC1G VM = 50%
For HCT1G VM = 1.3 V.
(1) For HC1G VM = 50%; VI = GND to VCC
For HCT1G VM = 1.3 V; VI = GND to 3.0 V.
X = 10% of signal amplitude.
(3) VY = 90% of signal amplitude.
(2) VOL and VOH are the typical output voltage drop that occur with
the output load.
(2)
V
Fig.14 The input (Vis) to output (Vos) propagation
delays.
Fig.15 The turn-on and turn-off times.
V
handbook, halfpage
CC
t
W
V
V
O
V
R
= 1 kΩ
I
CC
open
L
AMPLITUDE
0 V
PULSE
GENERATOR
D.U.T.
90%
10%
S
NEGATIVE
INPUT PULSE
1
(1)
t
V
C
M
L
R
T
50 pF
MNA090
(t )
f
t
t
(t )
THL
TLH
THL
r
t
(t )
r
(t )
f
TLH
AMPLITUDE
90%
10%
POSITIVE
INPUT PULSE
(1)
V
Definitions for test circuit:
M
CL = load capacitance including jig and probe capacitance
(see “AC characteristics” for values)
0 V
t
MNA089
RT = termination resistance should be equal to the output
impedance Zo of the pulse generator.
W
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
open
tr = tf = 6 ns, when measuring fmax, there is no constraint on tr, tf with
50% duty factor.
VCC
(1) For HC1G66: VM = 50%; VI = GND to VCC
For HCT1G66: VM = 1.3 V; VI = GND to 3.0 V.
GND
Fig.16 Test circuit for measuring AC performance.
Fig.17 Input pulse definitions.
2002 May 15
13
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
PACKAGE OUTLINES
Plastic surface mounted package; 5 leads
SOT353
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
1
2
3
c
e
1
b
p
L
p
w
M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
(2)
UNIT
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max
0.30
0.20
1.1
0.8
0.25
0.10
2.2
1.8
1.35
1.15
2.2
2.0
0.45
0.15
0.25
0.15
mm
0.1
1.3
0.65
0.2
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
SC-88A
97-02-28
SOT353
2002 May 15
14
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
Plastic surface mounted package; 5 leads
SOT753
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X
e
b
p
w
M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.100
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
SOT753
SC-74A
02-04-16
2002 May 15
15
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Wave soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
2002 May 15
16
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
WAVE
REFLOW(2)
not suitable suitable
PACKAGE(1)
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA
HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, not suitable(3)
HVSON, SMS
suitable
PLCC(4), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
suitable
not recommended(4)(5) suitable
not recommended(6)
suitable
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2002 May 15
17
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
DATA SHEET STATUS
PRODUCT
STATUS(2)
DATA SHEET STATUS(1)
DEFINITIONS
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data
Product data
Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2002 May 15
18
Philips Semiconductors
Product specification
Bilateral switch
74HC1G66; 74HCT1G66
NOTES
2002 May 15
19
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2002
SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613508/03/pp20
Date of release: 2002 May 15
Document order number: 9397 750 09723
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