74HCT257DB [NXP]
Quad 2-input multiplexer 3-state; 四2输入多路复用器三态
| 型号： | 74HCT257DB |
| 厂家： | 
NXP |
| 描述： | Quad 2-input multiplexer 3-state |
| 文件： | 总13页 (文件大小：81K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT257
Quad 2-input multiplexer; 3-state
1998 Sep 30
Product specification
Supersedes data of September 1993
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
The data inputs from source 0 (1I0 to 4I0) are selected
when input S is LOW and the data inputs from source 1
(1I1 to 4I1) are selected when S is HIGH. Data appears at
the outputs (1Y to 4Y) in true (non-inverting) form from the
selected inputs.
FEATURES
• Non-inverting data path
• 3-state outputs interface directly with system bus
• Output capability: bus driver
• ICC category: MSI
The “257” is the logic implementation of a 4-pole,
2-position switch, where the position of the switch is
determined by the logic levels applied to S. The outputs
are forced to a high impedance OFF-state when OE is
HIGH.
GENERAL DESCRIPTION
The 74HC/HCT257 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The logic equations for the outputs are:
1Y = OE.(1I1.S + 1I0.S)
2Y = OE.(2I1.S + 2I0.S)
3Y = OE.(3I1.S + 3I0.S)
4Y = OE.(4I1.S + 4I0.S)
The 74HC/HCT257 have four identical 2-input multiplexers
with 3-state outputs, which select 4 bits of data from two
sources and are controlled by a common data select
input (S).
The “257” is identical to the “258” but has non-inverting
(true) outputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PHL/ tPLH
PARAMETER
CONDITIONS
UNIT
HC
HCT
t
propagation delay
nI0, nI1 to nY
S to nY
CL = 15 pF; VCC = 5 V
11
14
13
ns
17
3.5
45
ns
pF
pF
CI
input capacitance
3.5
45
CPD
power dissipation capacitance per multiplexer notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
1998 Sep 30
2
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
74HC257N;
74HCT257N
DIP16
SO16
plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
74HC257D;
74HCT257D
plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
74HC257DB;
74HCT257DB
SSOP16
plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
SOT403-1
74HC257PW;
74HCT257PW
TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1
S
common data select input
data inputs from source 0
data inputs from source 1
3-state multiplexer outputs
ground (0 V)
2, 5, 11, 14
1I0 to 4I0
1I1 to 4I1
1Y to 4Y
GND
3, 6, 10, 13
4, 7, 9, 12
8
15
16
OE
3-state output enable input (active LOW)
positive supply voltage
VCC
1
page
page
S
1
2
3
4
5
6
7
8
16
15
14
13
V
CC
S
1I
1I
2
3
0
1
1I
0
1
1Y
2Y
3Y
4Y
4
OE
1I
4I
0
2I
2I
5
6
0
1
7
4I
1
1Y
257
3I
3I
11
10
2I
0
0
1
12
11
10
9
4Y
9
2I
1
3I
0
4I
4I
14
13
0
1
12
3I
1
2Y
3Y
GND
15
OE
MLB311
MGA835
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
1998 Sep 30
3
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
FUNCTION TABLE
INPUTS
nI0
OUTPUT
OE
S
nI1
nY
2
3
5
6
11 10
3I 3I
14 13
4I 4I
1
H
X
X
X
Z
1I
1I
2I
2I
0
1
0
1
0
1
0
L
L
L
L
H
H
L
X
X
L
L
H
X
X
L
H
L
1
S
SELECTOR
L
H
H
15 OE
3-STATE MULTIPLEXER OUTPUTS
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
1Y
2Y
7
3Y
12
4Y
MGR280
4
9
Z = high impedance OFF-state
Fig.4 Functional diagram.
Fig.5 Logic diagram.
1998 Sep 30
4
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
nI0 to nY;
36 110
13 22
10 19
47 150
17 30
14 26
33 150
12 30
10 26
41 150
15 30
12 26
14 60
140
28
165
33
ns
ns
ns
ns
ns
2.0 Fig.6
4.5
nI1 to nY
24
28
6.0
t
t
t
t
PHL/ tPLH propagation delay
190
38
225
45
2.0 Fig.6
S to nY
4.5
33
38
6.0
PZH/ tPZL 3-state output enable time
OE to nY
190
38
225
45
2.0 Fig.7
4.5
33
38
6.0
PHZ/ tPLZ 3-state output disable time
OE to nY
190
38
225
45
2.0 Fig.7
4.5
33
38
6.0
THL/ tTLH output transition time
75
90
2.0 Fig.6
5
4
12
10
15
18
4.5
6.0
13
15
1998 Sep 30
5
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
nI0
nI1
OE
S
0.40
0.40
1.35
0.70
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
nI0 to nY
16
30
38
45
ns
4.5
Fig.6
nI1 to nY
t
PHL/ tPLH propagation delay
S to nY
20
15
16
5
35
30
30
12
44
38
38
15
53
45
45
18
ns
ns
ns
ns
4.5
4.5
4.5
4.5
Fig.6
Fig.7
Fig.7
Fig.6
tPZH/ tPZL 3-state output enable time
OE to nY
tPHZ/ tPLZ 3-state output disable time
OE to nY
tTHL/ tTLH output transition time
1998 Sep 30
6
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
AC WAVEFORMS
(1) HC: VM = 50%; VI = GND to VCC
.
(1) HC: VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7 Waveforms showing the 3-state enable and
disable times.
Fig.6 Waveforms showing the input (nI0, nI1) to
output (nY) propagation delays and the
output transition times.
1998 Sep 30
7
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
PACKAGE OUTLINES
DIP16: plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
16
9
M
H
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
2
(1)
(1)
Z
1
w
UNIT
mm
b
b
c
D
E
e
e
L
M
M
H
1
1
E
max.
max.
min.
max.
1.40
1.14
0.53
0.38
0.32
0.23
21.8
21.4
6.48
6.20
3.9
3.4
8.25
7.80
9.5
8.3
4.7
0.51
3.7
2.54
0.10
7.62
0.30
0.254
0.01
2.2
0.021
0.015
0.013
0.009
0.86
0.84
0.32
0.31
0.055
0.045
0.26
0.24
0.15
0.13
0.37
0.33
inches
0.19
0.020
0.15
0.087
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-10-02
95-01-19
SOT38-1
050G09
MO-001AE
1998 Sep 30
8
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
c
y
H
v
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.050
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-23
97-05-22
SOT109-1
076E07S
MS-012AC
1998 Sep 30
9
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
8
1
detail X
w M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
mm
2.0
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
94-01-14
95-02-04
SOT338-1
MO-150AC
1998 Sep 30
10
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.10
0.65
0.25
1.0
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
94-07-12
95-04-04
SOT403-1
MO-153
1998 Sep 30
11
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
Several techniques exist for reflowing; for example,
SOLDERING
Introduction
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Typical reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
WAVE SOLDERING
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(order code 9398 652 90011).
Wave soldering can be used for all SO packages. Wave
soldering is not recommended for SSOP and TSSOP
packages, because of the likelihood of solder bridging due
to closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
DIP
If wave soldering is used - and cannot be avoided for
SSOP and TSSOP packages - the following conditions
must be observed:
SOLDERING BY DIPPING OR BY WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow and must incorporate solder
thieves at the downstream end.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Even with these conditions:
• Only consider wave soldering SSOP packages that
have a body width of 4.4 mm, that is
SSOP16 (SOT369-1) or SSOP20 (SOT266-1).
REPAIRING SOLDERED JOINTS
• Do not consider wave soldering TSSOP packages
with 48 leads or more, that is TSSOP48 (SOT362-1)
and TSSOP56 (SOT364-1).
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
SO, SSOP and TSSOP
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO, SSOP
and TSSOP packages.
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1998 Sep 30
12
Philips Semiconductors
Product specification
Quad 2-input multiplexer; 3-state
74HC/HCT257
REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally- opposite end leads. Use only a low voltage soldering iron (less
than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a
dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Sep 30
13
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