74HCT366D,653 [NXP]
74HC(T)366 - Hex buffer/line driver; 3-state; inverting SOP 16-Pin;
| 型号： | 74HCT366D,653 |
| 厂家： | 
NXP |
| 描述： | 74HC(T)366 - Hex buffer/line driver; 3-state; inverting SOP 16-Pin PC 驱动 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总19页 (文件大小：115K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
Rev. 03 — 21 November 2006
Product data sheet
1. General description
The 74HC366; 74HCT366 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL).
The 74HC366; 74HCT366 has six inverting buffer/line drivers with 3-state outputs. The
3-state outputs (nY) are controlled by the output enable inputs (OE1, OE2). A HIGH on
OEn causes the outputs to assume a high-impedance OFF-state.
The 74HC366; 74HCT366 is functionally identical to:
• 74HC365; 74HCT365, but has inverted outputs
2. Features
I Inverting outputs
I Complies with JEDEC standard no. 7A
I ESD protection:
N HBM EIA/JESD22-A114-D exceeds 2000 V
N MM EIA/JESD22-A115-A exceeds 200 V
I Specified from −40 °C to +85 °C and from −40 °C to +125 °C
3. Ordering information
Table 1.
Type number Package
Temperature range Name
Ordering information
Description
Version
74HC366
74HC366D
74HC366N
−40 °C to +125 °C
−40 °C to +125 °C
SO16
DIP16
plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
plastic dual in-line package; 16 leads (300 mil); long body SOT38-1
74HC366PW −40 °C to +125 °C
TSSOP16 plastic thin shrink small outline package; 16 leads; body
width 4.4 mm
SOT403-1
74HCT366
74HCT366D
−40 °C to +125 °C
SO16
plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HCT366DB −40 °C to +125 °C
SSOP16
plastic shrink small outline package; 16 leads; body width
5.3 mm
SOT338-1
74HCT366N
−40 °C to +125 °C
DIP16
plastic dual in-line package; 16 leads (300 mil); long body SOT38-1
74HCT366PW −40 °C to +125 °C
TSSOP16 plastic thin shrink small outline package; 16 leads; body
width 4.4 mm
SOT403-1
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
4. Functional diagram
1A
2A
3A
4A
5A
6A
1Y
2Y
3Y
4Y
5Y
6Y
3
2
4
1A
2A
3A
4A
5A
6A
1Y
2Y
3Y
4Y
5Y
6Y
5
6
7
1
&
EN
15
10
12
14
9
11
13
2
4
3
5
6
7
10
12
14
9
OE1
OE2
11
13
1
15
OE1
OE2
001aaf583
001aaf581
001aaf582
Fig 1. Functional diagram
Fig 2. Logic symbol
Fig 3. IEC logic symbol
buffer/line driver 1
V
CC
1A
1Y
OE1
OE2
GND
2A
3A
4A
5A
6A
buffer/line driver 2
buffer/line driver 3
buffer/line driver 4
buffer/line driver 5
buffer/line driver 6
2Y
3Y
4Y
5Y
6Y
001aaf584
Fig 4. Logic diagram
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
2 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
5. Pinning information
5.1 Pinning
74HC366
74HCT366
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OE1
1A
V
CC
OE2
6A
6Y
5A
5Y
4A
4Y
1Y
2A
2Y
3A
3Y
GND
001aaf580
Fig 5. Pin configuration
5.2 Pin description
Table 2.
Symbol
OE1
1A
Pin description
Pin
Description
1
output enable input 1 (active LOW)
data input 1
2
1Y
3
data output 1
2A
4
data input 2
2Y
5
data output 2
3A
6
data input 3
3Y
7
data output 3
GND
4Y
8
ground (0 V)
9
data output 4
4A
10
11
12
13
14
15
16
data input 4
5Y
data output 5
5A
data input 5
6Y
data output 6
6A
data input 6
OE2
VCC
output enable input 2 (active LOW)
supply voltage
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
3 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
6. Functional description
Table 3.
Function table[1]
Control
Input
nA
L
Output
OE1
L
OE2
L
nY
H
L
L
L
H
X
H
X
Z
H
X
X
Z
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
+7
Unit
V
VCC
IIK
supply voltage
−0.5
input clamping current
output clamping current
output current
VI < −0.5 V or VI > VCC + 0.5 V
VO < −0.5 V or VO > VCC + 0.5 V
VO = −0.5 V to (VCC + 0.5 V)
-
±20
±20
±35
70
mA
mA
mA
mA
mA
°C
IOK
IO
-
-
ICC
IGND
Tstg
Ptot
supply current
-
ground current
-
−70
+150
750
500
500
500
storage temperature
total power dissipation
−65
[1]
[2]
[3]
[3]
DIP16 package
SO16 package
-
-
-
-
mW
mW
mW
mW
SSOP16 package
TSSOP16 package
[1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.
[3] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 °C.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Symbol Parameter
74HC366
Conditions
Min Typ Max Unit
VCC
VI
supply voltage
input voltage
2.0
0
5.0
6.0
V
V
V
-
-
VCC
VCC
VO
output voltage
ambient temperature
0
Tamb
−40
+25 +125 °C
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
4 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 5.
Recommended operating conditions …continued
Symbol Parameter
Conditions
inputs
Min Typ Max Unit
tr
rise time
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
inputs
-
-
-
-
1000 ns
6.0
-
500
400
ns
ns
tf
fall time
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
-
-
1000 ns
6.0
-
500
400
ns
ns
74HCT366
VCC
VI
supply voltage
4.5
5.0
5.5
V
V
V
input voltage
output voltage
ambient temperature
rise time
0
-
-
VCC
VCC
VO
Tamb
tr
0
−40
+25 +125 °C
inputs; VCC = 4.5 V
inputs; VCC = 4.5 V
-
-
6.0
6.0
500
500
ns
ns
tf
fall time
9. Static characteristics
Table 6.
Static characteristics 74HC366
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ Max Unit
Tamb = 25 °C
VIH
HIGH-level input voltage VCC = 2.0 V
VCC = 4.5 V
1.5
1.2
-
V
V
V
V
V
V
3.15 2.4
-
VCC = 6.0 V
4.2
-
3.2
0.8
2.1
2.8
-
-
VIL
LOW-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
0.5
-
1.35
-
1.8
VOH
HIGH-level output voltage VI = VIH or VIL
IO = −20 µA; VCC = 2.0 V
-
-
-
-
-
-
-
1.9
4.4
5.9
2.0
4.5
6.0
V
V
V
V
V
IO = −20 µA; VCC = 4.5 V
IO = −20 µA; VCC = 6.0 V
IO = −6.0 mA; VCC = 4.5 V
IO = −7.8 mA; VCC = 6.0 V
3.98 4.32
5.48 5.81
VOL
LOW-level output voltage VI = VIH or VIL
IO = 20 µA; VCC = 2.0 V
IO = 20 µA; VCC = 4.5 V
IO = 20 µA; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
-
-
-
-
-
-
0
0
0
0.1
0.1
0.1
V
V
V
V
V
0.15 0.26
0.16 0.26
II
input leakage current
-
±0.1 µA
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
5 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 6.
Static characteristics 74HC366 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V
Min Typ Max Unit
IOZ
ICC
CI
-
-
-
-
±0.5 µA
supply current
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
-
8.0
-
µA
input capacitance
3.5
pF
Tamb = −40 °C to +85 °C
VIH HIGH-level input voltage VCC = 2.0 V
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
3.15
-
4.2
-
VIL
LOW-level input voltage
-
-
-
0.5
1.35
1.8
VOH
HIGH-level output voltage VI = VIH or VIL
IO = −20 µA; VCC = 2.0 V
1.9
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
IO = −20 µA; VCC = 4.5 V
IO = −20 µA; VCC = 6.0 V
IO = −6.0 mA; VCC = 4.5 V
IO = −7.8 mA; VCC = 6.0 V
4.4
5.9
3.84
5.34
VOL
LOW-level output voltage VI = VIH or VIL
IO = 20 µA; VCC = 2.0 V
IO = 20 µA; VCC = 4.5 V
IO = 20 µA; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
V
V
V
V
V
0.1
0.1
0.33
0.33
II
input leakage current
±1.0 µA
±5.0 µA
IOZ
ICC
Tamb = −40 °C to +125 °C
VIH HIGH-level input voltage VCC = 2.0 V
OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V
supply current
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
80
µA
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
3.15
-
4.2
-
VIL
LOW-level input voltage
-
-
-
0.5
1.35
1.8
VOH
HIGH-level output voltage VI = VIH or VIL
IO = −20 µA; VCC = 2.0 V
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
IO = −20 µA; VCC = 4.5 V
IO = −20 µA; VCC = 6.0 V
IO = −6.0 mA; VCC = 4.5 V
IO = −7.8 mA; VCC = 6.0 V
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
6 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 6.
Static characteristics 74HC366 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
LOW-level output voltage VI = VIH or VIL
IO = 20 µA; VCC = 2.0 V
Min Typ Max Unit
VOL
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
V
V
V
V
V
IO = 20 µA; VCC = 4.5 V
IO = 20 µA; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
II
input leakage current
±1.0 µA
±10.0 µA
IOZ
ICC
OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V
supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V
160
µA
Table 7.
Static characteristics 74HCT366
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ Max
Unit
Tamb = 25 °C
VIH
VIL
HIGH-level input voltage VCC = 4.5 V to 5.5 V
LOW-level input voltage VCC = 4.5 V to 5.5 V
2.0
-
1.6
1.2
-
V
V
0.8
VOH
HIGH-level output
voltage
VI = VIH or VIL; VCC = 4.5 V
IO = −20 µA
4.4
4.5
-
-
V
V
IO = −6.0 mA
3.98 4.32
VOL
LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V
IO = 20 µA
-
-
-
-
0
0.1
V
IO = 6.0 mA
0.16 0.26
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
-
-
±0.1
±0.5
µA
µA
IOZ
OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other
inputs at GND or VCC; IO = 0 A; VCC = 5.5 V
ICC
supply current
VI = VCC or GND; IO = 0 A; VCC = 5.5 V
-
-
8.0
µA
∆ICC
additional supply current VI = VCC − 2.1 V; other inputs at VCC or GND; IO = 0 A
pins nA
-
-
-
-
100 360
100 360
µA
µA
µA
pF
pin OE1
pin OE2
90
320
-
CI
input capacitance
3.5
Tamb = −40 °C to +85 °C
VIH
VIL
HIGH-level input voltage VCC = 4.5 V to 5.5 V
LOW-level input voltage VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
V
0.8
VOH
HIGH-level output
voltage
VI = VIH or VIL; VCC = 4.5 V
IO = −20 µA
4.4
-
-
-
-
V
V
IO = −6.0 mA
3.84
VOL
LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V
IO = 20 µA
-
-
-
-
-
-
0.1
V
IO = 6.0 mA
0.33
±1.0
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
µA
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
7 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 7.
Static characteristics 74HCT366 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
Min Typ Max
Unit
IOZ
OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other
inputs at GND or VCC; IO = 0 A; VCC = 5.5 V
±5.0
µA
ICC
supply current
VI = VCC or GND; IO = 0 A; VCC = 5.5 V
-
-
80
µA
∆ICC
additional supply current VI = VCC − 2.1 V; other inputs at VCC or GND; IO = 0 A
pins nA
pin OE1
pin OE2
-
-
-
-
-
-
450
450
400
µA
µA
µA
Tamb = −40 °C to +125 °C
VIH
VIL
HIGH-level input voltage VCC = 4.5 V to 5.5 V
LOW-level input voltage VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
V
0.8
VOH
HIGH-level output
voltage
VI = VIH or VIL; VCC = 4.5 V
IO = −20 µA
4.4
3.7
-
-
-
-
V
V
IO = −6.0 mA
VOL
LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V
IO = 20 µA
-
-
-
-
-
-
-
-
0.1
V
IO = 6.0 mA
0.4
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
±1.0
µA
IOZ
OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other
inputs at GND or VCC; IO = 0 A; VCC = 5.5 V
±10.0 µA
ICC
supply current
VI = VCC or GND; IO = 0 A; VCC = 5.5 V
-
-
160
µA
∆ICC
additional supply current VI = VCC − 2.1 V; other inputs at VCC or GND; IO = 0 A
pins nA
pin OE1
pin OE2
-
-
-
-
-
-
490
490
441
µA
µA
µA
10. Dynamic characteristics
Table 8.
Dynamic characteristics 74HC366
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8.
Symbol Parameter
Conditions
Min Typ Max Unit
Tamb = 25 °C
[1]
tpd
propagation delay
nA to nY; see Figure 6
VCC = 2.0 V
-
-
-
-
33
12
10
10
100
20
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
17
[2]
ten
enable time
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
44
16
13
150
30
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
8 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 8.
Dynamic characteristics 74HC366 …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8.
Symbol Parameter
Conditions
Min Typ Max Unit
[3]
[4]
tdis
disable time
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
55
20
16
150
30
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
tt
transition time
see Figure 6
VCC = 2.0 V
-
-
-
-
14
5
60
12
10
-
ns
ns
ns
pF
VCC = 4.5 V
VCC = 6.0 V
4
[5]
[1]
CPD
power dissipation
capacitance
per buffer; VI = GND to VCC
30
Tamb = −40 °C to +85 °C
tpd
ten
tdis
tt
propagation delay
nA to nY; see Figure 6
VCC = 2.0 V
-
-
-
-
-
-
125
25
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
21
[2]
[3]
[4]
enable time
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
-
-
-
190
38
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
33
disable time
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
-
-
-
190
38
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
33
transition time
see Figure 6
VCC = 2.0 V
-
-
-
-
-
-
75
15
13
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
Tamb = −40 °C to +125 °C
[1]
[2]
[3]
tpd
ten
tdis
propagation delay
nA to nY; see Figure 6
VCC = 2.0 V
-
-
-
-
-
-
150
30
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
enable time
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
-
-
-
225
45
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
38
disable time
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
-
-
-
225
45
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
38
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
9 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 8.
Dynamic characteristics 74HC366 …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8.
Symbol Parameter
tt transition time
Conditions
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
Min Typ Max Unit
[4]
-
-
-
-
-
-
90
18
15
ns
ns
ns
[1] tpd is the same as tPHL and tPLH
[2] ten is the same as tPZH and tPZL
[3] tdis is the same as tPHZ and tPLZ
[4] tt is the same as tTHL and tTLH
.
.
.
.
[5] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
Table 9.
Dynamic characteristics 74HCT366
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8.
Symbol Parameter
Conditions
Min
Typ
Max Unit
Tamb = 25 °C
[1]
tpd
propagation delay
nA to nY; see Figure 6
VCC = 4.5 V
-
-
-
-
-
-
13
11
16
20
5
24
-
ns
ns
ns
ns
ns
pF
VCC = 5 V; CL = 15 pF
[2]
[3]
[4]
[5]
ten
tdis
tt
enable time
disable time
transition time
OEn to nY; VCC = 4.5 V; see Figure 7
OEn to nY; VCC = 4.5 V; see Figure 7
VCC = 4.5 V; see Figure 6
per buffer; VI = GND to (VCC − 1.5 V)
35
35
12
-
CPD
power dissipation
capacitance
30
Tamb = −40 °C to +85 °C
[1]
[2]
[3]
[4]
tpd
ten
tdis
tt
propagation delay
enable time
nA to nY; VCC = 4.5 V; see Figure 6
OEn to nY; VCC = 4.5 V; see Figure 7
OEn to nY; VCC = 4.5 V; see Figure 7
VCC = 4.5 V; see Figure 6
-
-
-
-
-
-
-
-
30
44
44
15
ns
ns
ns
ns
disable time
transition time
Tamb = −40 °C to +125 °C
[1]
[2]
[3]
[4]
tpd
ten
tdis
tt
propagation delay
enable time
nA to nY; VCC = 4.5 V; see Figure 6
OEn to nY; VCC = 4.5 V; see Figure 7
OEn to nY; VCC = 4.5 V; see Figure 7
VCC = 4.5 V; see Figure 6
-
-
-
-
-
-
-
-
36
53
53
18
ns
ns
ns
ns
disable time
transition time
[1] tpd is the same as tPHL and tPLH
.
[2] ten is the same as tPZH and tPZL
.
[3] tdis is the same as tPHZ and tPLZ
.
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
10 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
[4] tt is the same as tTHL and tTLH
.
[5] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
11. Waveforms
V
I
nA input
GND
V
V
M
M
t
t
PHL
PLH
V
OH
nY output
V
M
V
M
V
OL
t
t
TLH
THL
001aaf585
Measurement points are given in Table 10.
VOL and VOH are typical output voltage drop that occur with the output load.
Fig 6. Propagation delay data input (nA) to output (nY) and output transition time
V
I
V
V
M
OEn input
M
GND
t
t
PZL
PLZ
V
CC
nY output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
nY output
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
001aaf586
Measurement points are given in Table 10.
VOL and VOH are typical output voltage drop that occur with the output load.
Fig 7. 3-state enable and disable times
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
11 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 10. Measurement points
Type
Input
VM
Output
VM
VX
VY
74HC366
0.5VCC
1.3 V
0.5VCC
1.3 V
0.1 × VCC
0.1 × VCC
0.9 × VCC
0.9 × VCC
74HCT366
t
W
V
I
90 %
negative
pulse
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
V
M
10 %
0 V
t
W
V
V
CC
CC
V
V
O
I
R
L
S1
PULSE
GENERATOR
open
DUT
R
T
C
L
001aad983
Test data is given in Table 11.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistor
S1 = Test selection switch
Fig 8. Load circuitry for measuring switching times
Table 11. Test data
Type
Input
VI
Load
S1 position
tPHL, tPLH
open
tr, tf
6 ns
6 ns
CL
RL
tPZH, tPHZ
tPZL, tPLZ
VCC
74HC366
VCC
3 V
15 pF, 50 pF
15 pF, 50 pF
1 kΩ
1 kΩ
GND
GND
74HCT366
open
VCC
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
12 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig 9. Package outline SOT109-1 (SO16)
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
13 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
8
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT338-1
MO-150
Fig 10. Package outline SOT338-1 (SSOP16)
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
14 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
DIP16: plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
16
9
M
H
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
2
(1)
(1)
Z
1
w
UNIT
mm
b
b
c
D
E
e
e
L
M
M
H
1
1
E
max.
max.
min.
max.
1.40
1.14
0.53
0.38
0.32
0.23
21.8
21.4
6.48
6.20
3.9
3.4
8.25
7.80
9.5
8.3
4.7
0.51
3.7
2.54
0.1
7.62
0.3
0.254
0.01
2.2
0.021
0.015
0.013
0.009
0.86
0.84
0.32
0.31
0.055
0.045
0.26
0.24
0.15
0.13
0.37
0.33
inches
0.19
0.02
0.15
0.087
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-13
SOT38-1
050G09
MO-001
SC-503-16
Fig 11. Package outline SOT38-1 (DIP16)
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
15 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig 12. Package outline SOT403-1 (TSSOP16)
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
16 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
13. Abbreviations
Table 12. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
LSTTL
MM
Low-power Schottky Transistor-Transistor Logic
Machine Model
14. Revision history
Table 13. Revision history
Document ID
74HC_HCT366_3
Modifications:
Release date
20061121
Data sheet status
Change notice
Supersedes
Product data sheet
-
74HC_HCT366_CNV_2
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors
• Legal texts have been adapted to the new company name where appropriate
• Added family specification
74HC_HCT366_CNV_2
19901201
Product specification
-
-
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
17 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of a NXP Semiconductors product can reasonably be expected to
15.2 Definitions
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
15.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
16. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
74HC_HCT366_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 21 November 2006
18 of 19
74HC366; 74HCT366
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
17. Contents
1
2
3
4
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 17
7
8
9
10
11
12
13
14
15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
15.1
15.2
15.3
15.4
16
17
Contact information. . . . . . . . . . . . . . . . . . . . . 18
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2006.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 21 November 2006
Document identifier: 74HC_HCT366_3
相关型号：
74HCT366DB-T
IC HCT SERIES, 6-BIT DRIVER, INVERTED OUTPUT, PDSO16, 5.30 MM, PLASTIC, MO-150, SOT-338-1, SSOP-16, Bus Driver/Transceiver
NXP
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