74HCT366PW-Q100,11 [NXP]
74HC(T)366-Q100 - Hex buffer/line driver; 3-state; inverting TSSOP 16-Pin;型号: | 74HCT366PW-Q100,11 |
厂家: | NXP |
描述: | 74HC(T)366-Q100 - Hex buffer/line driver; 3-state; inverting TSSOP 16-Pin PC 驱动 光电二极管 逻辑集成电路 |
文件: | 总19页 (文件大小:141K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74HC366-Q100; 74HCT366-Q100
Hex buffer/line driver; 3-state; inverting
Rev. 1 — 7 August 2012
Product data sheet
1. General description
The 74HC366-Q100; 74HCT366-Q100 is a hex inverter/line driver with 3-state outputs
controlled by the output enable inputs (OEn). A HIGH on OEn causes the outputs to
assume a high impedance OFF-state. Inputs include clamp diodes. This enables the use
of current limiting resistors to interface inputs to voltages in excess of VCC
The 74HC366-Q100; 74HCT366-Q100 is functionally identical to:
• 74HC365-Q100; 74HCT365-Q100, but has inverted outputs
.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Inverting outputs
Input levels:
For 74HC366-Q100: CMOS level
For 74HC366-Q100: TTL level
Complies with JEDEC standard no. 7A
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC366-Q100
74HC366D-Q100
40 C to +125 C
40 C to +125 C
SO16
plastic small outline package; 16 leads; body width
3.9 mm
SOT109-1
SOT403-1
74HC366PW-Q100
TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
74HCT366-Q100
74HCT366D-Q100
40 C to +125 C
SO16
plastic small outline package; 16 leads; body width
3.9 mm
SOT109-1
SOT403-1
74HCT366PW-Q100 40 C to +125 C
TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
4. Functional diagram
1A
2A
3A
4A
5A
6A
1Y
2Y
3Y
4Y
5Y
6Y
3
2
4
1A
2A
3A
4A
5A
6A
1Y
2Y
3Y
4Y
5Y
6Y
5
6
7
1
&
EN
15
10
12
14
9
11
13
2
4
3
5
6
7
10
12
14
9
OE1
OE2
11
13
1
15
OE1
OE2
001aaf583
001aaf581
001aaf582
Fig 1. Functional diagram
Fig 2. Logic symbol
Fig 3. IEC logic symbol
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
2 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
buffer/line driver 1
V
CC
1A
1Y
OE1
OE2
GND
2A
3A
4A
5A
6A
buffer/line driver 2
buffer/line driver 3
buffer/line driver 4
buffer/line driver 5
buffer/line driver 6
2Y
3Y
4Y
5Y
6Y
001aaf584
Fig 4. Logic diagram
5. Pinning information
5.1 Pinning
ꢀꢁꢂꢃꢄꢅꢅꢆꢇꢈꢉꢉ
ꢀꢁꢂꢃꢊꢄꢅꢅꢆꢇꢈꢉꢉ
ꢂ
ꢆ
ꢊ
ꢋ
ꢉ
ꢈ
ꢏ
ꢐ
ꢂꢈ
ꢂꢉ
ꢂꢋ
ꢂꢊ
ꢂꢆ
ꢂꢂ
ꢂꢑ
ꢒ
ꢀꢁꢂ
ꢂꢅ
ꢃ
ꢄꢄ
ꢀꢁꢆ
ꢈꢅ
ꢈꢇ
ꢉꢅ
ꢉꢇ
ꢋꢅ
ꢋꢇ
ꢂꢇ
ꢆꢅ
ꢆꢇ
ꢊꢅ
ꢊꢇ
ꢌꢍꢎ
ꢀꢀꢀꢁꢂꢂꢃꢄꢅꢆ
Fig 5. Pin configuration
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
3 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
5.2 Pin description
Table 2.
Symbol
OE1
1A
Pin description
Pin
1
Description
output enable input 1 (active LOW)
data input 1
2
1Y
3
data output 1
2A
4
data input 2
2Y
5
data output 2
3A
6
data input 3
3Y
7
data output 3
GND
4Y
8
ground (0 V)
9
data output 4
4A
10
11
12
13
14
15
16
data input 4
5Y
data output 5
5A
data input 5
6Y
data output 6
6A
data input 6
OE2
VCC
output enable input 2 (active LOW)
supply voltage
6. Functional description
Table 3.
Function table[1]
Control
Input
nA
L
Output
OE1
L
OE2
L
nY
H
L
L
L
H
X
H
X
Z
H
X
X
Z
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
4 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
+7
Unit
V
VCC
IIK
supply voltage
0.5
input clamping current
output clamping current
output current
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
VO = 0.5 V to (VCC + 0.5 V)
-
20
20
35
70
mA
mA
mA
mA
mA
C
IOK
IO
-
-
ICC
IGND
Tstg
Ptot
supply current
-
ground current
-
70
+150
500
500
storage temperature
total power dissipation
65
[1]
[2]
SO16 package
-
-
mW
mW
TSSOP16 package
[1] For SO16 packages: Ptot derates linearly with 8 mW/K above 70 C.
[2] For TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions
74HC366-Q100
74HCT366-Q100
Unit
Min
Typ
Max
6.0
Min
Typ
Max
5.5
VCC
VCC
+125
-
VCC
VI
supply voltage
2.0
5.0
4.5
5.0
V
input voltage
0
-
VCC
VCC
+125
625
139
83
0
-
V
VO
output voltage
0
-
0
-
V
Tamb
t/V
ambient temperature
input transition rise and fall rate VCC = 2.0 V
VCC = 4.5 V
40
+25
40
+25
C
-
-
-
-
-
-
-
-
ns/V
ns/V
ns/V
1.67
-
1.67
-
139
-
VCC = 6.0 V
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
5 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
9. Static characteristics
Table 6.
Static characteristics 74HC366-Q100
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ Max Unit
Tamb = 25 C
VIH
HIGH-level input voltage VCC = 2.0 V
VCC = 4.5 V
1.5
1.2
-
V
V
V
V
V
V
3.15 2.4
-
VCC = 6.0 V
4.2
-
3.2
0.8
2.1
2.8
-
-
VIL
LOW-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
0.5
-
1.35
-
1.8
VOH
HIGH-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
-
-
-
-
-
-
-
1.9
4.4
5.9
2.0
4.5
6.0
V
V
V
V
V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
3.98 4.32
5.48 5.81
VOL
LOW-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
-
-
-
-
-
-
-
-
-
0
0
0
0.1
0.1
0.1
V
V
V
V
V
0.15 0.26
0.16 0.26
II
input leakage current
-
0.1 A
0.5 A
IOZ
ICC
CI
OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V
-
supply current
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
-
8.0
-
A
input capacitance
3.5
pF
Tamb = 40 C to +85 C
VIH HIGH-level input voltage VCC = 2.0 V
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
3.15
-
4.2
-
VIL
LOW-level input voltage
-
-
-
0.5
1.35
1.8
VOH
HIGH-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
1.9
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
4.4
5.9
3.84
5.34
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
6 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 6.
Static characteristics 74HC366-Q100 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
LOW-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
Min Typ Max Unit
VOL
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
V
V
V
V
V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V;
0.1
0.1
0.33
0.33
II
input leakage current
1.0 A
5.0 A
IOZ
ICC
Tamb = 40 C to +125 C
VIH HIGH-level input voltage VCC = 2.0 V
OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V
supply current
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
80
A
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
3.15
-
4.2
-
VIL
LOW-level input voltage
-
-
-
0.5
1.35
1.8
VOH
HIGH-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VOL
LOW-level output voltage VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
V
V
V
V
V
II
input leakage current
1.0 A
10.0 A
IOZ
ICC
OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V
supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V
160
A
Table 7.
Static characteristics 74HCT366-Q100
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ Max
Unit
Tamb = 25 C
VIH
VIL
HIGH-level input voltage VCC = 4.5 V to 5.5 V
LOW-level input voltage VCC = 4.5 V to 5.5 V
2.0
-
1.6
1.2
-
V
V
0.8
VOH
HIGH-level output
voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
4.4
4.5
-
-
V
V
IO = 6.0 mA
3.98 4.32
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
7 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 7.
Static characteristics 74HCT366-Q100 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ Max
Unit
VOL
LOW-level output
voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
-
-
-
-
0
0.1
V
IO = 6.0 mA
0.16 0.26
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
-
-
0.1
0.5
A
A
IOZ
OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other
inputs at GND or VCC; IO = 0 A; VCC = 5.5 V
ICC
supply current
VI = VCC or GND; IO = 0 A; VCC = 5.5 V
-
-
8.0
A
ICC
additional supply current VI = VCC 2.1 V; other inputs at VCC or GND; IO = 0 A
pins nA
-
-
-
-
100 360
100 360
A
A
A
pF
pin OE1
pin OE2
90
320
-
CI
input capacitance
3.5
Tamb = 40 C to +85 C
VIH
VIL
HIGH-level input voltage VCC = 4.5 V to 5.5 V
LOW-level input voltage VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
V
0.8
VOH
HIGH-level output
voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
4.4
-
-
-
-
V
V
IO = 6.0 mA
3.84
VOL
LOW-level output
voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
-
-
-
-
-
-
0.1
V
IO = 6.0 mA
0.33
1.0
5.0
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
A
A
IOZ
OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other
inputs at GND or VCC; IO = 0 A; VCC = 5.5 V
ICC
supply current
VI = VCC or GND; IO = 0 A; VCC = 5.5 V
-
-
80
A
ICC
additional supply current VI = VCC 2.1 V; other inputs at VCC or GND; IO = 0 A
pins nA
pin OE1
pin OE2
-
-
-
-
-
-
450
450
400
A
A
A
Tamb = 40 C to +125 C
VIH
VIL
HIGH-level input voltage VCC = 4.5 V to 5.5 V
LOW-level input voltage VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
V
0.8
VOH
HIGH-level output
voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
4.4
3.7
-
-
-
-
V
V
IO = 6.0 mA
VOL
LOW-level output
voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
-
-
-
-
-
-
-
-
0.1
V
IO = 6.0 mA
0.4
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V
1.0
A
IOZ
OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other
inputs at GND or VCC; IO = 0 A; VCC = 5.5 V
10.0 A
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
8 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 7.
Static characteristics 74HCT366-Q100 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ Max
Unit
ICC
supply current
VI = VCC or GND; IO = 0 A; VCC = 5.5 V
-
-
160
A
ICC
additional supply current VI = VCC 2.1 V; other inputs at VCC or GND; IO = 0 A
pins nA
pin OE1
pin OE2
-
-
-
-
-
-
490
490
441
A
A
A
10. Dynamic characteristics
Table 8.
Dynamic characteristics 74HC366-Q100
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8.
Symbol Parameter
Conditions
Min Typ Max Unit
Tamb = 25 C
[1]
tpd
propagation delay
nA to nY; see Figure 6
VCC = 2.0 V
-
-
-
-
33
12
10
10
100
20
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
17
[2]
[3]
[4]
ten
tdis
tt
enable time
disable time
transition time
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
44
16
13
150
30
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
55
20
16
150
30
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
see Figure 6
VCC = 2.0 V
-
-
-
-
14
5
60
12
10
-
ns
ns
ns
pF
VCC = 4.5 V
VCC = 6.0 V
4
[5]
[1]
CPD
power dissipation
capacitance
per buffer; VI = GND to VCC
30
T
amb = 40 C to +85 C
tpd
propagation delay
nA to nY; see Figure 6
VCC = 2.0 V
-
-
-
-
-
-
125
25
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
21
[2]
ten
enable time
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
-
-
-
190
38
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
33
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
9 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 8.
Dynamic characteristics 74HC366-Q100 …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8.
Symbol Parameter
Conditions
Min Typ Max Unit
[3]
[4]
tdis
disable time
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
-
-
-
190
38
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
33
tt
transition time
see Figure 6
VCC = 2.0 V
-
-
-
-
-
-
75
15
13
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
Tamb = 40 C to +125 C
[1]
[2]
[3]
[4]
tpd
ten
tdis
tt
propagation delay
nA to nY; see Figure 6
VCC = 2.0 V
-
-
-
-
-
-
150
30
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
enable time
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
-
-
-
225
45
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
38
disable time
OEn to nY; see Figure 7
VCC = 2.0 V
-
-
-
-
-
-
225
45
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
38
transition time
see Figure 6
VCC = 2.0 V
-
-
-
-
-
-
90
18
15
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
[1] tpd is the same as tPHL and tPLH
[2] ten is the same as tPZH and tPZL
[3] tdis is the same as tPHZ and tPLZ
[4] tt is the same as tTHL and tTLH
.
.
.
.
[5] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
74HC_HCT366_Q100
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
10 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
Table 9.
Dynamic characteristics 74HCT366-Q100
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8.
Symbol Parameter
Conditions
Min
Typ
Max Unit
Tamb = 25 C
[1]
tpd
propagation delay
nA to nY; see Figure 6
VCC = 4.5 V
-
-
-
-
-
-
13
11
16
20
5
24
-
ns
ns
ns
ns
ns
pF
VCC = 5 V; CL = 15 pF
[2]
[3]
[4]
[5]
ten
tdis
tt
enable time
disable time
transition time
OEn to nY; VCC = 4.5 V; see Figure 7
OEn to nY; VCC = 4.5 V; see Figure 7
VCC = 4.5 V; see Figure 6
per buffer; VI = GND to (VCC 1.5 V)
35
35
12
-
CPD
power dissipation
capacitance
30
Tamb = 40 C to +85 C
[1]
[2]
[3]
[4]
tpd
ten
tdis
tt
propagation delay
enable time
nA to nY; VCC = 4.5 V; see Figure 6
OEn to nY; VCC = 4.5 V; see Figure 7
OEn to nY; VCC = 4.5 V; see Figure 7
VCC = 4.5 V; see Figure 6
-
-
-
-
-
-
-
-
30
44
44
15
ns
ns
ns
ns
disable time
transition time
Tamb = 40 C to +125 C
[1]
[2]
[3]
[4]
tpd
ten
tdis
tt
propagation delay
enable time
nA to nY; VCC = 4.5 V; see Figure 6
OEn to nY; VCC = 4.5 V; see Figure 7
OEn to nY; VCC = 4.5 V; see Figure 7
VCC = 4.5 V; see Figure 6
-
-
-
-
-
-
-
-
36
53
53
18
ns
ns
ns
ns
disable time
transition time
[1] tpd is the same as tPHL and tPLH
[2] en is the same as tPZH and tPZL
[3] tdis is the same as tPHZ and tPLZ
[4] tt is the same as tTHL and tTLH
[5] PD is used to determine the dynamic power dissipation (PD in W).
.
t
.
.
.
C
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
74HC_HCT366_Q100
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
11 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
11. Waveforms
V
I
nA input
GND
V
V
M
M
t
t
PLH
PHL
V
OH
nY output
V
V
M
M
V
OL
t
t
TLH
THL
001aaf585
Measurement points are given in Table 10.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6.
Propagation delay data input (nA) to output (nY) and output transition time
V
I
V
M
V
M
OEn input
GND
t
t
PZL
PLZ
V
CC
nY output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
nY output
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
001aaf586
Measurement points are given in Table 10.
OL and VOH are typical output voltage levels that occur with the output load.
V
Fig 7. 3-state enable and disable times
Table 10. Measurement points
Type
Input
VM
Output
VM
VX
VY
74HC366-Q100
74HCT366-Q100
0.5VCC
1.3 V
0.5VCC
1.3 V
0.1 VCC
0.1 VCC
0.9 VCC
0.9 VCC
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
12 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
t
W
V
I
90 %
negative
pulse
V
M
V
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
V
M
M
10 %
0 V
t
W
V
CC
V
CC
V
V
O
I
R
L
S1
G
open
DUT
R
T
C
L
001aad983
Test data is given in Table 11.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistor
S1 = Test selection switch
Fig 8. Load circuitry for measuring switching times
Table 11. Test data
Type
Input
VI
Load
S1 position
tPHL, tPLH
open
tr, tf
6 ns
6 ns
CL
RL
tPZH, tPHZ
GND
tPZL, tPLZ
VCC
74HC366-Q100
VCC
15 pF, 50 pF
15 pF, 50 pF
1 k
1 k
74HCT366-Q100 3 V
open
GND
VCC
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
13 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig 9. Package outline SOT109-1 (SO16)
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
14 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig 10. Package outline SOT403-1 (TSSOP16)
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
15 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
13. Abbreviations
Table 12. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
LSTTL
MM
Low-power Schottky Transistor-Transistor Logic
Machine Model
MIL
Military
14. Revision history
Table 13. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HC_HCT366_Q100 v.1 20120807
Product data sheet
-
-
74HC_HCT366_Q100
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
16 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use in automotive applications — This NXP
15.2 Definitions
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT366_Q100
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
17 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74HC_HCT366_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
18 of 19
74HC366-Q100; 74HCT366-Q100
NXP Semiconductors
Hex buffer/line driver; 3-state; inverting
17. Contents
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16
7
8
9
10
11
12
13
14
15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 17
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
15.1
15.2
15.3
15.4
16
17
Contact information. . . . . . . . . . . . . . . . . . . . . 18
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 7 August 2012
Document identifier: 74HC_HCT366_Q100
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