74HCT4016 [NXP]
Quad bilateral switches; 四双边开关
| 型号： | 74HCT4016 |
| 厂家： | 
NXP |
| 描述： | Quad bilateral switches |
| 文件： | 总14页 (文件大小：113K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4016
Quad bilateral switches
December 1990
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
FEATURES
• Low “ON” resistance:
The 74HC/HCT4016 have four independent analog
switches (transmission gates).
160 Ω (typ.) at VCC = 4.5 V
120 Ω (typ.) at VCC = 6.0 V
80 Ω (typ.) at VCC = 9.0 V
Each switch has two input/output terminals (Yn, Zn) and an
active HIGH enable input (En). When En is connected to
VCC, a low bidirectional path between Yn and Zn is
established (ON condition). When En is connected to
ground (GND), the switch is disabled and a high
impedance between Yn and Zn is established (OFF
condition).
• Individual switch controls
• Typical “break before make” built in
• Output capability: non-standard
• ICC category: SSI
Current through a switch will not cause additional
GENERAL DESCRIPTION
V
CC current provided the voltage at the terminals of the
switch is maintained within the supply voltage range;
VCC >> (VY, VZ) >> GND. Inputs Yn and Zn are electrically
equivalent terminals.
The 74HC/HCT4016 are high-speed Si-gate CMOS
devices and are pin compatible with the “4016” of the
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PARAMETER
turn “ON” time En to VOS
CONDITIONS
UNIT
ns
HC
16
HCT
17
tPZH/ tPZL
PHZ/ tPLZ
CL = 15 pF; RL = 1 kΩ;
VCC = 5 V
t
turn “OFF” time En to VOS
input capacitance
14
3.5
12
5
20
3.5
12
5
ns
pF
pF
pF
CI
CPD
CS
power dissipation capacitance per switch
max. switch capacitance
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ { (CL + CS) × VCC2 × fo } where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ {(CL + CS) × VCC2 × fo} = sum of outputs
CL = output load capacitance in pF
CS = max. switch capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
PIN DESCRIPTION
PIN NO.
1, 4, 8, 11
7
SYMBOL
Y0 to Y3
GND
NAME AND FUNCTION
independent inputs/outputs
ground (0 V)
2, 3, 9, 10
13, 5, 6, 12
14
Z0 to Z3
E0 to E3
VCC
independent inputs/outputs
enable inputs (active HIGH)
positive supply voltage
(a)
(b)
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
APPLICATIONS
• Signal gating
• Modulation
• Demodulation
• Chopper
Fig.4 Functional diagram.
FUNCTION TABLE
INPUT
En
CHANNEL
IMPEDANCE
L
H
high
low
Notes
1. H = HIGH voltage level
L = LOW voltage level
Fig.5 Schematic diagram (one switch).
December 1990
4
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to GND (ground = 0 V)
SYMBOL
PARAMETER
MIN.
MAX. UNIT CONDITIONS
VCC
±IIK
±ISK
±IS
DC supply voltage
−0.5
+11.0
20
V
DC digital input diode current
DC switch diode current
DC switch current
mA
mA
mA
mA
°C
for VI < −0.5 V or VI > VCC + 0.5 V
20
for VS < −0.5 V or VS > VCC + 0.5 V
for −0.5 V < VS < VCC + 0.5 V
25
±ICC; ±IGND DC VCC or GND current
50
Tstg
Ptot
storage temperature range
−65
+150
power dissipation per package
for temperature range: −40 to +125 °C
74HC/HCT
plastic DIL
750
500
100
mW
mW
mW
above +70 °C: derate linearly with 12 mW/K
above +70 °C: derate linearly with 8 mW/K
plastic mini-pack (SO)
power dissipation per switch
PS
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER
74HC
74HCT
UNIT
CONDITIONS
min. typ. max. min. typ. max.
VCC
VI
DC supply voltage
2.0
5.0 10.0 4.5
5.0 5.5
V
V
V
DC input voltage range
DC switch voltage range
GND
GND
VCC
VCC
+85
GND VCC
VS
GND
VCC
Tamb
Tamb
operating ambient temperature range −40
operating ambient temperature range −40
−40
+85 °C
see DC and AC
CHARACTERIS-
TICS
+125 −40
+125 °C
1000
V
V
CC = 2.0 V
CC = 4.5 V
tr, tf
input rise and fall times
6.0 500
6.0 500 ns
400
250
VCC = 6.0 V
VCC = 10.0 V
December 1990
5
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
DC CHARACTERISTICS FOR 74HC/HCT
For 74HC: VCC = 2.0, 4.5, 6.0 and 9.0 V
For 74HCT: VCC = 4.5 V
Tamb (°C)
TEST CONDITIONS
74HC/HCT
SYMBOL PARAMETER
UNIT
VCC
IS
Vis
VI
+25
−40 to +85 −40 to +125
(V) (µA)
min. typ. max. min. max. min. max.
RON
RON
RON
∆RON
ON resistance (peak)
ON resistance (rail)
ON resistance (rail)
−
−
−
−
Ω
Ω
Ω
Ω
2.0 100
4.5 1000 to or
6.0 1000 GND VIL
9.0 1000
VCC VIH
160 320
120 240
85
400
300
213
480
360
255
170
160
80
70
−
−
−
Ω
Ω
Ω
Ω
2.0 100
4.5 1000
6.0 1000
9.0 1000
GND VIH
160
140
120
200
175
150
240
210
180
or
VIL
60
170
90
80
−
−
−
Ω
Ω
Ω
Ω
2.0 100
4.5 1000
6.0 1000
9.0 1000
VCC VIH
180
160
135
225
200
170
270
240
205
or
VIL
65
maximum ∆ON
resistance between
any two channels
−
Ω
Ω
Ω
Ω
2.0
4.5
6.0
9.0
VCC VIH
16
12
9
to
or
GND VIL
Notes to the DC Characteristics
1. At supply voltages approaching 2.0 V the analog switch ON-resistance becomes extremely non-linear. Therefore it
is recommended that these devices be used to transmit digital signals only, when using these supply voltages.
2. For test circuit measuring RON see Fig.6.
Fig.6 Test circuit for measuring RON
.
Fig.7 Test circuit for measuring OFF-state current.
December 1990
6
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
Fig.8 Test circuit for measuring ON-state current.
Fig.9 Typical RON as a function of input voltage Vis for Vis = 0 to VCC
.
December 1990
7
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
DC CHARACTERISTICS FOR 74HC
Voltages are referenced to GND (ground = 0 V)
Tamb (°C)
TEST CONDITIONS
OTHER
74HC
SYMBOL PARAMETER
UNIT
VCC
(V)
VI
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
VIH
HIGH level input
voltage
1.5
3.15 2.4
4.2
6.3
1.2
1.5
3.15
4.2
6.3
1.5
3.15
4.2
6.3
V
2.0
4.5
6.0
9.0
3.2
4.3
VIL
LOW level input
voltage
0.8
2.1
2.8
4.3
0.50
1.35
1.80
2.70
0.50
1.35
1.80
2.70
0.50
1.35
1.80
2.70
V
2.0
4.5
6.0
9.0
±II
input leakage
current
0.1
0.2
1.0
2.0
1.0
2.0
µA
µA
µA
6.0 VCC
10.0 or
GND
±IS
±IS
ICC
analog switch
OFF-state current
per channel
0.1
0.1
1.0
1.0
1.0
1.0
10.0 VIH
VS
CC − GND
(see Fig.7)
VS
CC − GND
=
or
VIL
V
analog switch
ON-state current
10.0 VIH
=
or
VIL
V
(see Fig.8)
quiescent supply
current
2.0
4.0
20.0
40.0
40.0 µA
80.0
6.0 VCC
10.0 or
GND
Vis = GND or
VCC; Vos
=
V
CC or GND
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
OTHER
74HC
SYMBOL PARAMETER
UNIT
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t
t
t
PHL/ tPLH propagation
17
6
5
60
12
10
8
75
15
13
10
90
18
15
12
ns
ns
ns
2.0
4.5
6.0
9.0
RL = ∞; CL = 50 pF
(see Fig.16)
delay
Vis to Vos
4
PZH/ tPZL turn “ON” time
En to Vos
52
19
15
11
190
38
32
240
48
41
235
57
48
2.0
4.5
6.0
9.0
RL = 1 kΩ; CL = 50 pF
(see Figs 17 and 18)
28
35
42
PHZ/ tPLZ turn “OFF” time
En to Vos
47
17
14
13
145
29
25
180
36
31
220
44
38
2.0
4.5
6.0
9.0
RL = 1 kΩ; CL = 50 pF
(see Figs 17 and 18)
22
28
33
December 1990
8
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
DC CHARACTERISTICS FOR 74HCT
Voltages are referenced to GND (ground = 0 V)
T
amb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
OTHER
VCC VI
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
VIH
VIL
±II
HIGH level input
voltage
2.0
1.6
2.0
2.0
V
4.5
to
5.5
LOW level input
voltage
1.2 0.8
0.1
0.8
1.0
0.8
1.0
V
4.5
to
5.5
input leakage
current
µA
µA
µA
µA
µA
5.5 VCC
or
GND
±IS
±IS
ICC
∆ICC
analog switch
OFF-state current
per channel
0.1
1.0
1.0
5.5 VIH
VS
CC − GND
(see Fig.7)
VS
CC − GND
=
or
VIL
V
analog switch
ON-state current
0.1
1.0
1.0
5.5 VIH
=
or
VIL
V
(see Fig.8)
quiescent supply
current
2.0
20.0
450
40.0
490
4.5 VCC
Vis = GND or
VCC; Vos =
to
5.5 GND VCC or GND
4.5 VCC other inputs
to
5.5
or
additionalquiescent
supply current per
input pin for unit
load coefficient is 1
(note 1)
100 360
−2.1V at VCC or
GND
Note
1. The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given here.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
EN
UNIT LOAD COEFFICIENT
1.00
December 1990
9
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
T
amb (°C)
TEST CONDITIONS
OTHER
74HCT
SYMBOL PARAMETER
UNIT
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
Vis to Vos
6
12
35
35
35
15
44
44
44
18
53
53
53
ns
ns
ns
ns
4.5 RL = ∞; CL = 50 pF
(see Fig.16)
tPZH
turn “ON” time
En to Vos
19
20
23
4.5 RL = 1 kΩ; CL = 50 pF
(see Figs 17 and 18)
tPZL
turn “ON” time
En to Vos
4.5 RL = 1 kΩ; CL = 50 pF
(see Figs 17 and 18)
t
PHZ/ tPLZ turn “OFF” time
En to Vos
4.5 RL = 1 kΩ; CL = 50 pF
(see Figs 17 and 18)
ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT
Recommended conditions and typical values
GND = 0 V; tr = tf = 6 ns
VCC
(V)
Vis(p-p)
(V)
SYMBOL
PARAMETER
typ.
UNIT
CONDITIONS
sine-wave distortion
f = 1 kHz
0.80
0.40
%
%
4.5
9.0
4.0
8.0
RL = 10 kΩ; CL = 50 pF
(see Fig.14)
sine-wave distortion
f = 10 kHz
2.40
1.20
%
%
4.5
9.0
4.0
8.0
RL = 10 kΩ; CL = 50 pF
(see Fig.14)
switch “OFF” signal
feed-through
−50
−50
dB
dB
4.5
9.0
note 3
RL = 600 Ω; CL = 50 pF;
f = 1 MHz (see Figs 10 and 15)
crosstalk between
any two switches
−60
−60
dB
dB
4.5
9.0
note 3
RL = 600 Ω; CL = 50 pF;
f = 1 MHz (see Fig.12)
V(p-p)
crosstalk voltage between
enable or address input
to any switch
110
220
mV
mV
4.5
9.0
RL = 600 Ω; CL = 50 pF;
f = 1 MHz (En, square wave
between VCC and GND,
tr = tf = 6 ns) (see Fig.13)
(peak-to-peak value)
fmax
minimum frequency response 150
MHz
MHz
4.5
9.0
note 4
RL = 50 Ω; CL = 10 pF
(see Figs 11 and 14)
(−3dB)
160
CS
maximum switch capacitance
5
pF
Notes
1. Vis is the input voltage at a Yn or Zn terminal, whichever is assigned as an input.
2. Vos is the output voltage at a Yn or Zn terminal, whichever is assigned as an output.
3. Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 Ω).
4. Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 Ω).
December 1990
10
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
Test conditions:
VCC = 4.5 V; GND = 0 V;
RL = 50 Ω; Rsource = 1 kΩ.
Fig.10 Typical switch “OFF” signal feed-through as a function of frequency.
Test conditions:
VCC = 4.5 V; GND = 0 V;
RL = 50 Ω; Rsource = 1 kΩ.
Fig.11 Typical frequency response.
December 1990
11
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
Fig.12 Test circuit for measuring crosstalk between any two switches.
(a) channel ON condition; (b) channel OFF condition.
The crosstalk is defined as follows
(oscilloscope output):
Fig.13 Test circuit for measuring crosstalk between control and any switch.
Fig.14 Test circuit for measuring sine-wave distortion and minimum frequency response.
Fig.15 Test circuit for measuring switch “OFF” signal feed-through.
December 1990
12
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.16 Waveforms showing the input (Vis) to output (Vos) propagation delays.
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.17 Waveforms showing the turn-ON and turn-OFF times.
December 1990
13
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4016
TEST CIRCUIT AND WAVEFORMS
Conditions
TEST
tPZH
SWITCH
GND
Vis
VCC
tPZL
tPHZ
tPLZ
others
VCC
GND
VCC
GND
VCC
GND
pulse
open
CL = load capacitance including jig and probe capacitance
(see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output
impedance ZO of the pulse generator.
tr = tf = 6 ns; when measuring fmax, there is no constraint
tr, tf with 50% duty factor.
tr; tf
FAMILY
AMPLITUDE
VM
fmax
;
OTHER
PULSE WIDTH
74HC
74HCT
VCC
3.0 V
50%
1.3 V
< 2 ns
< 2 ns
6 ns
6 ns
Fig.18 Test circuit for measuring AC performance.
CL = load capacitance including jig and probe capacitance
(see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output
impedance ZO of the pulse generator.
tr = tf = 6 ns; when measuring fmax, there is no constraint
tr, tf with 50% duty factor.
tr; tf
FAMILY
AMPLITUDE
VM
fmax
;
OTHER
PULSE WIDTH
74HC
74HCT
VCC
3.0 V
50%
1.3 V
< 2 ns
< 2 ns
6 ns
6 ns
Fig.19 Input pulse definitions.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
14
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