74HCT4051BQ-Q100,1 [NXP]
74HC(T)4051-Q100 - 8-channel analog multiplexer/demultiplexer QFN 16-Pin;
| 型号： | 74HCT4051BQ-Q100,1 |
| 厂家： | 
NXP |
| 描述： | 74HC(T)4051-Q100 - 8-channel analog multiplexer/demultiplexer QFN 16-Pin |
| 文件： | 总31页 (文件大小：325K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC4051-Q100; 74HCT4051-Q100
8-channel analog multiplexer/demultiplexer
Rev. 2 — 8 October 2012
Product data sheet
1. General description
The 74HC4051-Q100; 74HCT4051-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance
with JEDEC standard no. 7A.
The 74HC4051-Q100; 74HCT4051-Q100 is an 8-channel analog
multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable
input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z).
With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2.
With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2.
VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E).
The VCC to GND ranges are 2.0 V to 10.0 V for 74HC4051-Q100 and 4.5 V to 5.5 V for
74HCT4051-Q100. The analog inputs/outputs (Y0 to Y7, and Z) can swing between VCC
as a positive limit and VEE as a negative limit. VCC VEE may not exceed 10.0 V. For
operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically
ground).
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Wide analog input voltage range from 5 V to +5 V
Low ON resistance:
80 (typical) at VCC VEE = 4.5 V
70 (typical) at VCC VEE = 6.0 V
60 (typical) at VCC VEE = 9.0 V
Logic level translation: to enable 5 V logic to communicate with 5 V analog signals
Typical ‘break before make’ built-in
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )
CDM AEC-Q100-011 revision B exceeds 1000 V
Multiple package options
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
3. Applications
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC4051D-Q100
40 C to +125 C
40 C to +125 C
40 C to +125 C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HCT4051D-Q100
74HC4051PW-Q100
74HCT4051PW-Q100
74HC4051BQ-Q100
74HCT4051BQ-Q100
TSSOP16
plastic thin shrink small outline package; 16
leads; body width 4.4 mm
SOT403-1
DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1
very thin quad flat package; no leads; 16
terminals; body 2.5 3.5 0.85 mm
74HC_HCT4051_Q100
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
2 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
5. Functional diagram
V
CC
16
13 Y0
14 Y1
15 Y2
12 Y3
S0 11
S1 10
LOGIC
LEVEL
CONVERSION
1
5
2
4
3
Y4
Y5
Y6
Y7
Z
1-OF-8
DECODER
S2
9
6
E
8
7
GND
V
EE
001aad543
Fig 1. Functional diagram
74HC_HCT4051_Q100
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
3 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
11
0
0
7
10
9
8 X
2
6
G8
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
13
14
15
12
1
S0
11
MUX/DMUX
13
14
15
12
1
0
S1
10
1
2
3
4
5
6
S2
9
3
5
5
2
E
6
2
4
3
4
7
Z
001aad541
001aad542
Fig 2. Logic symbol
Fig 3. IEC logic symbol
Y
V
CC
V
EE
V
CC
V
CC
V
V
EE
CC
V
EE
Z
from
logic
001aad544
Fig 4. Schematic diagram (one switch)
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
4 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
74HC4051-Q100
74HCT4051-Q100
terminal 1
index area
74HC4051-Q100
74HCT4051-Q100
2
3
4
5
6
7
15
14
13
12
11
10
Y6
Z
Y2
Y1
Y0
Y3
S0
S1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Y4
Y6
Z
V
CC
Y7
Y5
E
Y2
Y1
Y0
Y3
S0
S1
S2
Y7
Y5
E
(1)
CC
V
V
EE
V
EE
aaa-003161
GND
Transparent top view
aaa-003160
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to VCC.
Fig 5. Pin configuration SO16 and TSSOP16
Fig 6. Pin configuration DHVQFN16
6.2 Pin description
Table 2.
Symbol
E
Pin description
Pin
Description
6
enable input (active LOW)
supply voltage
VEE
7
GND
8
ground supply voltage
select input
S0, S1, S2
11, 10, 9
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 13, 14, 15, 12, 1, 5, 2, 4 independent input or output
Z
3
common output or input
supply voltage
VCC
16
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
5 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
7. Functional description
7.1 Function table
Table 3.
Function table[1]
Input
Channel ON
E
L
L
L
L
L
L
L
L
H
S2
L
S1
L
S0
L
Y0 to Z
Y1 to Z
Y2 to Z
Y3 to Z
Y4 to Z
Y5 to Z
Y6 to Z
Y7 to Z
switches off
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
X
L
H
L
H
H
X
H
X
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max
+11.0
20
20
25
20
50
Unit
V
[1]
supply voltage
0.5
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
-
mA
mA
mA
mA
mA
mA
C
ISK
switch clamping current VSW < 0.5 V or VSW > VCC + 0.5 V
-
ISW
IEE
switch current
0.5 V < VSW < VCC + 0.5 V
-
supply current
-
ICC
supply current
-
IGND
Tstg
Ptot
P
ground current
-
50
+150
500
100
storage temperature
total power dissipation
power dissipation
65
[2]
-
-
mW
mW
per switch
[1] To avoid drawing VCC current out of terminal Z, when switch current flows into terminals Yn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn, and in this case
there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or VEE
.
[2] For SO16 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For TSSOP16 package: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K.
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
6 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
9. Recommended operating conditions
Table 5.
Symbol
Recommended operating conditions
Parameter
Conditions
74HC4051-Q100
74HCT4051-Q100
Unit
Min
Typ
Max
Min
Typ
Max
VCC
supply voltage
see Figure 7
and Figure 8
VCC GND
VCC VEE
2.0
5.0
10.0
10.0
VCC
VCC
+125
625
139
83
4.5
5.0
5.5
10.0
VCC
VCC
V
V
V
V
2.0
5.0
2.0
5.0
VI
input voltage
GND
-
GND
-
VSW
Tamb
t/V
switch voltage
VEE
-
VEE
-
ambient temperature
40
+25
40
+25
+125 C
input transition rise and fall
rate
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 10.0 V
-
-
-
-
-
-
-
-
-
-
-
ns/V
1.67
1.67
139
ns/V
ns/V
ns/V
-
-
-
-
-
-
31
001aad545
001aad546
10
10
V
CC
− GND
(V)
V
− GND
CC
(V)
8
6
4
2
8
6
4
2
operating area
operating area
0
0
0
0
2
4
6
8
CC
10
2
4
6
8
CC
10
− V (V)
V
− V (V)
V
EE
EE
Fig 7. Guaranteed operating area as a function of the
supply voltages for 74HC4051-Q100
Fig 8. Guaranteed operating area as a function of the
supply voltages for 74HCT4051-Q100
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
7 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
10. Static characteristics
Table 6.
RON resistance per switch for 74HC4051-Q100 and 74HCT4051-Q100
VI = VIH or VIL; for test circuit see Figure 9.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
For 74HC4051-Q100: VCC GND or VCC VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V.
For 74HCT4051-Q100: VCC GND = 4.5 V and 5.5 V, VCC VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V.
Symbol Parameter
Tamb = 25 C
Conditions
Min
Typ
Max
Unit
RON(peak) ON resistance (peak)
Vis = VCC to VEE
[1]
[1]
[1]
[1]
VCC = 2.0 V; VEE = 0 V; ISW = 100 A
VCC = 4.5 V; VEE = 0 V; ISW = 1000 A
VCC = 6.0 V; VEE = 0 V; ISW = 1000 A
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A
Vis = VEE
-
-
-
-
-
-
100
90
70
180
160
130
RON(rail) ON resistance (rail)
VCC = 2.0 V; VEE = 0 V; ISW = 100 A
VCC = 4.5 V; VEE = 0 V; ISW = 1000 A
VCC = 6.0 V; VEE = 0 V; ISW = 1000 A
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A
Vis = VCC
-
-
-
-
150
80
-
140
120
105
70
60
VCC = 2.0 V; VEE = 0 V; ISW = 100 A
VCC = 4.5 V; VEE = 0 V; ISW = 1000 A
VCC = 6.0 V; VEE = 0 V; ISW = 1000 A
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A
Vis = VCC to VEE
-
-
-
-
150
90
-
160
140
120
80
65
RON
ON resistance mismatch
between channels
VCC = 2.0 V; VEE = 0 V
-
-
-
-
-
-
-
-
-
VCC = 4.5 V; VEE = 0 V
9
8
6
VCC = 6.0 V; VEE = 0 V
VCC = 4.5 V; VEE = 4.5 V
Tamb = 40 C to +85 C
RON(peak) ON resistance (peak)
Vis = VCC to VEE
[1]
VCC = 2.0 V; VEE = 0 V; ISW = 100 A
VCC = 4.5 V; VEE = 0 V; ISW = 1000 A
VCC = 6.0 V; VEE = 0 V; ISW = 1000 A
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A
-
-
-
-
-
-
-
-
-
225
200
165
74HC_HCT4051_Q100
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
8 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
Table 6.
RON resistance per switch for 74HC4051-Q100 and 74HCT4051-Q100 …continued
VI = VIH or VIL; for test circuit see Figure 9.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
V
For 74HC4051-Q100: VCC GND or VCC VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V.
For 74HCT4051-Q100: VCC GND = 4.5 V and 5.5 V, VCC VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
RON(rail) ON resistance (rail)
Vis = VEE
[1]
VCC = 2.0 V; VEE = 0 V; ISW = 100 A
VCC = 4.5 V; VEE = 0 V; ISW = 1000 A
VCC = 6.0 V; VEE = 0 V; ISW = 1000 A
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A
Vis = VCC
-
-
-
-
-
-
-
-
-
175
150
130
[1]
VCC = 2.0 V; VEE = 0 V; ISW = 100 A
VCC = 4.5 V; VEE = 0 V; ISW = 1000 A
VCC = 6.0 V; VEE = 0 V; ISW = 1000 A
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A
-
-
-
-
-
-
-
-
-
200
175
150
Tamb = 40 C to +125 C
RON(peak) ON resistance (peak)
Vis = VCC to VEE
[1]
[1]
[1]
VCC = 2.0 V; VEE = 0 V; ISW = 100 A
VCC = 4.5 V; VEE = 0 V; ISW = 1000 A
VCC = 6.0 V; VEE = 0 V; ISW = 1000 A
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A
Vis = VEE
-
-
-
-
-
-
-
-
-
270
240
195
RON(rail) ON resistance (rail)
VCC = 2.0 V; VEE = 0 V; ISW = 100 A
VCC = 4.5 V; VEE = 0 V; ISW = 1000 A
VCC = 6.0 V; VEE = 0 V; ISW = 1000 A
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A
Vis = VCC
-
-
-
-
-
-
-
-
-
210
180
160
VCC = 2.0 V; VEE = 0 V; ISW = 100 A
VCC = 4.5 V; VEE = 0 V; ISW = 1000 A
VCC = 6.0 V; VEE = 0 V; ISW = 1000 A
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A
-
-
-
-
-
-
-
-
-
240
210
180
[1] When supply voltages (VCC VEE) near 2.0 V the analog switch ON resistance becomes extremely non-linear. When using a supply of
2 V, it is recommended to use these devices only for transmitting digital signals.
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
9 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
mnb047
110
(1)
R
ON
(Ω)
90
70
50
30
10
(2)
(3)
V
sw
V
V
V
CC
from select
input
Sn
Yn
Z
GND
EE
V
I
sw
is
0
1.8
3.6
5.4
7.2
9.0
V
(V)
is
001aan389
Vis = 0 V to (VCC VEE).
Vis = 0 V to (VCC VEE).
VCC = 4.5 V
(1)
Vsw
RON
=
--------
(2) VCC = 6 V
(3) VCC = 9 V
Isw
Fig 9. Test circuit for measuring RON
Fig 10. Typical RON as a function of input voltage Vis
Table 7.
Static characteristics for 74HC4051-Q100
Voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at pins Yn or Z, whichever is assigned as an input.
Vos is the output voltage at pins Z or Yn, whichever is assigned as an output.
Symbol
Tamb = 25 C
VIH
Parameter
Conditions
Min
Typ
Max
Unit
HIGH-level input
voltage
VCC = 2.0 V
1.5
1.2
2.4
3.2
4.7
0.8
2.1
2.8
4.3
-
V
V
V
V
V
V
V
V
VCC = 4.5 V
3.15
-
VCC = 6.0 V
4.2
-
VCC = 9.0 V
6.3
-
VIL
LOW-level input
voltage
VCC = 2.0 V
-
-
-
-
0.5
1.35
1.8
2.7
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
II
input leakage current
VEE = 0 V; VI = VCC or GND
VCC = 6.0 V
-
-
-
-
0.1
0.2
A
A
VCC = 10.0 V
IS(OFF)
OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL;
VSW = VCC VEE; see Figure 11
per channel
all channels
-
-
-
-
-
-
0.1
0.4
0.4
A
A
A
IS(ON)
ON-state leakage
current
VI = VIH or VIL; VSW = VCC VEE;
VCC = 10.0 V; VEE = 0 V; see Figure 12
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
10 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
Table 7.
Static characteristics for 74HC4051-Q100 …continued
Voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at pins Yn or Z, whichever is assigned as an input.
V
os is the output voltage at pins Z or Yn, whichever is assigned as an output.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
ICC
supply current
VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC
Vos = VCC or VEE
;
VCC = 6.0 V
-
-
-
-
-
-
8.0
A
A
pF
pF
pF
VCC = 10.0 V
-
16.0
CI
input capacitance
switch capacitance
3.5
5
-
-
-
Csw
independent pins Yn
common pins Z
25
Tamb = 40 C to +85 C
VIH HIGH-level input
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
voltage
VCC = 4.5 V
3.15
-
VCC = 6.0 V
4.2
-
VCC = 9.0 V
6.3
-
VIL
LOW-level input
voltage
VCC = 2.0 V
-
-
-
-
0.5
1.35
1.8
2.7
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
II
input leakage current
VEE = 0 V; VI = VCC or GND
VCC = 6.0 V
-
-
-
-
1.0
2.0
A
A
VCC = 10.0 V
IS(OFF)
OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL;
VSW = VCC VEE; see Figure 11
per channel
all channels
-
-
-
-
-
-
1.0
4.0
4.0
A
A
A
IS(ON)
ICC
ON-state leakage
current
VI = VIH or VIL; VSW = VCC VEE;
VCC = 10.0 V; VEE = 0 V; see Figure 12
supply current
VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC
Vos = VCC or VEE
;
VCC = 6.0 V
-
-
-
-
80.0
A
A
VCC = 10.0 V
160.0
Tamb = 40 C to +125 C
VIH
HIGH-level input
voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
1.5
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
3.15
-
4.2
-
6.3
-
VIL
LOW-level input
voltage
-
-
-
-
0.5
1.35
1.8
2.7
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
11 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
Table 7.
Static characteristics for 74HC4051-Q100 …continued
Voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at pins Yn or Z, whichever is assigned as an input.
V
os is the output voltage at pins Z or Yn, whichever is assigned as an output.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
II
input leakage current
VEE = 0 V; VI = VCC or GND
VCC = 6.0 V
-
-
-
-
1.0
2.0
A
A
VCC = 10.0 V
IS(OFF)
OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL;
VSW = VCC VEE; see Figure 11
per channel
all channels
-
-
-
-
-
-
1.0
4.0
4.0
A
A
A
IS(ON)
ICC
ON-state leakage
current
VI = VIH or VIL; VSW = VCC VEE;
VCC = 10.0 V; VEE = 0 V; see Figure 12
supply current
VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC;
Vos = VCC or VEE
VCC = 6.0 V
-
-
-
-
160.0
320.0
A
A
VCC = 10.0 V
Table 8.
Static characteristics for 74HCT4051-Q100
Voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at pins Yn or Z, whichever is assigned as an input.
Vos is the output voltage at pins Z or Yn, whichever is assigned as an output.
Symbol
Tamb = 25 C
VIH
Parameter
Conditions
Min
Typ
Max
Unit
HIGH-level input
voltage
VCC = 4.5 V to 5.5 V
2.0
1.6
1.2
-
-
V
VIL
LOW-level input
voltage
VCC = 4.5 V to 5.5 V
-
-
0.8
0.1
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V; VEE = 0 V
A
IS(OFF)
OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL;
VSW = VCC VEE; see Figure 11
per channel
all channels
-
-
-
-
-
-
0.1
0.4
0.4
A
A
A
IS(ON)
ICC
ON-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL;
VSW = VCC VEE; see Figure 12
supply current
VI = VCC or GND; Vis = VEE or VCC;
Vos = VCC or VEE
VCC = 5.5 V; VEE = 0 V
VCC = 5.0 V; VEE = 5.0 V
-
-
-
-
8.0
A
A
A
-
16.0
180
ICC
additional supply
current
per input; VI = VCC 2.1 V; other inputs at VCC
50
or GND; VCC = 4.5 V to 5.5 V; VEE = 0 V
CI
input capacitance
switch capacitance
-
-
-
3.5
5
-
-
-
pF
pF
pF
Csw
independent pins Yn
common pins Z
25
74HC_HCT4051_Q100
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
12 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
Table 8.
Static characteristics for 74HCT4051-Q100 …continued
Voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at pins Yn or Z, whichever is assigned as an input.
V
os is the output voltage at pins Z or Yn, whichever is assigned as an output.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 40 C to +85 C
VIH
VIL
HIGH-level input
voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
LOW-level input
voltage
VCC = 4.5 V to 5.5 V
-
-
0.8
1.0
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V; VEE = 0 V
A
IS(OFF)
OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL;
VSW = VCC VEE; see Figure 11
per channel
all channels
-
-
-
-
-
-
1.0
4.0
4.0
A
A
A
IS(ON)
ICC
ON-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL;
VSW = VCC VEE; see Figure 12
supply current
VI = VCC or GND; Vis = VEE or VCC
;
Vos = VCC or VEE
VCC = 5.5 V; VEE = 0 V
-
-
-
-
-
-
80.0
160.0
225
A
A
A
VCC = 5.0 V; VEE = 5.0 V
ICC
additional supply
current
per input; VI = VCC 2.1 V; other inputs at VCC
or GND; VCC = 4.5 V to 5.5 V; VEE = 0 V
T
amb = 40 C to +125 C
VIH
HIGH-level input
voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
VIL
LOW-level input
voltage
VCC = 4.5 V to 5.5 V
-
-
0.8
1.0
V
II
input leakage current
VI = VCC or GND; VCC = 5.5 V; VEE = 0 V
A
IS(OFF)
OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL;
VSW = VCC VEE; see Figure 11
per channel
all channels
-
-
-
-
-
-
1.0
4.0
4.0
A
A
A
IS(ON)
ICC
ON-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL;
VSW = VCC VEE; see Figure 12
supply current
VI = VCC or GND; Vis = VEE or VCC;
Vos = VCC or VEE
VCC = 5.5 V; VEE = 0 V
VCC = 5.0 V; VEE = 5.0 V
-
-
-
-
-
-
160.0
320.0
245
A
A
A
ICC
additional supply
current
per input; VI = VCC 2.1 V; other inputs at VCC
or GND; VCC = 4.5 V to 5.5 V; VEE = 0 V
74HC_HCT4051_Q100
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
13 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
V
CC
from select
input
Sn
I
I
sw
A
sw
A
nYn
nZ
GND
V
EE
V
V
os
is
001aah827
Vis = VCC and Vos = VEE
.
.
Vis = VEE and Vos = VCC
Fig 11. Test circuit for measuring OFF-state current
V
V
CC
HIGH
from select
Sn
nYn
I
sw
A
input
nZ
V
os
GND
EE
V
is
001aah828
Vis = VCC and Vos = open-circuit.
Vis = VEE and Vos = open-circuit.
Fig 12. Test circuit for measuring ON-state current
11. Dynamic characteristics
Table 9.
Dynamic characteristics for 74HC4051-Q100
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 C
[1]
tpd
propagation delay Vis to Vos; RL = ; see Figure 13
VCC = 2.0 V; VEE = 0 V
-
-
-
-
14
5
60
12
10
8
ns
ns
ns
ns
VCC = 4.5 V; VEE = 0 V
VCC = 6.0 V; VEE = 0 V
4
VCC = 4.5 V; VEE = 4.5 V
4
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
14 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
Table 9.
Dynamic characteristics for 74HC4051-Q100 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
V
os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
ton turn-on time
Conditions
Min
Typ
Max
Unit
[2]
[2]
[3]
[3]
E to Vos; RL = ; see Figure 14
VCC = 2.0 V; VEE = 0 V
-
-
-
-
-
72
29
22
21
18
345
69
-
ns
ns
ns
ns
ns
VCC = 4.5 V; VEE = 0 V
VCC = 5.0 V; VEE = 0 V; CL = 15 pF
VCC = 6.0 V; VEE = 0 V
59
51
VCC = 4.5 V; VEE = 4.5 V
Sn to Vos; RL = ; see Figure 14
VCC = 2.0 V; VEE = 0 V
-
-
-
-
-
66
28
20
19
16
345
69
-
ns
ns
ns
ns
ns
VCC = 4.5 V; VEE = 0 V
VCC = 5.0 V; VEE = 0 V; CL = 15 pF
VCC = 6.0 V; VEE = 0 V
59
51
VCC = 4.5 V; VEE = 4.5 V
E to Vos; RL = 1 k; see Figure 14
VCC = 2.0 V; VEE = 0 V
toff
turn-off time
-
-
-
-
-
58
31
18
17
18
290
58
-
ns
ns
ns
ns
ns
VCC = 4.5 V; VEE = 0 V
VCC = 5.0 V; VEE = 0 V; CL = 15 pF
VCC = 6.0 V; VEE = 0 V
49
42
VCC = 4.5 V; VEE = 4.5 V
Sn to Vos; RL = 1 k; see Figure 14
VCC = 2.0 V; VEE = 0 V
-
-
-
-
-
-
61
25
19
18
18
25
290
58
-
ns
ns
ns
ns
ns
pF
VCC = 4.5 V; VEE = 0 V
VCC = 5.0 V; VEE = 0 V; CL = 15 pF
VCC = 6.0 V; VEE = 0 V
49
42
-
VCC = 4.5 V; VEE = 4.5 V
[4]
[1]
CPD
power dissipation per switch; VI = GND to VCC
capacitance
Tamb = 40 C to +85 C
tpd
propagation delay Vis to Vos; RL = ; see Figure 13
VCC = 2.0 V; VEE = 0 V
VCC = 4.5 V; VEE = 0 V
VCC = 6.0 V; VEE = 0 V
VCC = 4.5 V; VEE = 4.5 V
-
-
-
-
-
-
-
-
75
15
13
10
ns
ns
ns
ns
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
15 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
Table 9.
Dynamic characteristics for 74HC4051-Q100 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
V
os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
ton turn-on time
Conditions
Min
Typ
Max
Unit
[2]
[2]
[3]
[3]
E to Vos; RL = ; see Figure 14
VCC = 2.0 V; VEE = 0 V
-
-
-
-
-
-
-
-
430
86
ns
ns
ns
ns
VCC = 4.5 V; VEE = 0 V
VCC = 6.0 V; VEE = 0 V
73
VCC = 4.5 V; VEE = 4.5 V
Sn to Vos; RL = ; see Figure 14
VCC = 2.0 V; VEE = 0 V
64
-
-
-
-
-
-
-
-
430
86
ns
ns
ns
ns
VCC = 4.5 V; VEE = 0 V
VCC = 6.0 V; VEE = 0 V
73
VCC = 4.5 V; VEE = 4.5 V
E to Vos; RL = 1 k; see Figure 14
VCC = 2.0 V; VEE = 0 V
64
toff
turn-off time
-
-
-
-
-
-
-
-
365
73
ns
ns
ns
ns
VCC = 4.5 V; VEE = 0 V
VCC = 6.0 V; VEE = 0 V
62
VCC = 4.5 V; VEE = 4.5 V
Sn to Vos; RL = 1 k; see Figure 14
VCC = 2.0 V; VEE = 0 V
53
-
-
-
-
-
-
-
-
365
73
ns
ns
ns
ns
VCC = 4.5 V; VEE = 0 V
VCC = 6.0 V; VEE = 0 V
62
VCC = 4.5 V; VEE = 4.5 V
53
Tamb = 40 C to +125 C
[1]
[2]
[2]
tpd
propagation delay Vis to Vos; RL = ; see Figure 13
VCC = 2.0 V; VEE = 0 V
-
-
-
-
-
-
-
-
90
18
15
12
ns
ns
ns
ns
VCC = 4.5 V; VEE = 0 V
VCC = 6.0 V; VEE = 0 V
VCC = 4.5 V; VEE = 4.5 V
ton
turn-on time
E to Vos; RL = ; see Figure 14
VCC = 2.0 V; VEE = 0 V
-
-
-
-
-
-
-
-
520
104
88
ns
ns
ns
ns
VCC = 4.5 V; VEE = 0 V
VCC = 6.0 V; VEE = 0 V
VCC = 4.5 V; VEE = 4.5 V
Sn to Vos; RL = ; see Figure 14
VCC = 2.0 V; VEE = 0 V
77
-
-
-
-
-
-
-
-
520
104
88
ns
ns
ns
ns
VCC = 4.5 V; VEE = 0 V
VCC = 6.0 V; VEE = 0 V
VCC = 4.5 V; VEE = 4.5 V
77
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
16 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
Table 9.
Dynamic characteristics for 74HC4051-Q100 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
V
os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
toff turn-off time
Conditions
Min
Typ
Max
Unit
[3]
E to Vos; RL = 1 k; see Figure 14
VCC = 2.0 V; VEE = 0 V
VCC = 4.5 V; VEE = 0 V
VCC = 6.0 V; VEE = 0 V
VCC = 4.5 V; VEE = 4.5 V
Sn to Vos; RL = 1 k; see Figure 14
VCC = 2.0 V; VEE = 0 V
VCC = 4.5 V; VEE = 0 V
VCC = 6.0 V; VEE = 0 V
VCC = 4.5 V; VEE = 4.5 V
-
-
-
-
-
-
-
-
435
87
ns
ns
ns
ns
74
72
[3]
-
-
-
-
-
-
-
-
435
87
ns
ns
ns
ns
74
72
[1] tpd is the same as tPHL and tPLH
.
[2]
ton is the same as tPZH and tPZL
.
[3] toff is the same as tPHZ and tPLZ
.
[4] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + {(CL + Csw) VCC2 fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
N = number of inputs switching;
{(CL + Csw) VCC2 fo} = sum of outputs;
CL = output load capacitance in pF;
Csw = switch capacitance in pF;
VCC = supply voltage in V.
Table 10. Dynamic characteristics for 74HCT4051-Q100
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 C
[1]
tpd
propagation delay Vis to Vos; RL = ; see Figure 13
VCC = 4.5 V; VEE = 0 V
-
-
5
4
12
8
ns
ns
VCC = 4.5 V; VEE = 4.5 V
[2]
[2]
ton
turn-on time
E to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
-
-
-
26
22
16
55
-
ns
ns
ns
VCC = 5.0 V; VEE = 0 V; CL = 15 pF
VCC = 4.5 V; VEE = 4.5 V
39
Sn to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
-
-
-
28
24
16
55
-
ns
ns
ns
VCC = 5.0 V; VEE = 0 V; CL = 15 pF
VCC = 4.5 V; VEE = 4.5 V
39
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
17 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
Table 10. Dynamic characteristics for 74HCT4051-Q100 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
V
os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
toff turn-off time
Conditions
Min
Typ
Max
Unit
[3]
[3]
E to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
-
-
-
19
16
16
45
-
ns
ns
ns
VCC = 5.0 V; VEE = 0 V; CL = 15 pF
VCC = 4.5 V; VEE = 4.5 V
Sn to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
32
-
-
-
-
23
20
16
25
45
-
ns
ns
ns
pF
VCC = 5.0 V; VEE = 0 V; CL = 15 pF
VCC = 4.5 V; VEE = 4.5 V
32
-
[4]
[1]
CPD
power dissipation per switch; VI = GND to VCC 1.5 V
capacitance
T
amb = 40 C to +85 C
tpd
propagation delay Vis to Vos; RL = ; see Figure 13
VCC = 4.5 V; VEE = 0 V
-
-
-
-
15
10
ns
ns
VCC = 4.5 V; VEE = 4.5 V
[2]
[2]
[3]
[3]
ton
turn-on time
E to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
-
-
-
-
69
49
ns
ns
VCC = 4.5 V; VEE = 4.5 V
Sn to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
-
-
-
-
69
49
ns
ns
VCC = 4.5 V; VEE = 4.5 V
E to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
toff
turn-off time
-
-
-
-
56
40
ns
ns
VCC = 4.5 V; VEE = 4.5 V
Sn to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
-
-
-
-
56
40
ns
ns
VCC = 4.5 V; VEE = 4.5 V
Tamb = 40 C to +125 C
[1]
[2]
[2]
tpd
propagation delay Vis to Vos; RL = ; see Figure 13
VCC = 4.5 V; VEE = 0 V
-
-
-
-
18
12
ns
ns
VCC = 4.5 V; VEE = 4.5 V
ton
turn-on time
E to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
-
-
-
-
83
59
ns
ns
VCC = 4.5 V; VEE = 4.5 V
Sn to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
-
-
-
-
83
59
ns
ns
VCC = 4.5 V; VEE = 4.5 V
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
18 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
Table 10. Dynamic characteristics for 74HCT4051-Q100 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
V
os is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
toff turn-off time
Conditions
Min
Typ
Max
Unit
[3]
[3]
E to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
-
-
-
-
68
48
ns
ns
VCC = 4.5 V; VEE = 4.5 V
Sn to Vos; RL = 1 k; see Figure 14
VCC = 4.5 V; VEE = 0 V
-
-
-
-
68
48
ns
ns
VCC = 4.5 V; VEE = 4.5 V
[1] tpd is the same as tPHL and tPLH
.
[2]
ton is the same as tPZH and tPZL
.
[3] toff is the same as tPHZ and tPLZ
.
[4] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + {(CL + Csw) VCC2 fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
N = number of inputs switching;
{(CL + Csw) VCC2 fo} = sum of outputs;
CL = output load capacitance in pF;
Csw = switch capacitance in pF;
VCC = supply voltage in V.
50 %
V
is
input
t
t
PLH
PHL
50 %
V
output
os
001aad555
Fig 13. Input (Vis) to output (Vos) propagation delays
74HC_HCT4051_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 8 October 2012
19 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
V
I
V
M
E, Sn inputs
0 V
t
t
PZL
PLZ
50 %
V
output
output
os
10 %
t
t
PHZ
PZH
90 %
50 %
V
os
switch ON
switch OFF
switch ON
001aad556
For 74HC4051-Q100: VM = 0.5 VCC
.
For 74HCT4051-Q100: VM = 1.3 V.
Fig 14. Turn-on and turn-off times
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
V
V
CC
is
CC
V
V
os
I
S1
R
L
PULSE
GENERATOR
open
DUT
R
T
C
L
GND
V
EE
001aae382
Definitions for test circuit; see Table 11:
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
RL = load resistance.
S1 = Test selection switch.
Fig 15. Test circuit for measuring AC performance
74HC_HCT4051_Q100
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Product data sheet
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74HC4051-Q100; 74HCT4051-Q100
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8-channel analog multiplexer/demultiplexer
Table 11. Test data
Test
Input
VI
Load
CL
S1 position
Vis
tr, tf
RL
at fmax
< 2 ns
< 2 ns
< 2 ns
other[1]
6 ns
[2]
[2]
[2]
tPHL, tPLH
tPZH, tPHZ
tPZL, tPLZ
pulse
VCC
50 pF
50 pF
50 pF
1 k
1 k
1 k
open
VEE
6 ns
VEE
6 ns
VCC
[1] tr = tf = 6 ns; when measuring fmax, there is no constraint to tr and tf with 50 % duty factor.
[2] VI values:
a) For 74HC4051-Q100: VI = VCC
b) For 74HCT4051-Q100: VI = 3 V
74HC_HCT4051_Q100
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74HC4051-Q100; 74HCT4051-Q100
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8-channel analog multiplexer/demultiplexer
11.1 Additional dynamic characteristics
Table 12. Additional dynamic characteristics
Recommended conditions and typical values; GND = 0 V; Tamb = 25 C; CL = 50 pF.
Vis is the input voltage at pins nYn or nZ, whichever is assigned as an input.
Vos is the output voltage at pins nYn or nZ, whichever is assigned as an output.
Symbol
Parameter
Conditions
Min Typ Max Unit
dsin
sine-wave distortion
fi = 1 kHz; RL = 10 k; see Figure 16
Vis = 4.0 V (p-p); VCC = 2.25 V; VEE = 2.25 V
Vis = 8.0 V (p-p); VCC = 4.5 V; VEE = 4.5 V
fi = 10 kHz; RL = 10 k; see Figure 16
Vis = 4.0 V (p-p); VCC = 2.25 V; VEE = 2.25 V
Vis = 8.0 V (p-p); VCC = 4.5 V; VEE = 4.5 V
RL = 600 ; fi = 1 MHz; see Figure 17
VCC = 2.25 V; VEE = 2.25 V
-
-
0.04
0.02
-
-
%
%
-
-
0.12
0.06
-
-
%
%
iso
isolation (OFF-state)
crosstalk voltage
[1]
[1]
-
-
50
50
-
-
dB
dB
VCC = 4.5 V; VEE = 4.5 V
Vct
peak-to-peak value; between control and any
switch; RL = 600 ; fi = 1 MHz; E or Sn square
wave between VCC and GND; tr = tf = 6 ns;
see Figure 18
VCC = 4.5 V; VEE = 0 V
VCC = 4.5 V; VEE = 4.5 V
RL = 50 ; see Figure 19
VCC = 2.25 V; VEE = 2.25 V
VCC = 4.5 V; VEE = 4.5 V
-
-
110
220
-
-
mV
mV
f(3dB)
3 dB frequency response
[2]
[2]
-
-
170
180
-
-
MHz
MHz
[1] Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 ).
[2] Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 ).
V
CC
Sn
10 μF
Yn/Z
Z/Yn
GND
V
V
os
is
V
EE
R
L
C
L
dB
001aan385
Fig 16. Test circuit for measuring sine-wave distortion
74HC_HCT4051_Q100
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Product data sheet
Rev. 2 — 8 October 2012
22 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
V
CC
Sn
0.1 μF
Yn/Z
Z/Yn
GND
V
V
os
is
V
EE
R
L
C
L
dB
001aan386
VCC = 4.5 V; GND = 0 V; VEE = 4.5 V; RL = 600 ; RS = 1 k.
a. Test circuit
001aae332
0
α
iso
(dB)
−20
−40
−60
−80
−100
2
3
4
5
6
10
10
10
10
10
10
f (kHz)
i
b. Isolation (OFF-state) as a function of frequency
Fig 17. Test circuit for measuring isolation (OFF-state)
2R
2R
2R
L
L
V
CC
Sn, E
Yn
V
ct
Z
G
V
GND
EE
2R
L
oscilloscope
L
001aan387
Fig 18. Test circuit for measuring crosstalk between control input and any switch
74HC_HCT4051_Q100
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Product data sheet
Rev. 2 — 8 October 2012
23 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
V
CC
Sn
10 μF
Yn/Z
Z/Yn
GND
V
V
os
is
V
EE
R
L
C
L
dB
001aan385
VCC = 4.5 V; GND = 0 V; VEE = 4.5 V; RL = 50 ; RS = 1 k.
a. Test circuit
001aad551
5
V
os
(dB)
3
1
−1
−3
−5
2
3
4
5
6
10
10
10
10
10
10
f (kHz)
b. Typical frequency response
Fig 19. Test circuit for frequency response
74HC_HCT4051_Q100
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Product data sheet
Rev. 2 — 8 October 2012
24 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig 20. Package outline SOT109-1 (SO16)
74HC_HCT4051_Q100
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Product data sheet
Rev. 2 — 8 October 2012
25 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig 21. Package outline SOT403-1 (TSSOP16)
74HC_HCT4051_Q100
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Product data sheet
Rev. 2 — 8 October 2012
26 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
SOT763-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
7
L
1
8
9
E
h
e
16
15
10
D
h
X
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
b
c
E
e
e
y
D
D
E
L
v
w
y
1
1
h
1
h
max.
0.05 0.30
0.00 0.18
3.6
3.4
2.15
1.85
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
2.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT763-1
- - -
MO-241
- - -
Fig 22. Package outline SOT763-1 (DHVQFN16)
74HC_HCT4051_Q100
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Product data sheet
Rev. 2 — 8 October 2012
27 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
13. Abbreviations
Table 13. Abbreviations
Acronym
CMOS
ESD
Description
Complementary Metal-Oxide Semiconductor
ElectroStatic Discharge
Human Body Model
Machine Model
HBM
MM
TTL
Transistor-Transistor Logic
Military
MIL
14. Revision history
Table 14. Revision history
Document ID
Release date Data sheet status
Change notice
Supersedes
74HC_HCT4051_Q100 v.2 20121008
Product data sheet
-
74HC_HCT4051_Q100 v.1
Modifications:
• CDM added to features.
74HC_HCT4051_Q100 v.1 20120709
Product data sheet
-
-
74HC_HCT4051_Q100
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Product data sheet
Rev. 2 — 8 October 2012
28 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use in automotive applications — This NXP
15.2 Definitions
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT4051_Q100
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Product data sheet
Rev. 2 — 8 October 2012
29 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74HC_HCT4051_Q100
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Product data sheet
Rev. 2 — 8 October 2012
30 of 31
74HC4051-Q100; 74HCT4051-Q100
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
17. Contents
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 5
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7
7.1
8
Functional description . . . . . . . . . . . . . . . . . . . 6
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended operating conditions. . . . . . . . 7
Static characteristics. . . . . . . . . . . . . . . . . . . . . 8
Dynamic characteristics . . . . . . . . . . . . . . . . . 14
Additional dynamic characteristics . . . . . . . . . 22
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 25
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 28
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 28
9
10
11
11.1
12
13
14
15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 29
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 29
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 30
15.1
15.2
15.3
15.4
16
17
Contact information. . . . . . . . . . . . . . . . . . . . . 30
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 8 October 2012
Document identifier: 74HC_HCT4051_Q100
相关型号：
74HCT4051D-T
IC 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT-109-1, SOP-16, Multiplexer or Switch
NXP
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