74HCT4352N [NXP]
IC 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDIP20, PLASTIC, DIP-20, Multiplexer or Switch;
| 型号： | 74HCT4352N |
| 厂家： | 
NXP |
| 描述： | IC 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDIP20, PLASTIC, DIP-20, Multiplexer or Switch 复用器 |
| 文件： | 总16页 (文件大小：126K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4352
Dual 4-channel analog
multiplexer/demultiplexer with latch
December 1990
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
Each multiplexer has four independent inputs/outputs
(nY0 to nY3) and a common input/output (nZ).
FEATURES
• Wide analog input voltage range: ± 5 V.
The common channel select logics include two select
inputs (S0 and S1), an active LOW enable input (E1), an
active HIGH enable input (E2) and a latch enable input
(LE).
• Low “ON” resistance:
80 Ω (typ.) at VCC − VEE = 4.5 V
70 Ω (typ.) at VCC − VEE = 6.0 V
60 Ω (typ.) at VCC − VEE = 9.0 V
With E1 LOW and E2 HIGH, one of the four switches is
selected (low impedance ON-state) by S0 and S1. The data
at the select inputs may be latched by using the active
LOW latch enable input (LE). When LE is HIGH, the latch
is transparent. When either of the two enable inputs, E1
(active LOW) and E2 (active HIGH), is inactive, all analog
switches are turned off.
• Logic level translation:
to enable 5 V logic to communicate with ± 5 V analog
signals
• Typical “break before make” built in
• Address latches provided
• Output capability: non-standard
• ICC category: MSI
VCC and GND are the supply voltage pins for the digital
control inputs (S0, S1, LE, E1 and E2). The VCC to GND
ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT.
The analog inputs/outputs (nY0 to nY3, and nZ) can swing
between VCC as a positive limit and VEE as a negative limit.
GENERAL DESCRIPTION
The 74HC/HCT4352 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.
V
CC − VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is
connected to GND (typically ground).
The 74HC/HCT4352 are dual 4-channel analog
multiplexers/demultiplexers with common select logic.
QUICK REFERENCE DATA
VEE = GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
ns
HC
31
HCT
33
tPZH/ tPZL
PHZ/ tPLZ
CI
turn “ON” time E1, E2 or Sn to Vos
turn “OFF” time E1, E2 or Sn to Vos
input capacitance
CL = 15 pF; RL = 1 kΩ;
CC = 5 V
V
t
20
3.5
55
20
3.5
55
ns
pF
pF
CPD
CS
power dissipation capacitance per switch
max. switch capacitance
independent (Y)
notes 1 and 2
5
5
pF
pF
common (Z)
12
12
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ { (CL + CS ) × VCC2 × fo } where:
fi = input frequency in MHz
fo = output frequency in MHz
2
∑ { (CL + CS) × VCC × fo } = sum of outputs
CL = output load capacitance in pF
CS = max. switch capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
December 1990
2
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1, 6, 2, 5
2Y0 to 2Y3
n.c.
independent inputs/outputs
not connected
3, 14
7
E1
enable input (active LOW)
enable input (active HIGH)
negative supply voltage
ground (0 V)
8
E2
9
VEE
10
GND
LE
11
latch enable input (active LOW)
select inputs
13, 12
16, 18, 19, 15
17, 4
S0, S1
1Y0 to 1Y3
1Z, 2Z
VCC
independent inputs/outputs
common inputs/outputs
positive supply voltage
20
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
FUNCTION TABLE
INPUTS
CHANNEL ON
E1
E2
LE
S1
S0
H
X
X
L
X
X
X
X
X
X
none
none
L
L
L
L
H
H
H
H
H
H
H
H
L
L
H
H
L
H
L
nY0 − nZ
nY1 − nZ
nY2 − nZ
nY3 − nZ
(1)
H
L
X
H
X
L
↓
X
X
X
X
(2)
Notes
1. Last selected channel “ON”.
2. Selected channels latched.
H = HIGH voltage level
L = LOW voltage level
X = don’t care
↓ = HIGH-to-LOW LE transition
APPLICATIONS
• Analog multiplexing and demultiplexing
• Digital multiplexing and demultiplexing
• Signal gating
Fig.4 Functional diagram.
Fig.5 Schematic diagram (one switch).
December 1990
4
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to VEE = GND (ground = 0 V)
SYMBOL
VCC
PARAMETER
DC supply voltage
MIN. MAX. UNIT
CONDITIONS
−0.5 +11.0 V
±IIK
±ISK
±IS
DC digital input diode current
DC switch diode current
DC switch current
20
20
25
20
mA
mA
mA
mA
for VI < −0.5 V or VI > VCC + 0.5 V
for VS < −0.5 V or VS > VCC + 0.5 V
for −0.5 V < VS < VCC + 0.5 V
±IEE
DC VEE current
±ICC
±IGND
;
DC VCC or GND current
50
mA
Tstg
storage temperature range
−65
+150 °C
Ptot
power dissipation per package
for temperature range: −40 to +125 °C
74HC/HCT
plastic DIL
750
500
100
mW above +70 °C: derate linearly with 12 mW/K
mW above +70 °C: derate linearly with 6 mW/K
mW
plastic mini-pack (SO)
power dissipation per switch
PS
Note
1. To avoid drawing VCC current out of terminals nZ, when switch current flows in terminals nYn, the voltage drop across
the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals nZ, no VCC current will flow
out of terminals nYn. In this case there is no limit for the voltage drop across the switch, but the voltages at nYn and
nZ may not exceed VCC or VEE
.
RECOMMENDED OPERATING CONDITIONS
74HC
74HCT
SYMBOL
PARAMETER
UNIT
CONDITIONS
min. typ. max. min. typ. max.
VCC
VCC
VI
DC supply voltage VCC−GND
DC supply voltage VCC−VEE
DC input voltage range
2.0
5.0 10.0 4.5
5.0 10.0 2.0
5.0 5.5
5.0 10.0
VCC
V
see Figs 6 and 7
see Figs 6 and 7
2.0
V
GND
VEE
VCC
VCC
+85
GND
V
VS
DC switch voltage range
VEE
VCC
V
Tamb
Tamb
tr, tf
operating ambient temperature range −40
operating ambient temperature range −40
input rise and fall times
−40
+85
°C
see DC and AC
CHARACTERISTICS
+125 −40
+125 °C
1000
500
400
250
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 10.0 V
6.0
6.0 500
ns
December 1990
5
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
MBA334
10
handbook, halfpage
V
- GND
CC
(V)
8
6
4
operating area
2
0
0
2
4
6
8
10
V
- V (V)
CC EE
Fig.6 Guaranteed operating area as a function of
the supply voltages for 74HC4352.
Fig.7 Guaranteed operating area as a function of
the supply voltages for 74HCT4352.
DC CHARACTERISTICS FOR 74HC/HCT
For 74HC: VCC − GND or VCC − VEE = 2.0, 4.5, 6.0 and 9.0 V
For 74HCT: VCC − GND = 4.5 and 5.5 V; VCC − VEE = 2.0, 4.5, 6.0 and 9.0 V
Tamb (°C)
TEST CONDITIONS
74HC/HCT
SYMBOL
PARAMETER
UNIT
VCC VEE
IS
+25
−40 to +85 −40 to +125
Vis VI
(V)
(V) (µA)
min. typ. max. min. max. min. max.
RON
ON resistance
(peak)
−
−
−
−
Ω
Ω
Ω
Ω
2.0
4.5
6.0
0
0
0
100 VCC VIN
1000 to or
1000 VEE VIL
100 180
90
70
225
200
165
270
240
195
160
130
4.5 −4.5 1000
RON
ON resistance
(rail)
150
80
70
−
−
−
Ω
Ω
Ω
Ω
2.0
4.5
6.0
0
0
0
100 VEE VIH
140
120
105
175
150
130
210
180
160
1000
1000
or
VIL
60
4.5 −4.5 1000
RON
ON resistance
(rail)
150
90
80
−
−
−
Ω
Ω
Ω
Ω
2.0
4.5
6.0
0
0
0
100 VCC VIH
160
140
120
200
175
150
240
210
180
1000
1000
or
VIL
65
4.5 −4.5 1000
∆RON
maximum ∆ON
resistance
between any two
channels
−
9
8
6
Ω
Ω
Ω
Ω
2.0
4.5
6.0
0
0
0
VCC VIH
to
or
VEE VIL
4.5 −4.5
Notes
1. At supply voltages (VCC − VEE) approaching 2.0 V the analog switch ON-resistance becomes extremely non-linear.
There it is recommended that these devices be used to transmit digital signals only, when using these supply
voltages.
2. For test circuit measuring RON see Fig.8.
December 1990
6
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
DC CHARACTERISTICS FOR 74HC
Voltages are referenced to GND (ground = 0 V)
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
VCC VEE
(V) (V)
+25
−40 to +85 −40 to +125
VI
OTHER
min. typ. max. min. max. min. max.
VIH
HIGH level input 1.5
1.2
1.5
3.15
4.2
6.3
1.5
3.15
4.2
6.3
V
2.0
4.5
6.0
9.0
voltage
3.15 2.4
4.2
6.3
3.2
4.7
VIL
LOW level input
voltage
0.8 0.5
2.1 1.35
2.8 1.8
4.3 2.7
0.5
1.35
1.8
2.7
0.5
1.35
1.8
2.7
V
2.0
4.5
6.0
9.0
±II
input leakage
current
0.1
0.2
1.0
2.0
1.0
2.0
µA
µA
6.0
10.0
0
0
VCC
or
GND
±IS
analog switch
OFF-state
current per
channel
0.1
0.2
0.2
1.0
2.0
2.0
1.0
2.0
2.0
10.0
10.0
10.0
0
0
0
VIH
or
VIL
|VS| = VCC
− VEE
(see
Fig.10)
±IS
±IS
ICC
analog switch
OFF-state
current all
channels
µA
µA
VIH
or
VIL
|VS| = VCC
− VEE
(see
Fig.10)
analog switch
ON-state
current
VIH
or
VIL
|VS|= VCC
− VEE
(see
Fig.11)
quiescent
supply current
8.0
16.0
80.0
160.0
160.0 µA
320.0
6.0
10.0
0
0
VCC
or
V
iS = VEE
or VCC; Vos
GND = VCC or
VEE
December 1990
7
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL
PARAMETER
UNIT
VCC VEE
(V) (V)
+25
−40 to +85 −40 to +125
OTHER
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation
delay
17
6
5
60
12
10
8
75
15
13
10
90
18
15
12
ns
2.0
0
0
0
RL = ∞;
CL = 50 pF
(see Fig.18)
4.5
6.0
4.5
Vis to Vos
5
−4.5
t
t
t
PZH/ tPZL turn “ON” time
E1; E2 to Vos
99
36
29
25
325
65
55
405
81
69
490
98
83
ns
ns
ns
ns
ns
ns
ns
2.0
4.5
6.0
4.5
0
0
0
−4.5
RL = 1 kΩ;
CL = 50 pF
(see Fig.19)
LE to Vos
46
58
69
PZH/ tPZL turn “ON” time
Sn to Vos
99
36
29
25
325
65
55
405
81
69
490
98
80
2.0
4.5
6.0
4.5
0
0
0
−4.5
RL = 1 kΩ;
CL = 50 pF
(see Fig.19)
46
58
69
PHZ/ tPLZ turn “OFF” time
E1; E2 to Vos
58
21
17
21
200
40
34
250
50
43
300
60
51
2.0
4.5
6.0
4.5
0
0
0
−4.5
RL = 1 kΩ;
CL = 50 pF
(see Fig.19)
LE to Vos
40
50
60
tPHZ/ tPLZ turn “OFF” time
Sn to Vos
63
23
18
24
200
40
34
250
50
43
300
60
51
2.0
4.5
6.0
4.5
0
0
0
−4.5
RL = 1 kΩ;
CL = 50 pF
(see Fig.19)
40
50
60
tsu
set-up time
Sn to LE
90
18
15
18
17
6
5
115
23
20
135
27
23
2.0
4.5
6.0
4.5
0
0
0
−4.5
RL = 1 kΩ;
CL = 50 pF
(see Fig.20)
9
23
27
th
hold time
Sn to LE
5
5
5
5
−6
−2
−2
−3
5
5
5
5
5
5
5
5
2.0
4.5
6.0
4.5
0
0
0
−4.5
RL = 1 kΩ;
CL = 50 pF
(see Fig.20)
tW
LE minimum
pulse width
HIGH
80
16
14
16
11
4
3
100
20
17
120
24
20
2.0
4.5
6.0
4.5
0
0
0
−4.5
RL = 1 kΩ;
CL = 50 pF
(see Fig.20)
4
20
24
December 1990
8
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
DC CHARACTERISTICS FOR 74HCT
Voltages are referenced to GND (ground = 0)
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
VCC VEE
+25
−40 to +85 −40 to +125
VI
OTHER
(V)
(V)
min. typ. max. min. max. min. max.
VIH
VIL
±II
HIGH level
input voltage
2.0
1.6
2.0
2.0
V
4.5
to
5.5
LOW level input
voltage
1.2 0.8
0.1
0.8
1.0
1.0
0.8
1.0
1.0
V
4.5
to
5.5
input leakage
current
µA
µA
5.5
0
VCC
or
GND
±IS
analog switch
OFF-state
current per
channel
0.1
10.0 0
10.0 0
10.0 0
VIH
or
VIL
|VS| = VCC
− VEE
(see
Fig.10)
±IS
analog switch
OFF-state
current all
channels
0.2
0.2
8.0
2.0
2.0
2.0
2.0
µA
µA
VIH
or
VIL
|VS| = VCC
− VEE
(see
Fig.10)
±IS
analog switch
ON-state current
VIH
or
VIL
|VS| = VCC
− VEE
(see
Fig.11)
ICC
quiescentsupply
current
80.0
160.0
160.0 µA
5.5
0
VCC
V
iS =VEE
16.0
320.0
5.0 −5.0 or
or VCC
;
GND Vos = VCC
or VEE
∆ICC
additional
quiescentsupply
current per
input pin for unit
load coefficient
is 1 (note 1)
100 360
450
490
µA
4.5
to
5.5
0
VCC other
− 2.1 inputs at
V
VCC or
GND
Note to HCT types
1. The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given here. To determine ∆ICC per input,
multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
E1, E2
Sn
LE
0.50
0.50
1.5
December 1990
9
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL
PARAMETER
UNIT
VCC VEE
OTHER
+25
−40 to +85 −40 to +125
(V) (V)
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
Vis to Vos
6
5
12
8
15
10
18
12
ns
ns
ns
ns
ns
ns
ns
ns
4.5
0
RL = ∞;
4.5 −4.5 CL = 50 pF
(see Fig.18)
tPZH/ tPZL turn “ON” time
E1; E2 to Vos
38
28
65
46
81
58
98
69
4.5
0
RL = 1 kΩ;
4.5 −4.5 CL = 50 pF
LE to Vos
(see Fig.19)
t
t
t
PZH/ tPZL turn “ON” time
Sn to Vos
38
27
65
46
81
58
98
69
4.5
0
RL = 1 kΩ;
4.5 −4.5 CL = 50 pF
(see Fig.19)
PHZ/ tPLZ turn “OFF” time
E1 to Vos
20
20
40
40
50
50
60
60
4.5
0
RL = 1 kΩ;
4.5 −4.5 CL = 50 pF
LE to Vos
(see Fig.19)
PHZ/ tPLZ turn “OFF” time
E2, Sn to Vos
25
25
43
43
54
54
65
65
4.5
0
RL = 1 kΩ;
4.5 −4.5 CL = 50 pF
(see Fig.19)
tsu
set-up time
Sn to LE
16
18
7
9
20
23
24
27
4.5
0
RL = 1 kΩ;
4.5 −4.5 CL = 50 pF
(see Fig.20)
th
hold time
Sn to LE
5
5
−1
−1
5
5
5
5
4.5
0
RL = 1 kΩ;
4.5 −4.5 CL = 50 pF
(see Fig.20)
tW
LE minimum pulse
width HIGH
16
16
3
4
20
20
24
24
4.5
0
RL = 1 kΩ;
4.5 −4.5 CL = 50 pF
(see Fig.20)
December 1990
10
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
Fig.9 Typical RON as a function of input voltage Vis
Fig.8 Test circuit for measuring RON
.
for Vis = 0 to VCC − VEE
.
Fig.10 Test circuit for measuring OFF-state current.
Fig.11 Test circuit for measuring ON-state current.
December 1990
11
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT
Recommended conditions and typical values
GND = 0 V; Tamb = 25 °C
VCC
(V)
VEE Vis(p-p)
(V) (V)
SYMBOL PARAMETER
sine-wave distortion
typ.
UNIT
CONDITIONS
0.04
0.02
%
%
2.25
4.5
−2.25 4.0
−4.5 8.0
−2.25 4.0
−4.5 8.0
RL = 10 kΩ; CL = 50 pF
(see Fig.14)
f = 1 kHz
sine-wave distortion
f = 10 kHz
0.12
0.06
%
%
2.25
4.5
RL = 10 kΩ; CL = 50 pF
(see Fig.14)
switch “OFF” signal
feed-through
−50
−50
dB
dB
2.25
4.5
−2.25 note 1 RL = 600 Ω; CL = 50 pF
−4.5 f =1 MHz (see Figs 12 and 15)
−2.25 note 1 RL = 600 Ω; CL = 50 pF;
crosstalk between
any two switches/
multiplexers
−60
−60
dB
dB
2.25
4.5
−4.5
f = 1 MHz (see Fig.16)
V(p-p)
crosstalk voltage between
control and any switch
(peak-to-peak value)
110
220
mV
mV
4.5
4.5
0
−4.5
RL = 600 Ω; CL = 50 pF;
f = 1 MHz (E1, E2 or Sn,
square-wave between VCC and
GND, tr = tf = 6 ns)
(see Fig.17)
fmax
CS
minimum frequency response 160
MHz 2.25
MHz 4.5
−2.25 note 2 RL = 50 Ω; CL = 10 pF
−4.5 (see Figs 13 and 14)
(−3dB)
170
maximum switch capacitance
independent (Y)
5
pF
pF
common
(Z)
12
Notes
1. Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 Ω).
2. Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 Ω).
Vis is the input voltage at an nYn or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at an nYn or nZ terminal, whichever is assigned as an output.
Test conditions:
VCC = 4.5 V; GND = 0 V; VEE = −4.5 V;
RL = 50 Ω; Rsource = 1 kΩ.
Fig.12 Typical switch “OFF” signal feed-through as a function of frequency.
12
December 1990
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
Test conditions:
VCC = 4.5 V; GND = 0 V; VEE = −4.5 V;
RL = 50 Ω; Rsource = 1 kΩ.
Fig.13 Typical frequency response.
Fig.15 Test circuit for measuring switch “OFF” signal
feed-through.
Fig.14 Test circuit for measuring sine-wave
distortion and minimum frequency response.
Fig.16 Test circuits for measuring crosstalk between any two switches/multiplexers.
(a) channel ON condition; (b) channel OFF condition.
The crosstalk is defined as
follows (oscilloscope output):
Fig.17 Test circuit for measuring crosstalk between control and any switch.
December 1990
13
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.19 Waveforms showing the turn-ON and
turn-OFF times.
Fig.18 Waveforms showing the input (Vis) to output
(Vos) propagation delays.
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.20 Waveforms showing the set-up and hold
times from Sn inputs to LE input, and
minimum pulse width of LE.
December 1990
14
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
TEST CIRCUIT AND WAVEFORMS
Conditions
TEST
SWITCH
Vis
tPZH
tPZL
tPHZ
tPLZ
VEE
VCC
VEE
VCC
open
VCC
VEE
tr; tf
FAMILY AMPLITUDE
VM
fmax
;
VCC
VEE
OTHER
PULSE WIDTH
74HC
VCC
50%
1.3 V < 2 ns
< 2 ns
6 ns
6 ns
others
pulse
74HCT 3.0 V
CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output impedance ZO of the pulse generator.
tr
= tf = 6 ns; when measuring fmax, there is no constraint on tr, tf with 50% duty factor.
Fig.21 Test circuit for measuring AC performance.
Conditions
TEST
SWITCH
Vis
tPZH
tPZL
tPHZ
tPLZ
VEE
VCC
VEE
VCC
open
VCC
VEE
tr; tf
FAMILY AMPLITUDE
VM
fmax
;
VCC
VEE
OTHER
PULSE WIDTH
74HC
VCC
50%
1.3 V < 2 ns
< 2 ns
6 ns
6 ns
others
pulse
74HCT 3.0 V
CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output impedance ZO of the pulse generator.
tr
= tf = 6 ns; when measuring fmax, there is no constraint on tr, tf with 50% duty factor.
Fig.22 Input pulse definitions.
December 1990
15
Philips Semiconductors
Product specification
Dual 4-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4352
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
16
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