74HCT688PW,118 [NXP]

74HC(T)688 - 8-bit magnitude comparator TSSOP2 20-Pin;
74HCT688PW,118
型号: 74HCT688PW,118
厂家: NXP    NXP
描述:

74HC(T)688 - 8-bit magnitude comparator TSSOP2 20-Pin

光电二极管 逻辑集成电路
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中文:  中文翻译
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Important notice  
Dear Customer,  
On 7 February 2017 the former NXP Standard Product business became a new company with the  
tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS  
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable  
application markets  
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use  
the references to Nexperia, as shown below.  
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,  
use http://www.nexperia.com  
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salesaddresses@nexperia.com (email)  
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on  
the version, as shown below:  
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights  
reserved  
Should be replaced with:  
- © Nexperia B.V. (year). All rights reserved.  
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail  
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Kind regards,  
Team Nexperia  
INTEGRATED CIRCUITS  
DATA SHEET  
For a complete data sheet, please also download:  
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications  
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information  
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines  
74HC/HCT688  
8-bit magnitude comparator  
December 1990  
Product specification  
File under Integrated Circuits, IC06  
Philips Semiconductors  
Product specification  
8-bit magnitude comparator  
74HC/HCT688  
FEATURES  
GENERAL DESCRIPTION  
Compare two 8-bit words  
Output capability: standard  
ICC category: MSI  
The 74HC/HCT688 are high-speed Si-gate CMOS devices  
and are pin compatible with low power Schottky TTL  
(LSTTL). They are specified in compliance with JEDEC  
standard no. 7A.  
The 74HC/HCT688 are 8-bit magnitude comparators.  
They perform comparison of two 8-bit binary or BCD  
words.  
The output provides P = Q.  
QUICK REFERENCE DATA  
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns  
TYPICAL  
SYMBOL  
PARAMETER  
CONDITIONS  
UNIT  
HC  
HCT  
tPHL/ tPLH  
propagation delay  
Pn, Qn to P = Q  
E to P = Q  
CL = 15 pF; VCC = 5 V  
17  
8
17  
12  
3.5  
30  
ns  
ns  
pF  
pF  
CI  
input capacitance  
3.5  
30  
CPD  
power dissipation capacitance per package notes 1 and 2  
Notes  
1. CPD is used to determine the dynamic power dissipation (PD in µW):  
2
PD = CPD × VCC2 × fi + ∑ (CL × VCC × fo)  
where:  
fi = input frequency in MHz  
fo = output frequency in MHz  
(CL × VCC2 × fo) = sum of outputs  
CL = output load capacitance in pF  
VCC = supply voltage in V  
2. For HC the condition is VI = GND to VCC  
For HCT the condition is VI = GND to VCC 1.5 V  
ORDERING INFORMATION  
See “74HC/HCT/HCU/HCMOS Logic Package Information”.  
December 1990  
2
Philips Semiconductors  
Product specification  
8-bit magnitude comparator  
74HC/HCT688  
PIN DESCRIPTION  
PIN NO.  
SYMBOL  
NAME AND FUNCTION  
1
E
enable input (active LOW)  
word inputs  
2, 4, 6, 8, 11, 13, 15, 17  
P0 to P7  
Q0 to Q7  
GND  
P = Q  
VCC  
3, 5, 7, 9, 12, 14, 16, 18  
word inputs  
10  
19  
20  
ground (0 V)  
equal to output  
positive supply voltage  
Fig.1 Pin configuration.  
Fig.2 Logic symbol.  
Fig.3 IEC logic symbol.  
December 1990  
3
Philips Semiconductors  
Product specification  
8-bit magnitude comparator  
74HC/HCT688  
Fig.4 Functional diagram.  
Fig.5 Logic diagram.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
P = Q  
DATA Pn, Qn  
ENABLE E  
P = Q  
X
P > Q  
P < Q  
L
H
L
L
H
H
H
L
Notes  
1. H = HIGH voltage level  
L = LOW voltage level  
X = don’t care  
December 1990  
4
Philips Semiconductors  
Product specification  
8-bit magnitude comparator  
74HC/HCT688  
DC CHARACTERISTICS FOR 74HC  
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.  
Output capability: standard  
ICC category: MSI  
AC CHARACTERISTICS FOR 74HC  
GND = 0 V; tr = tf = 6 ns; CL = 50 pF  
Tamb (°C)  
TEST CONDITIONS  
74HC  
SYMBOL PARAMETER  
UNIT  
VCC  
(V)  
+25  
40 to +85 40 to +125  
WAVEFORMS  
min. typ. max. min. max. min. max.  
tPHL/ tPLH propagation delay  
Pn, Qn to P = Q  
55  
20  
16  
170  
34  
29  
215  
43  
37  
255  
51  
43  
2.0  
4.5  
6.0  
Fig.6  
ns  
ns  
ns  
t
t
PHL/ tPLH propagation delay  
E to P = Q  
28  
10  
8
120  
24  
20  
150  
30  
26  
180  
36  
31  
2.0  
4.5  
6.0  
Fig.7  
THL/ tTLH output transition time  
19  
7
6
75  
15  
13  
95  
19  
16  
110  
22  
19  
2.0  
4.5  
6.0  
Figs 6 and 7  
December 1990  
5
Philips Semiconductors  
Product specification  
8-bit magnitude comparator  
74HC/HCT688  
DC CHARACTERISTICS FOR 74HCT  
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.  
Output capability: standard  
ICC category: MSI  
Note to HCT types  
The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications.  
To determine ICC per input, multiply this value by the unit load coefficient shown in the table below.  
INPUT  
UNIT LOAD COEFFICIENT  
Pn  
Qn  
E
0.35  
0.35  
0.70  
AC CHARACTERISTICS FOR 74HCT  
GND = 0 V; tr = tf = 6 ns; CL = 50 pF  
Tamb (°C)  
TEST CONDITIONS  
74HCT  
SYMBOL PARAMETER  
UNIT  
VCC  
+25  
40 to +85 40 to +125  
WAVEFORMS  
(V)  
min. typ. max. min. max. min. max.  
tPHL/ tPLH propagation delay  
Pn, Qn to P = Q  
20  
18  
7
34  
24  
15  
43  
30  
19  
51  
36  
22  
ns  
ns  
ns  
4.5 Fig.6  
tPHL/ tPLH propagation delay  
E to P = Q  
4.5 Fig.7  
t
THL/ tTLH output transition time  
4.5 Figs 6 and 7  
December 1990  
6
Philips Semiconductors  
Product specification  
8-bit magnitude comparator  
74HC/HCT688  
AC WAVEFORMS  
(1) HC : VM = 50%; VI = GND to VCC  
.
(1) HC : VM = 50%; VI = GND to VCC  
.
HCT: VM = 1.3 V; VI = GND to 3 V.  
HCT: VM = 1.3 V; VI = GND to 3 V.  
Fig.7 Waveforms showing the word inputs (Pn, Qn)  
to the equal to output (P = Q) propagation  
delays and the output transition times.  
Fig.6 Waveforms showing the enable input (E) to  
the equal to output (P = Q) propagation  
delays and the output transition times.  
APPLICATION INFORMATION  
Two or more “688” 8-bit magnitude comparators may be cascaded to compare binary or BCD numbers of more than 8  
bits. An example is shown in Fig.8.  
Fig.8 Binary or BCD comparator.  
PACKAGE OUTLINES  
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.  
December 1990  
7

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