74LV03PWDH [NXP]
Quad 2-input NAND gate; 四路2输入与非门
| 型号： | 74LV03PWDH |
| 厂家： | 
NXP |
| 描述： | Quad 2-input NAND gate |
| 文件： | 总12页 (文件大小：120K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74LV03
Quad 2-input NAND gate
Product specification
1998 Apr 20
Supersedes data of 1997 Mar 28
IC24 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV03
FEATURES
• Wide operating voltage: 1.0 to 5.5V
• Optimized for Low Voltage applications: 1.0 to 3.6V
DESCRIPTION
The 74LV03 is a low–voltage Si–gate CMOS device and is pin and
function compatible with 74HC/HCT03.
The 74LV03 provides the 2–input NAND function.
• Accepts TTL input levels between V = 2.7V and V = 3.6V
CC
CC
The 74LV03 has open–drain N–transistor outputs, which are not
• Typical V
(output ground bounce) t 0.8V @ V = 3.3V,
clamped by a diode connected to V . In the OFF–state, i.e. when
one input is LOW, the output may be pulled to any voltage between
OLP
CC
CC
T
= 25°C
amb
GND and V
. This allows the device to be used as a
Omax
• Typical V
(output V undershoot) u 2V @ V = 3.3V,
OHV
OH
CC
LOW–to–HIGH or HIGH–to–LOW level shifter. For digital operation
and OR–tied output applications, these devices must have a pull–up
resistor to establish a logic HIGH level.
T
amb
= 25°C
• Level shifter capability
• Output capability: standard (open drain)
• I category: SSI
CC
QUICK REFERENCE DATA
GND = 0V; T
= 25°C; t =t v2.5 ns
amb
r f
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
Propagation delay
nA, nB to nY
C = 15pF
L
t
/t
8
ns
PZL PLZ
V
CC
= 3.3V
C
C
Input capacitance
3.5
4
pF
pF
I
Power dissipation capacitance per gate
Notes 1, 2
PD
NOTES:
1
C
is used to determine the dynamic power dissipation (P in µW)
PD
D
2
2
P
D
= C V
x f )S (C V
f ) where:
CC o
PD
CC
i
L
f = input frequency in MHz; C = output load capacitance in pF;
i
L
f = output frequency in MHz; V = supply voltage in V;
o
CC
2
S (C V
f ) = sum of the outputs.
L
CC
o
2
3
The condition is V = GND to V
I CC
The given value of C is obtained with : C = 0 pF and R = ∞
PD
L
L
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74LV03 N
PKG. DWG. #
SOT27-1
14-Pin Plastic DIL
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
74LV03 N
74LV03 D
14-Pin Plastic SO
74LV03 D
SOT108-1
SOT337-1
SOT402-1
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
74LV03 DB
74LV03 PW
74LV03 DB
74LV03PW DH
PIN DESCRIPTION
FUNCTION TABLE
PIN
INPUTS
OUTPUT
SYMBOL
NUMBER
FUNCTION
nA
L
nB
L
nY
Z
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
1A to 4A
1B to 4B
1Y to 4Y
GND
Data inputs
Data inputs
L
H
L
Z
Data outputs
H
H
Z
Ground (0V)
H
L
NOTES:
14
V
CC
Positive supply voltage
H = HIGH voltage level
L = LOW voltage level
Z = High impedance OFF-state
2
1998 Apr 20
853–1963 19257
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV03
PIN CONFIGURATION
LOGIC SYMBOL
1A
1B
1
2
1Y
2Y
3Y
4Y
3
1A
1B
1Y
2A
2B
1
2
3
4
5
14
V
CC
13 4B
12 4A
11 4Y
10 3B
4
5
2A
2B
6
9
3A
3B
8
2Y
6
7
9
8
3A
3Y
10
GND
12
13
4A
4B
11
SV00354
SV00355
LOGIC SYMBOL (IEEE/IEC)
LOGIC DIAGRAM
Y
&
1
3
6
8
A
B
2
&
4
GND
5
&
9
SV00357
10
&
12
11
13
SV00356
3
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV03
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
1.0
0
TYP.
3.3
–
MAX
5.5
UNIT
V
CC
DC supply voltage
See Note1
V
V
V
V
I
Input voltage
V
CC
CC
V
O
Output voltage
0
–
V
Operating ambient temperature range in free
air
See DC and AC
characteristics
–40
–40
+85
+125
T
amb
°C
V
CC
V
CC
V
CC
V
CC
= 1.0V to 2.0V
= 2.0V to 2.7V
= 2.7V to 3.6V
= 3.6V to 5.5V
–
–
–
–
500
200
100
50
–
–
–
t , t
r
Input rise and fall times
ns/V
f
NOTES:
1
The LV is guaranteed to function down to V = 1.0V (input levels GND or V ); DC characteristics are guaranteed from V = 1.2V to V = 5.5V.
CC CC CC CC
1, 2
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +7.0
20
UNIT
V
CC
V
±I
IK
DC input diode current
DC output diode current
V < –0.5 or V > V + 0.5V
mA
mA
I
I
CC
±I
OK
V
O
< –0.5 or V > V + 0.5V
50
O
CC
DC output source or sink current
– standard outputs
±I
O
–0.5V < V < V + 0.5V
mA
O
CC
25
DC V or GND current for types with
–standard outputs
CC
±I
±I
,
mA
GND
50
CC
T
stg
Storage temperature range
–65 to +150
°C
Power dissipation per package
–plastic DIL
–plastic mini-pack (SO)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
P
TOT
mW
–plastic shrink mini-pack (SSOP and TSSOP)
NOTES:
1
Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
4
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV03
DC CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
MAX
-40°C to +85°C
-40°C to +125°C
SYMBOL
PARAMETER
TEST CONDITIONS
= 1.2V
UNIT
1
MIN
0.9
1.4
2.0
TYP
MIN
0.9
1.4
2.0
MAX
V
V
V
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 2.0V
HIGH level Input
voltage
V
IH
V
= 2.7 to 3.6V
= 4.5 to 5.5V
= 1.2V
0.7*V
0.7*V
CC
CC
0.3
0.6
0.8
0.3
0.6
0.8
= 2.0V
LOW level Input
voltage
V
IL
V
= 2.7 to 3.6V
= 4.5 to 5.5
0.3*V
0.3*V
CC
CC
= 1.2V; V = V or V –I = 100µA
1.2
2.0
2.7
3.0
4.5
I
IH
IL;
O
= 2.0V; V = V or V –I = 100µA
1.8
2.5
2.8
4.3
1.8
2.5
2.8
4.3
I
IH
IL;
O
HIGH level output
voltage; all outputs
= 2.7V; V = V or V –I = 100µA
V
V
V
V
V
V
I
IH
IL;
O
OH
= 3.0V; V = V or V –I = 100µA
I
IH
IL;
O
= 4.5V;V = V or V –I = 100µA
I
IH
IL;
O
HIGH level output
voltage;
STANDARD
V
V
= 3.0V;V = V or V –I = 6mA
2.40
3.60
2.82
4.20
2.20
3.50
CC
I
IH
IL;
O
OH
= 4.5V;V = V or V –I = 12mA
CC
I
IH
IL;
O
outputs
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.2V; V = V or V I
IL; O
= 100µA
= 100µA
= 100µA
0
0
0
0
0
I
IH
= 2.0V; V = V or V
I
0.2
0.2
0.2
0.2
0.2
I
IH
IL; O
LOW level output
voltage; all outputs
= 2.7V; V = V or V
I
0.2
0.2
0.2
V
V
I
IH
IL; O
OL
= 3.0V;V = V or V I
= 100µA
I = 100µA
I
IH
IL; O
= 4.5V;V = V or V
IL; O
I
IH
LOW level output
voltage;
STANDARD
V
V
= 3.0V;V = V or V I = 6mA
IL; O
0.25
0.35
0.40
0.55
5.0
0.50
0.65
10
CC
I
IH
OL
= 4.5V;V = V or V I = 12mA
IL; O
CC
I
IH
outputs
HIGH level output
leakage current
V
V
= 2.0 to 3.6V; V = V
I
CC
O
IL;
IL;
I
I
µA
µA
µA
µA
OZ
= V or GND
CC
HIGH level output
leakage current
V
= 2.0 to 3.6V; V = V
CC I
10
1.0
20
1.0
40
OZ
2
V
O
= 6.0V
Input leakage
current
I
I
V
= 5.5V; V = V or GND
CC I CC
Quiescent supply
current; SSI
I
V
CC
= 5.5V; V = V or GND; I = 0
20.0
CC
I
CC
O
Additional
quiescent supply
current per input
∆I
CC
V
CC
= 2.7V to 3.6V; V = V –0.6V
500
850
µA
I
CC
NOTES:
1
2
All typical values are measured at T
The maximum operating output voltage (V
= 25°C.
O(max)
amb
) is 6.0V.
5
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV03
AC CHARACTERISTICS FOR 74LV03
GND = 0V; t = t ≤ 2.5ns; C = 50pF; R = 1KΩ
r
f
L
L
LIMITS
–40 to +85 °C
LIMITS
–40 to +125 °C
CONDITION
(V)
SYMBOL
PARAMETER
WAVEFORM
UNIT
1
V
CC
MIN
–
TYP
MAX
–
MIN
–
MAX
–
1.2
2.0
2.7
50
17
13
–
26
19
16
13
–
31
23
19
16
Propagation delay
nA, nB, to nY
–
–
t
t
Figures, 1, 2
ns
PZL/ PLZ
2
3.0 to 3.6
4.5 to 5.5
–
10
–
3
–
–
–
NOTE:
1
2
3
Unless otherwise stated, all typical values are at T
= 25°C.
amb
Typical value measured at V = 3.3V.
CC
Typical value measured at V = 5.0V.
CC
AC WAVEFORMS
TEST CIRCUIT
V
V
V
= 1.5V at V w 2.7V v 3.6V
M
CC
= 0.5V * V at V t 2.7V and w 4.5V
M
CC
CC
V
CC
2 * V
and V are the typical output voltage drop that occur with the
CC
OL
OH
Open
GND
output load.
V
X
V
X
= V + 0.3V at V w 2.7V and v 3.6V
OL CC
R
R
= 1k
L
L
= V + 0.1 * V at V t 2.7V and w 4.5V
V
V
O
OL
CC
CC
I
PULSE
GENERATOR
D.U.T.
= 1k
R
T
50 pF
C
L
Test Circuit for Outputs
DEFINITIONS
V
I
R
C
R
= Load resistor
L
L
T
= Load capacitance includes jig and probe capacitiance.
= Termination resistance should be equal to Z
nA, nB INPUT
V
M
t
of pulse generators.
OUT
V
SWITCH POSITION
CC
S
t
TEST
V
V
I
PLZ
PZL
1
CC
GND
t
t
Open
< 2.7V
V
CC
PLH/ PHL
nY OUTPUT
V
M
t
t
t
2 * V
2.7V
PLZ/ PZL
CC
2.7–3.6V
V
X
V
V
CC
OL
w 4.5V
t
GND
PHZ/ PZH
SV00896
Figure 2. Load circuitry for switching times
SV00358
Figure 1. Input (nA, nB) to output (nY) propagation delays.
6
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV03
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
7
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV03
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
8
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV03
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
9
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV03
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
10
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV03
NOTES
11
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV03
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 08-98
9397-750-04403
Document order number:
Philips
Semiconductors
相关型号：
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