74LV257D [NXP]

Quad 2-input multiplexer 3-State; 四2输入多路复用器三态
74LV257D
型号: 74LV257D
厂家: NXP    NXP
描述:

Quad 2-input multiplexer 3-State
四2输入多路复用器三态

解复用器 逻辑集成电路 光电二极管
文件: 总12页 (文件大小:117K)
中文:  中文翻译
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INTEGRATED CIRCUITS  
74LV257  
Quad 2-input multiplexer (3-State)  
Product specification  
1998 May 20  
Supersedes data of 1997 Jun 06  
IC24 Data Handbook  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
Quad 2-input multiplexer (3-State)  
74LV257  
FEATURES  
DESCRIPTION  
The 74LV257 is a low-voltage Si-gate CMOS device and is pin and  
function compatible with 74HC/HCT257.  
Optimized for low voltage applications: 1.0 to 3.6 V  
Accepts TTL input levels between V = 2.7 V and V = 3.6 V  
CC  
CC  
The 74LV257 is a quad 2-input multiplexer with 3-state outputs, which  
select 4 bits of data from two sources and are controlled by a common  
data select input (S). The data inputs from source 0 (1l to 4l ) are  
Typical V  
(output ground bounce) < 0.8 V at V = 3.3 V,  
OLP  
= 25°C  
CC  
T
amb  
0
0
selected when input S is LOW and the data inputs from source 1 (1l  
1
Typical V  
(output V undershoot) > 2 V at V = 3.3 V,  
OHV  
= 25°C  
OH  
CC  
to 4l ) are selected when S in HIGH. Data appears at the outputs (1Y  
1
T
amb  
to 4Y) in true (non-inverting) from the selected inputs. The 74LV257 is  
the logic implementation of a 4-pole, 2-position switch, where the  
position of the switch is determined by the logic levels applied to S.  
The outputs are forced to a high impedance OFF-state when OE is  
HIGH.  
Non-inverting data path  
Output capability: bus driver  
I category: MSI  
CC  
The logic equations for the outputs are:  
1Y = OE × (1l × S + 1l × S)  
1
0
2Y = OE × (2l × S + 2l × S)  
1
0
3Y = OE × (3l × S + 3l × S)  
1
0
4Y = OE × (4l × S + 4l × S)  
1
0
QUICK REFERENCE DATA  
GND = 0 V; T  
= 25°C; t = t 2.5 ns  
amb  
r
f
SYMBOL  
PARAMETER  
CONDITIONS  
TYPICAL  
UNIT  
Propagation delay  
nl , nl to nY  
S to nY  
C = 15 pF;  
L
V
CC  
= 3.3 V  
t
/t  
ns  
10  
14  
0
1
PHL PLH  
C
C
Input capacitance  
3.5  
30  
pF  
pF  
I
1
Power dissipation capacitance per gate  
V = GND to V  
I CC  
PD  
NOTE:  
1. C is used to determine the dynamic power dissipation (P in µW)  
PD  
D
2
2
P
= C × V  
× f (C × V  
× f ) where:  
D
PD  
CC  
i
L
CC o  
f = input frequency in MHz; C = output load capacitance in pF;  
i
L
f = output frequency in MHz; V = supply voltage in V;  
o
CC  
2
ȍ (C × V  
× f ) = sum of the outputs.  
L
CC  
o
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74LV257 N  
PKG. DWG. #  
SOT38-4  
16-Pin Plastic DIL  
–40°C to +125°C  
–40°C to +125°C  
–40°C to +125°C  
–40°C to +125°C  
74LV257 N  
74LV257 D  
74LV257 DB  
74LV257 PW  
16-Pin Plastic SO  
74LV257 D  
SOT109-1  
SOT338-1  
SOT403-1  
16-Pin Plastic SSOP Type II  
16-Pin Plastic TSSOP Type I  
74LV257 DB  
74LV257PW DH  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN  
SYMBOL  
NUMBER  
FUNCTION  
1
S
16  
15  
14  
V
CC  
1
S
Common data select input  
Data inputs from source 0  
Data inputs from source 1  
2
1I  
0
OE  
2, 5, 11, 14  
3, 6, 10, 13  
4, 7, 9, 12  
8
1l to 4l  
0
0
1
3
4
5
6
1I  
1
4l  
0
1l to 4l  
1
IY  
13  
12  
11  
4l  
1
1Y to 4Y 3-state multiplexer outputs  
2l  
4Y  
0
1
GND  
OE  
Ground (0 V)  
2l  
3l  
0
3-State output enable input  
(active LOW)  
15  
16  
7
8
10  
9
2Y  
3l  
1
V
CC  
Positive supply voltage  
GND  
3Y  
SV00636  
2
1998 May 20  
853-1985 19420  
Philips Semiconductors  
Product specification  
Quad 2-input multiplexer (3-State)  
74LV257  
LOGIC SYMBOL  
FUNCTIONAL DIAGRAM  
2
3
5
6
11 10 14 13  
2
3
1I  
1I  
0
1Y  
4
1I 11 2I 2I 3I 3I 4I 4I  
1
0
I
0
1
0
1
0
1
5
6
2I  
2I  
1
S
0
7
9
2Y  
3Y  
15  
1
OE  
3–STATE  
MULTIPLEXER  
OUTPUTS  
SELECTOR  
11  
10  
3I  
3I  
0
1Y 2Y 3Y 4Y  
1
4
7
9
12  
14  
13  
4I  
4I  
0
SV00637  
4Y 12  
1
LOGIC SYMBOL (IEEE/IEC)  
S
1
OE  
15  
1
G1  
SV00639  
15  
EN  
FUNCTION TABLE  
2
INPUTS  
OUTPUTS  
MUX  
1
4
7
OE  
S
nl  
nl  
nY  
3
0
1
1
H
X
X
X
Z
5
L
L
L
L
H
H
L
X
X
L
L
H
X
X
L
H
L
6
11  
10  
14  
13  
9
L
H
H
NOTES:  
H
L
X
Z
=
=
=
=
HIGH voltage level  
LOW voltage level  
don’t care  
12  
high impedance OFF-state  
SV00638  
LOGIC DIAGRAM  
1I  
1
1Y  
2Y  
3Y  
4Y  
1I0  
2I  
1
1
1
2I  
0
3I  
3I  
0
4I  
4I  
0
OE  
S
SV00640  
3
1998 May 20  
Philips Semiconductors  
Product specification  
Quad 2-input multiplexer (3-State)  
74LV257  
RECOMMENDED OPERATING CONDITIONS  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
1.0  
0
TYP  
3.3  
MAX  
UNIT  
V
CC  
DC supply voltage  
See Note 1  
3.6  
V
V
V
V
I
Input voltage  
V
CC  
V
CC  
V
O
Output voltage  
0
See DC and AC  
characteristics  
–40  
–40  
+85  
+125  
T
amb  
Operating ambient temperature range in free air  
°C  
V
CC  
V
CC  
V
CC  
= 1.0V to 2.0V  
= 2.0V to 2.7V  
= 2.7V to 3.6V  
500  
200  
100  
t , t  
r
Input rise and fall times  
ns/V  
f
NOTE:  
1. The LV is guaranteed to function down to V = 1.0V (input levels GND or V ); DC characteristics are guaranteed from V = 1.2V to V =3.6V.  
CC  
CC  
CC  
CC  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
In accordance with the Absolute Maximum Rating System (IEC 134).  
Voltages are referenced to GND (ground = 0 V).  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
–0.5 to +4.6  
20  
UNIT  
V
CC  
V
"I  
DC input diode current  
DC output diode current  
V < –0.5 or V > V + 0.5V  
mA  
mA  
IK  
I
I
CC  
"I  
V
O
< –0.5 or V > V + 0.5V  
50  
OK  
O
CC  
DC output source or sink current  
– bus driver outputs  
"I  
–0.5V < V < V + 0.5V  
35  
mA  
O
O
CC  
DC V or GND current for types with  
– bus driver outputs  
CC  
"I  
"I  
,
70  
mA  
GND  
CC  
T
stg  
Storage temperature range  
–65 to +150  
°C  
Power dissipation per package  
– plastic DIL  
– plastic mini-pack (SO)  
for temperature range: –40 to +125°C  
above +70°C derate linearly with 12 mW/K  
above +70°C derate linearly with 8 mW/K  
above +60°C derate linearly with 5.5 mW/K  
750  
500  
400  
P
TOT  
mW  
– plastic shrink mini-pack (SSOP and TSSOP)  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
4
1998 May 20  
Philips Semiconductors  
Product specification  
Quad 2-input multiplexer (3-State)  
74LV257  
DC ELECTRICAL CHARACTERISTICS  
Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V).  
LIMITS  
MAX  
-40°C to +85°C  
-40°C to +125°C  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
UNIT  
V
1
MIN  
0.9  
1.4  
2.0  
TYP  
MIN  
0.9  
1.4  
2.0  
MAX  
V
V
V
V
V
V
V
V
V
V
= 1.2 V  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
HIGH level Input  
voltage  
= 2.0 V  
V
IH  
= 2.7 to 3.6 V  
= 1.2 V  
0.3  
0.6  
0.8  
0.3  
0.6  
0.8  
LOW level Input  
voltage  
= 2.0 V  
V
IL  
V
= 2.7 to 3.6 V  
= 1.2 V; V = V or V –I = 100µA  
1.2  
2.0  
2.7  
3.0  
I
IH  
IL;  
O
= 2.0 V; V = V or V –I = 100µA  
1.8  
2.5  
2.8  
1.8  
2.5  
2.8  
I
IH  
IL;  
O
HIGH level output  
voltage; all outputs  
V
V
V
V
V
V
OH  
= 2.7 V; V = V or V –I = 100µA  
I
IH  
IL;  
O
= 3.0 V; V = V or V –I = 100µA  
I
IH  
IL;  
O
HIGH level output  
voltage; BUS driver  
outputs  
V
CC  
= 3.0 V; V = V or V –I = 8mA  
2.40  
2.82  
2.20  
OH  
I
IH  
IL;  
O
V
CC  
V
CC  
V
CC  
V
CC  
= 1.2 V; V = V or V I  
IL; O  
= 100µA  
= 100µA  
= 100µA  
= 100µA  
0
0
0
0
I
IH  
= 2.0 V; V = V or V I  
IL; O  
0.2  
0.2  
0.2  
0.2  
0.2  
0.2  
I
IH  
LOW level output  
voltage; all outputs  
V
V
OL  
= 2.7 V; V = V or V I  
IL; O  
I
IH  
= 3.0 V; V = V or V I  
IL; O  
I
IH  
LOW level output  
voltage; BUS driver  
outputs  
V
CC  
= 3.0 V; V = V or V I = 8mA  
IL; O  
0.20  
0.40  
0.50  
OL  
I
IH  
Input leakage  
current  
I
V
= 3.6 V; V = V or GND  
1.0  
5
1.0  
10  
µA  
µA  
µA  
I
CC  
CC  
I
CC  
3-State output  
OFF-state current  
V
V
= 3.6 V; V = V or V  
I IH IL;  
I
OZ  
= V or GND  
O
CC  
Quiescent supply  
current; MSI  
I
V
CC  
= 3.6 V; V = V or GND; I = 0  
20.0  
160  
CC  
I
CC  
O
Additional  
quiescent supply  
current per input  
I  
CC  
V
CC  
= 2.7 V to 3.6 V; V = V – 0.6 V  
500  
850  
µA  
I
CC  
NOTE:  
1. All typical values are measured at T  
= 25°C.  
amb  
5
1998 May 20  
Philips Semiconductors  
Product specification  
Quad 2-input multiplexer (3-State)  
74LV257  
AC CHARACTERISTICS  
GND = 0V; t = t 2.5ns; C = 50pF; R = 1KΩ  
r
f
L
L
LIMITS  
–40 to +85 °C  
CONDITION  
(V)  
–40 to +125 °C  
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
1
V
CC  
MIN  
TYP  
65  
MAX  
MIN  
MAX  
1.2  
2.0  
2.7  
Propagation delay  
nl to nY  
nl to nY  
22  
43  
31  
25  
51  
38  
30  
t
t
Figure 1  
ns  
0
1
PHL/ PLH  
16  
2
3.0 to 3.6  
1.2  
12  
85  
29  
21  
2.0  
56  
41  
33  
66  
49  
39  
Propagation delay  
S to nY  
t
t
Figure 1  
Figure 2  
Figure 2  
ns  
ns  
ns  
PHL/ PLH  
2.7  
2
3.0 to 3.6  
1.2  
16  
60  
20  
15  
2.0  
39  
29  
23  
46  
34  
27  
3-State output enable time  
OE to nY  
t
t
t
PZH/ PZL  
2.7  
2
3.0 to 3.6  
1.2  
11  
65  
24  
18  
2.0  
40  
32  
26  
49  
37  
30  
3-State output disable time  
OE to nY  
t
PHZ/ PLZ  
2.7  
2
3.0 to 3.6  
14  
NOTES:  
1. Unless otherwise stated, all typical values are measured at T  
= 25°C  
amb  
2. Typical values are measured at V = 3.3 V.  
CC  
AC WAVEFORMS  
V
V
= 0.5 × V at V < 2.7 V  
M
CC CC  
V
I
= 1.5 V at V 2.7 V  
M
CC  
V = V + 0.3 V at V 2.7 V  
X
OL  
CC  
OE INPUT  
GND  
V
M
V = V + 0.1 × V at V < 2.7 V  
X
OL  
CC  
CC  
V
V
V
= V – 0.3 V at V 2.7V  
OH CC  
Y
t
PZL  
= V – 0.1 × V at V < 2.7 V  
t
PLZ  
Y
OH  
CC  
CC  
V
CC  
and V are the typical output voltage drop that occur with the  
OL  
OH  
OUTPUT  
LOW-to-OFF  
OFF-to-LOW  
output load.  
V
M
V
V
X
CC  
V
OL  
t
PZH  
t
PHZ  
V
S, nI , nI  
M
0
1
INPUTS  
V
OH  
V
GND  
Y
OUTPUT  
t
t
V
M
PHL  
PLH  
HIGH-to-OFF  
OFF-to-HIGH  
V
OH  
GND  
outputs  
disabled  
outputs  
enabled  
outputs  
enabled  
V
nY OUTPUT  
M
SV00642  
V
OL  
SV00641  
Figure 2. 3-State enable and disable times.  
Figure 1. Input (S, nl , nl ) to output (nY) propagation delays.  
0
1
6
1998 May 20  
Philips Semiconductors  
Product specification  
Quad 2-input multiplexer (3-State)  
74LV257  
TEST CIRCUIT  
V
CC  
V
V
O
I
PULSE  
GENERATOR  
D.U.T.  
50pF  
R = 1KΩ  
L
R
T
C
L
Test Circuit for switching times  
DEFINITIONS  
R
T
R
L
= Termination resistance should be equal to Z  
= Load resistor  
of pulse generators.  
OUT  
C
= Load capacitance includes jig and probe capacitance  
L
TEST  
V
V
I
CC  
t
t
< 2.7V  
V
CC  
PLH/ PHL  
2.7–3.6V  
2.7V  
SV00776  
Figure 3. Load circuitry for switching times.  
7
1998 May 20  
Philips Semiconductors  
Product specification  
Quad 2-input multiplexer (3-State)  
74LV257  
DIP14: plastic dual in-line package; 14 leads (300 mil)  
SOT27-1  
8
1998 May 20  
Philips Semiconductors  
Product specification  
Quad 2-input multiplexer (3-State)  
74LV257  
SO14: plastic small outline package; 14 leads; body width 3.9 mm  
SOT108-1  
9
1998 May 20  
Philips Semiconductors  
Product specification  
Quad 2-input multiplexer (3-State)  
74LV257  
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm  
SOT337-1  
10  
1998 May 20  
Philips Semiconductors  
Product specification  
Quad 2-input multiplexer (3-State)  
74LV257  
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm  
SOT402-1  
11  
1998 May 20  
Philips Semiconductors  
Product specification  
Quad 2-input multiplexer (3-State)  
74LV257  
DEFINITIONS  
Data Sheet Identification  
Product Status  
Definition  
This data sheet contains the design target or goal specifications for product development. Specifications  
may change in any manner without notice.  
Objective Specification  
Formative or in Design  
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to make changes at any time without notice in order to improve design  
and supply the best possible product.  
Preliminary Specification  
Product Specification  
Preproduction Product  
Full Production  
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes  
at any time without notice, in order to improve design and supply the best possible product.  
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,  
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,  
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes  
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting  
or modification.  
LIFE SUPPORT APPLICATIONS  
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,  
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected  
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips  
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully  
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1998  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
print code  
Date of release: 05-96  
9397-750-04441  
Document order number:  
Philips  
Semiconductors  

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