74LV393D [NXP]
Dual 4-bit binary ripple counter; 双4位二进制纹波计数器
| 型号： | 74LV393D |
| 厂家： | 
NXP |
| 描述： | Dual 4-bit binary ripple counter |
| 文件： | 总12页 (文件大小：118K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74LV393
Dual 4-bit binary ripple counter
Product specification
1997 Jun 10
Supersedes data of 1997 Mar 04
IC24 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74LV393
FEATURES
DESCRIPTION
The 74LV393 is a low–voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT393.
• Optimized for Low Voltage applications: 1.0 to 3.6V
• Accepts TTL input levels between V = 2.7V and V = 3.6V
CC
CC
The 74LV393 is a dual 4-bit binary ripple counter with separate
clocks (1CP, 2CP) and master reset (1MR, 2MR) inputs to each
counter.
• Typical V
(output ground bounce) t 0.8V @ V = 3.3V,
OLP
CC
T
amb
= 25°C
The operation of each half of the ‘‘393’’ is the same as the ‘‘93’’
except no external clock connections are required. The counters are
triggered by a HIGH-to-LOW transition of the clock inputs. The
counter outputs are internally connected to provide clock inputs to
succeeding stages. The outputs of the ripple counter do not change
synchronously and should not be used for high-speed address
decoding.
• Typical V
(output V undershoot) u 2V @ V = 3.3V,
OHV
OH
CC
T
amb
= 25°C
• Two 4-bit binary counters with individual clocks
• Divide-by any binary module up to 28 in one package
• Two master resets to clear each 4-bit counter individually
• Output capability: standard
The master resets are active-HIGH asynchronous inputs to each
4-bit counter identified by the ‘‘1’’ and ‘‘2’’ in the pin description.
• I category: MSI
CC
A HIGH level on the nMR input overrides the clock and sets the
outputs LOW.
QUICK REFERENCE DATA
GND = 0V; T
= 25°C; t = t v2.5 ns
amb
r f
SYMBOL
PARAMETER
Propagation delay
CONDITIONS
TYPICAL
UNIT
nCP to nQ
nQ to nQn+1
nMR to nQn
12
4
11
0
t
f
/t
ns
PHL PLH
C = 15pF
L
V
CC
= 3.3V
Maximum clock frequency
Input capacitance
99
3.5
23
MHz
pF
max
C
C
I
1
Power dissipation capacitance per flip-flop
V = GND to V
I CC
pF
PD
NOTE:
1. C is used to determine the dynamic power dissipation (P in µW)
PD
D
2
2
P
= C V
f )S (C V
f ) where:
D
PD
CC
i
L
CC o
f = input frequency in MHz; C = output load capacity in pF;
i
L
f = output frequency in MHz; V = supply voltage in V;
o
CC
2
S (C V
f ) = sum of the outputs.
L
CC
o
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74LV393 N
PKG. DWG. #
SOT27-1
14-Pin Plastic DIL
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
74LV393 N
74LV393 D
14-Pin Plastic SO
74LV393 D
SOT108-1
SOT337-1
SOT402-1
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
74LV393 DB
74LV393 PW
74LV393 DB
74LV393PW DH
PIN CONFIGURATION
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
Clock inputs
V
1CP
1MR
1
2
3
4
5
6
7
14
13
CC
2CP
1, 13
1CP, 2CP
(HIGH-to-LOW, edge-triggered)
2MR
1Q
0
1Q
1
1Q
2
1Q
3
12
11
10
9
Asynchronous master reset inputs
(active HIGH)
2Q
0
2, 12
1MR, 2MR
2Q
1
3, 4, 5, 6
11, 10, 9, 8
1Q to 1Q
0
3
3
Flip-flop outputs
2Q to 2Q
2Q
2
0
7
GND
Ground (0V)
GND
2Q
3
8
14
V
CC
Positive supply voltage
SV00672
2
1998 Jun 10
853–1936 19545
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74LV393
LOGIC SYMBOL
FUNCTIONAL DIAGRAM
1Q
0
1
1CP
3
1Q
3
1
2
1CP
1
0
4–BIT
BINARY
RIPPLE
1Q
1Q
4
5
1
1Q
1Q
4
5
1
2
2
COUNTER
2
1MR
1Q
6
3
0
1MR
1Q
6
3
0
2Q
2CP
11
13
2Q
11
4–BIT
BINARY
RIPPLE
13
12
2CP
2
2Q
2Q
10
9
1
2Q
2Q
10
9
1
2
COUNTER
2
12 2MR
2Q
3
8
2MR
2Q
3
8
SV00673
SV00675
LOGIC SYMBOL (IEEE/IEC)
STATE DIAGRAM
CTR4
0
1
2
3
4
5
6
7
3
4
5
6
0
3
2
15
14
13
12
CT=0
CT
1
+
11
10
9
8
CTR4
11
10
9
0
3
SV00676
12
13
CT=0
+
CT
COUNT SEQUENCE FOR 1 COUNTER
OUTPUTS
COUNT
8
Q
Q
Q
Q
3
0
1
2
0
1
2
3
L
H
L
L
L
H
H
L
L
L
L
L
L
L
L
SV00674
H
4
5
6
7
L
H
L
L
L
H
H
H
H
H
H
L
L
L
L
H
8
9
10
11
L
H
L
L
L
H
H
L
L
L
L
H
H
H
H
H
12
13
14
15
L
H
L
L
L
H
H
H
H
H
H
H
H
H
H
H
3
1998 Jun 10
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74LV393
LOGIC DIAGRAM
Q
Q
Q
Q
FF2
FF3
FF4
FF1
CP
T
T
T
T
R
R
R
R
D
D
D
D
MR
Q
0
Q
1
Q
2
Q
3
SV00677
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
MIN
1.0
0
TYP
3.3
–
MAX
UNIT
V
CC
See Note 1
3.6
V
V
V
V
I
Input voltage
V
CC
V
CC
V
O
Output voltage
0
–
Operating ambient temperature range in free
air
See DC and AC
characteristics
–40
–40
+85
+125
T
amb
°C
V
CC
V
CC
V
CC
= 1.0V to 2.0V
= 2.0V to 2.7V
= 2.7V to 3.6V
–
–
–
–
–
–
500
200
100
t , t
r
Input rise and fall times
ns/V
f
NOTES:
1. The LV is guaranteed to function down to V = 1.0V (input levels GND or V ); DC characteristics are guaranteed from V = 1.2V to V =3.6V.
CC
CC
CC
CC
1, 2
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +4.6
20
UNIT
V
CC
V
±I
IK
DC input diode current
DC output diode current
V < –0.5 or V > V + 0.5V
mA
mA
I
I
CC
±I
OK
V
O
< –0.5 or V > V + 0.5V
50
O
CC
DC output source or sink current
– standard outputs
±I
O
–0.5V < V < V + 0.5V
25
mA
O
CC
DC V or GND current for types with
– standard outputs
CC
±I
±I
,
50
mA
GND
CC
T
stg
Storage temperature range
–65 to +150
°C
Power dissipation per package
– plastic DIL
– plastic mini-pack (SO)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
P
TOT
mW
– plastic shrink mini-pack (SSOP and TSSOP)
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
4
1998 Jun 10
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74LV393
DC CHARACTERISTICS FOR THE LV FAMILY
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
MAX
-40°C to +85°C
-40°C to +125°C
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
V
1
MIN
0.9
1.4
2.0
TYP
MIN
0.9
1.4
2.0
MAX
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.2V
HIGH level Input
voltage
= 2.0V
V
IH
= 2.7 to 3.6V
= 1.2V
0.3
0.6
0.8
0.3
0.6
0.8
LOW level Input
voltage
= 2.0V
V
IL
V
= 2.7 to 3.6V
= 1.2V; V = V or V –I = 100µA
1.2
2.0
2.7
3.0
I
IH
IL;
O
= 2.0V; V = V or V –I = 100µA
1.8
2.5
2.8
1.8
2.5
2.8
I
IH
IL;
O
HIGH level output
voltage; all outputs
= 2.7V; V = V or V –I = 100µA
I
IH
IL;
O
= 3.0V; V = V or V –I = 100µA
V
OH
V
I
IH
IL;
O
HIGH level output
voltage;
STANDARD
outputs
V
CC
= 3.0V; V = V or V –I = 6mA
2.40
2.82
2.20
I
IH
IL;
O
V
CC
V
CC
V
CC
V
CC
= 1.2V; V = V or V I
IL; O
= 100µA
= 100µA
= 100µA
= 100µA
0
0
0
0
I
IH
= 2.0V; V = V or V I
IL; O
0.2
0.2
0.2
0.2
0.2
0.2
I
IH
LOW level output
voltage; all outputs
= 2.7V; V = V or V
I
I
IH
IL; O
= 3.0V; V = V or V
I
V
OL
V
I
IH
IL; O
LOW level output
voltage;
STANDARD
outputs
V
CC
= 3.0V; V = V or V I = 6mA
IL; O
0.25
0.40
0.50
I
IH
Input leakage
current
I
V
V
= 3.6V; V = V or GND
1.0
1.0
µA
µA
I
CC
I
CC
Quiescent supply
current; MSI
I
= 3.6V; V = V or GND; I = 0
20.0
160
CC
CC
I
CC
O
Additional
quiescent supply
current per input
∆I
CC
V
CC
= 2.7V to 3.6V; V = V – 0.6V
500
850
µA
I
CC
NOTE:
1. All typical values are measured at T
= 25°C.
amb
5
1998 Jun 10
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74LV393
AC CHARACTERISTICS
GND = 0V; t = t ≤ 2.5ns; C = 50pF; R = 1KW
r
f
L
L
LIMITS
–40 to +85 °C
CONDITION
(V)
–40 to +125 °C
SYMBOL
PARAMETER
WAVEFORM
UNIT
1
V
CC
MIN
–
TYP
75
MAX
–
MIN
–
MAX
–
1.2
2.0
2.7
–
26
49
36
29
–
–
60
44
35
–
Propagation delay
nCP to nQ
t
t
Figure 1
Figure 1
Figure 2
ns
PHL/ PLH
0
–
19
–
2
3.0 to 3.6
1.2
–
14
–
–
25
9
–
2.0
–
17
13
10
–
–
20
15
12
–
Propagation delay
nQn to nQn+1
t
t
ns
ns
PHL/ PLH
2.7
–
6
–
2
3.0 to 3.6
1.2
–
5
–
–
70
24
18
–
2.0
–
44
33
26
–
–
54
40
32
–
Propagation delay
nMR to nQn
t
PHL
2.7
–
–
2
3.0 to 3.6
2.0
–
13
10
8
–
34
25
20
34
25
20
–
41
30
24
41
30
24
–
Clock pulse width
HIGH or LOW
t
W
Figure 1
Figure 2
ns
ns
2.7
–
–
2
3.0 to 3.6
2.0
6
–
–
12
9
–
–
Master reset pulse
width; HIGH
t
W
2.7
–
–
2
3.0 to 3.6
1.2
7
–
–
5
2
2
–
–
2.0
5
–
5
–
Removal time
nMR to nCP
t
Figure 2
Figure 1
ns
rem
2.7
5
–
5
–
2
3.0 to 3.6
2.0
5
1
–
5
–
14
19
24
53
72
–
12
16
20
–
Maximum clock
pulse frequency
f
MHz
2.7
–
–
max
2
3.0 to 3.6
90
–
–
NOTES:
1. All typical values are measured at T
= 25°C
amb
2. Typical values are measured at V = 3.3V
CC
6
1998 Jun 10
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74LV393
AC WAVEFORMS
TEST CIRCUIT
V
V
V
= 1.5V at V w 2.7V
M
CC
= 0.5 * V at V t 2.7V
V
CC
M
CC
CC
and V are the typical output voltage drop that occur with the
OL
OH
output load.
V
V
O
I
1/f
max
PULSE
GENERATOR
V
D.U.T.
CC
50pF
R
= 1k
nCP INPUT
GND
V
M
L
R
T
C
L
t
PLH
t
PHL
Test Circuit for switching times
DEFINITIONS
V
OH
R
L
C
L
R
T
= Load resistor
nQ OUTPUT
n
V
M
= Load capacitance includes jig and probe capacitance
= Termination resistance should be equal to Z of pulse generators.
V
OL
OUT
SV00678
TEST
V
V
I
CC
Figure 1. Clock (nCP) to output (1Qn, 2Qn) propagation delays,
the clock pulse width, and the maximum clock frequency
t
t
< 2.7V
V
CC
PLH/ PHL
2.7–3.6V
2.7V
V
CC
SV00901
nMR INPUT
GND
V
M
Figure 3. Load circuitry for switching times
t
W
t
rem
V
CC
V
nCP INPUT
GND
M
t
PHL
V
OH
nQ OUTPUT
n
V
M
V
OL
SV00679
Figure 2. Master reset (nMR) pulse width,
the master reset to output (Qn) propagation delays,
and the master reset to clock (nCP) removal time
7
1998 Jun 10
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74LV393
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
8
1998 Jun 10
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74LV393
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
9
1998 Jun 10
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74LV393
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
10
1998 Jun 10
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74LV393
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
11
1998 Jun 10
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74LV393
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
Preproduction Product
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-04451
Document order number:
Philips
Semiconductors
相关型号：
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