74LV574N [NXP]
Octal D-type flip-flop; positive edge-trigger 3-State; 八路D型触发器;正边沿触发三态型号: | 74LV574N |
厂家: | NXP |
描述: | Octal D-type flip-flop; positive edge-trigger 3-State |
文件: | 总12页 (文件大小:125K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74LV574
Octal D-type flip-flop;
positive edge-trigger (3-State)
Product specification
1998 Jun 10
Supersedes data of 1997 Feb 03
IC24 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV574
FEATURES
• Wide operating voltage: 1.0 to 5.5V
• Optimized for Low Voltage applications: 1.0 to 3.6V
DESCRIPTION
The 74LV574 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT574.
The 74LV574 is an octal D-type flip–flop featuring separate D-type
inputs for each flip-flop and non-inverting 3-state outputs for bus
oriented applications. A clock (CP) and an output enable (OE) input
are common to all flip-flops.
• Accepts TTL input levels between V = 2.7V and V = 3.6V
CC
CC
• Typical V
(output ground bounce) t 0.8V at V = 3.3V,
OLP
CC
T
= 25°C
amb
The eight flip-flops will store the state of their individual D-inputs that
meet the set-up and hold times requirements on the LOW-to-HIGH
CP transition.
• Typical V
(output V undershoot) u 2V at V = 3.3V,
OHV
OH
CC
T
= 25°C
amb
• Common 3-State output enable input
• Output capability: bus driver
When OE is LOW, the contents of the eight flip-flops is available at
the outputs. When OE is HIGH, the outputs go to the high
impedance OFF-state. Operation of the OE input does not affect the
state of the flip-flops.
• I category: MSI
CC
QUICK REFERENCE DATA
GND = 0V; T
= 25°C; t =t v2.5 ns
amb
r f
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
C = 15pF
L
Propagation delay
CP to Q
V
CC
= 3.3V
t
f
/t
13
ns
PHL PLH
n
Maximum clock frequency
Input capacitance
C = 15pF, V = 3.3V
77
3.5
25
MHz
pF
max
L
CC
C
C
I
Power dissipation capacitance per flip-flop
Notes 1 and 2
pF
PD
NOTES:
1. C is used to determine the dynamic power dissipation (P in µW)
PD
D
2
2
P
= C V
x f )S (C V
f ) where:
D
PD
CC
i
L
CC o
f = input frequency in MHz; C = output load capacity in pF;
i
L
f = output frequency in MHz; V = supply voltage in V;
o
CC
2
S (C V
f ) = sum of the outputs.
L
CC
o
2. The condition is V = GND to V
I
CC
ORDERING AND PACKAGE INFORMATION
OUTSIDE NORTH
AMERICA
PACKAGES
TEMPERATURE RANGE
NORTH AMERICA
PKG. DWG. #
20-Pin Plastic DIL
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
74LV574 N
74LV574 D
74LV574 N
74LV574 D
SOT146-1
SOT163-1
SOT339-1
SOT360-1
20-Pin Plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
74LV574 DB
74LV574 PW
74LV574 DB
74LV574PW DH
PIN DESCRIPTION
FUNCTION TABLE
PIN NUMBER SYMBOL
FUNCTION
INPUTS
OUTPUTS
Q0 to Q7
OPERATING
MODES
INTERNAL
FLIP-FLOPS
1
OE
Output enabled input (active LOW)
OE CP Dn
2, 3, 4, 5,
6, 7, 8, 9
Load and read
register
L
L
↑
↑
l
h
L
H
L
H
D0–D7
Data inputs
19, 18, 17, 16,
15, 14, 13, 12
Load register and
disable outputs
H
H
↑
↑
l
h
L
H
Z
Z
Q0–Q7
GND
CP
3-State flip-flop outputs
Ground (0V)
10
11
20
H
h
=
=
HIGH voltage level
HIGH voltage level one set-up time prior to the
LOW-to-HIGH CP transition
Clock input (LOW-to-HIGH,
edge-triggered)
L
l
=
=
LOW voltage level
LOW voltage level one set-up time prior to the
LOW-to-HIGH CP transition
VCC
Positive supply voltage
Z
↑
=
=
High impedance OFF-state
LOW–to–HIGH clock transition
2
1998 Jun 10
853-1990 19545
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV574
PIN CONFIGURATION
LOGIC SYMBOL (IEEE/IEC)
11
1
C1
EN
1
2
OE
D0
20
19
VCC
Q0
Q1
Q2
Q3
Q4
3
D1
D2
18
17
16
15
2
19
1D
4
3
4
5
6
7
8
9
18
17
16
15
5
D3
6
D4
D5
7
14
13
12
11
Q5
Q6
Q7
CP
D6
8
14
13
12
9
D7
10
GND
SV00714
SV00716
LOGIC SYMBOL
FUNCTIONAL DIAGRAM
2
3
4
5
D0
D1
D2
D3
19
18
17
16
15
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
11
CP
2
3
4
5
6
7
8
9
D0
D1
D2
D3
D4
D5
D6
D7
19
18
17
16
15
14
13
12
Q0
Q1
Q2
Q3
Q4
Q5
Q6
3–STATE
OUTPUTS
FF1 to FF8
6
7
8
9
D4
D5
D6
D7
14
13
12
Q7
11
1
CP
OE
OE
1
SV00715
SV00717
3
1998 Jun 10
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV574
LOGIC DIAGRAM
D0
D1
D2
D3
D4
D5
D6
D7
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP
CP
CP
CP
CP
CP
CP
FF1
FF2
FF3
FF4
FF5
FF6
FF7
FF8
CP
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
SV00342
1, 2
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
UNIT
V
V
CC
–0.5 to +7.0
±I
DC input diode current
DC output diode current
V < –0.5 or V > V + 0.5V
20
50
mA
mA
IK
I
I
CC
±I
OK
V
O
< –0.5 or V > V + 0.5V
O
CC
DC output source or sink current
– bus driver outputs
±I
O
–0.5V < V < V + 0.5V
35
mA
O
CC
DC V or GND current for types with
–bus driver outputs
CC
±I
±I
,
70
mA
GND
CC
T
stg
Storage temperature range
–65 to +150
°C
Power dissipation per package
–plastic DIL
–plastic mini-pack (SO)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
P
TOT
mW
–plastic shrink mini-pack (SSOP and TSSOP)
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
1.0
0
TYP.
3.3
–
MAX
UNIT
1
V
CC
DC supply voltage
See Note
5.5
V
V
V
V
I
Input voltage
V
CC
V
CC
V
O
Output voltage
0
–
Operating ambient temperature range in free
air
See DC and AC
characteristics
–40
–40
+85
+125
T
amb
°C
V
CC
V
CC
V
CC
V
CC
= 1.0V to 2.0V
= 2.0V to 2.7V
= 2.7V to 3.6V
= 3.6V to 5.5V
–
–
–
–
–
–
–
–
500
200
100
50
t , t
r
Input rise and fall times
ns/V
f
NOTES:
1. The LV is guaranteed to function down to V = 1.0V (input levels GND or V ); DC characteristics are guaranteed from V = 1.2V to V = 5.5V.
CC
CC
CC
CC
4
1998 Jun 10
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV574
DC CHARACTERISTICS FOR THE LV FAMILY
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
MAX
-40°C to +85°C
-40°C to +125°C
SYMBOL
PARAMETER
TEST CONDITIONS
= 1.2V
UNIT
1
MIN
0.9
1.4
2.0
TYP
MIN
0.9
1.4
2.0
MAX
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.0V
HIGH level Input
voltage
V
IH
V
= 2.7 to 3.6V
= 4.5 to 5.5V
= 1.2V
0.7*V
0.7*V
CC
CC
0.3
0.6
0.8
0.3
0.6
0.8
= 2.0V
LOW level Input
voltage
V
IL
V
V
= 2.7 to 3.6V
= 4.5 to 5.5
0.3*V
0.3*V
CC
CC
= 1.2V; V = V or V –I = 100µA
1.2
2.0
2.7
3.0
4.5
I
IH
IL;
O
= 2.0V; V = V or V –I = 100µA
1.8
2.5
2.8
4.3
1.8
2.5
2.8
4.3
I
IH
IL;
O
HIGH level output
voltage; all outputs
= 2.7V; V = V or V –I = 100µA
I
IH
IL;
O
= 3.0V; V = V or V –I = 100µA
I
IH
IL;
O
V
OH
= 4.5V;V = V or V –I = 100µA
I
IH
IL;
O
HIGH level output
voltage; BUS driver
outputs
V
CC
V
CC
= 3.0V;V = V or V –I = 8mA
2.40
3.60
2.82
4.20
2.20
3.50
I
IH
IL;
O
= 4.5V;V = V or V –I = 16mA
I
IH
IL;
O
V
V
V
V
V
= 1.2V; V = V or V
I
I
I
= 100µA
= 100µA
= 100µA
0
0
0
0
0
CC
CC
CC
CC
CC
I
IH
IL;
IL;
IL;
O
O
O
= 2.0V; V = V or V
0.2
0.2
0.2
0.2
0.2
I
IH
LOW level output
voltage; all outputs
= 2.7V; V = V or V
0.2
0.2
0.2
I
IH
= 3.0V;V = V or V
I
= 100µA
= 100µA
I
IH
IL;
IL;
O
O
V
OL
V
= 4.5V;V = V or V
I
I
I
IH
LOW level output
voltage; BUS driver
outputs
V
= 3.0V;V = V or V
= 8mA
0.20
0.35
0.40
0.55
0.50
0.65
CC
CC
I
IH
IL;
IL;
O
O
V
= 4.5V;V = V or V
I
= 16mA
I
IH
Input leakage
current
I
V
= 5.5V; V = V or GND
1.0
5
1.0
10
µA
µA
µA
I
CC
I
CC
3-State output
OFF-state current
V
V
= 5.5V; V = V or V
I IH IL;
CC
O
I
OZ
CC
= V or GND
CC
Quiescent supply
current; MSI
I
V
CC
= 5.5V; V = V or GND; I = 0
20.0
160
I
CC
O
Additional
quiescent supply
current per input
∆I
CC
V
CC
= 2.7V to 3.6V; V = V –0.6V
500
850
µA
I
CC
NOTE:
1. All typical values are measured at T
= 25°C.
amb
5
1998 Jun 10
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV574
AC CHARACTERISTICS
GND = 0V; t = t ≤ 2.5ns; C = 50pF; R = 1KΩ
r
f
L
L
LIMITS
–40 to +85 °C
LIMITS
–40 to +125 °C
CONDITION
(V)
SYMBOL
PARAMETER
WAVEFORM
UNIT
V
CC
MIN
–
TYP
80
MAX
–
MIN
–
MAX
–
1.2
2.0
2.7
–
27
34
25
20
17
–
–
43
31
25
21
–
Propagation delay
CP to Qn
–
20
–
t
t
Figure 1, 4
Figure 2, 4
Figure 2, 4
ns
PHL/ PLH
2
3.0 to 3.6
4.5 to 5.5
1.2
–
15
–
–
–
–
–
70
24
18
–
2.0
–
34
25
20
17
–
–
43
31
25
21
–
3-State output
enable time
OE to Qn
2.7
–
–
t
t
t
ns
ns
PZH/ PZL
2
3.0 to 3.6
4.5 to 5.5
1.2
–
13
–
–
–
–
–
75
27
21
–
2.0
–
27
21
17
15
–
–
34
26
21
18
–
3-State output
disable time
OE to Qn
2.7
–
–
t
PHZ/ PLZ
2
3.0 to 3.6
4.5 to 5.5
2.0
–
16
–
–
–
9
6
–
34
25
20
–
41
30
24
–
Clock pulse width
HIGH or LOW
2.7
–
–
t
Figure 1
Figure 3
ns
ns
W
2
3.0 to 3.6
1.2
5
–
–
10
4
–
–
2.0
22
16
13
–
–
26
19
15
–
–
Set-up time
Dn to CP
t
su
2.7
3
–
–
2
3.0 to 3.6
1.2
2
–
–
–10
–4
–
–
2.0
5
–
5
–
Hold time
Dn to CP
t
Figure 3
Figure 1
ns
h
2.7
5
–3
–
5
–
2
3.0 to 3.6
2.0
5
–2
–
5
–
15
19
24
40
58
–
12
16
20
–
Maximum clock
2.7
–
–
f
MHz
max
2
3.0 to 3.6
70
–
–
NOTE:
1. Unless otherwise stated, all typical values are at T
= 25°C.
amb
2. Typical value measured at V = 3.3V.
CC
6
1998 Jun 10
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV574
AC WAVEFORMS
V
V
V
= 1.5V at V w 2.7V and v 3.6V
M
CC
V
I
= 0.5 * V at V t 2.7V and w 4.5V
M
CC
CC
and V are the typical output voltage drop that occur with the
OL
OH
(1)
CP INPUT
GND
V
M
output load.
V
X
V
X
V
Y
V
Y
= V + 0.3V at V w 2.7V and v 3.6V
OL CC
t
t
= V + 0.1V at V < 2.7V and w 4.5V
su
su
OL
CC
CC
t
h
t
h
= V – 0.3V at V w 2.7V and v 3.6V
OH
CC
= V – 0.1V at V < 2.7V and w 4.5V
V
I
OH
CC
CC
D
INPUT
GND
V
n
M
1/f
max
V
I
V
OH
CP INPUT
GND
V
M
Q
n
OUTPUT
V
M
t
W
V
OL
NOTE: the shaded areas indicate when the input is permitted to change
for predictable output performance.
t
t
PLH
PHL
V
OH
SV00345
Q
n
OUTPUT
V
M
Figure 3. Data set-up and hold times for the Dn input to the CP
input
V
OL
NOTE:
SV00718
The shaded areas indicate when the input is permitted to change for
Figure 1. Clock (CP) to output (Qn) propagation delays, the
clock pulse (CP) and the maximum clock pulse frequency
predictable output performance.
TEST CIRCUIT
V
I
V
OE INPUT
GND
M
V
CC
2 * V
Open
GND
CC
t
t
PLZ
PZL
R
R
= 1k
L
L
V
V
V
O
CC
I
OUTPUT
LOW-to-OFF
OFF-to-LOW
PULSE
GENERATOR
D.U.T.
V
M
V
X
= 1k
R
V
OL
T
50 pF
C
L
t
PZH
t
PHZ
Test Circuit for Outputs
V
OH
V
Y
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
DEFINITIONS
V
M
R
C
R
= Load resistor
L
L
T
= Load capacitance includes jig and probe capacitiance.
GND
= Termination resistance should be equal to Z
of pulse generators.
OUT
outputs
enabled
outputs
disabled
outputs
enabled
SWITCH POSITION
SV00344
S
TEST
V
V
I
1
CC
Figure 2. 3-state enable and disable times
t
t
Open
2 * V
< 2.7V
V
CC
PLH/ PHL
t
t
t
2.7V
PLZ/ PZL
CC
2.7–3.6V
V
w 4.5V
CC
t
GND
PHZ/ PZH
SV00896
Figure 4. Load circuitry for switching times
7
1998 Jun 10
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV574
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
8
1998 Jun 10
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV574
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
9
1998 Jun 10
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV574
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
10
1998 Jun 10
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV574
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
11
1998 Jun 10
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV574
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
Preproduction Product
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-04454
Document order number:
Philips
Semiconductors
相关型号:
74LV574PWDH-T
IC LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, Bus Driver/Transceiver
NXP
74LV595D,112
74LV595 - 8-bit serial-in/serial-out or parallel-out shift register; 3-state SOP 16-Pin
NXP
©2020 ICPDF网 联系我们和版权申明