74LVC02DB-T [NXP]
IC LVC/LCX/Z SERIES, QUAD 2-INPUT NOR GATE, PDSO14, PLASTIC, SSOP2-14, Gate;
| 型号： | 74LVC02DB-T |
| 厂家： | 
NXP |
| 描述： | IC LVC/LCX/Z SERIES, QUAD 2-INPUT NOR GATE, PDSO14, PLASTIC, SSOP2-14, Gate |
| 文件： | 总10页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74LVC02A
Quad 2-input NOR gate
Product specification
1998 Apr 28
Supersedes data of 1997 Aug 11
IC24 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74LVC02A
FEATURES
• Wide supply range of 1.2V to 3.6V
• Complies with JEDEC standard no. 8-1A
• Inputs accept voltages up to 5.5V
• CMOS low power consumption
DESCRIPTION
The 74LVC02A is a high performance, low-power, low-voltage,
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature
allows the use of these devices as translators in a mixed 3.3 V/5 V
environment.
• Direct interface with TTL levels
The 74LVC02A provides the 2-input NOR function.
• 5-volt tolerant inputs, for interfacing with 5-volt logic
QUICK REFERENCE DATA
GND = 0 V; T
= 25°C; t = t v2.5 ns
amb
r f
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
t
Propagation delay
nA, nB to nY
C = 50 pF;
PHL
PLH
L
2.8
ns
V
CC
= 3.3 V
C
Input capacitance
5.0
28
pF
pF
I
C
Power dissipation capacitance per gate
Notes 1 and 2
PD
NOTES:
1. C is used to determine the dynamic power dissipation (P in µW)
PD
D
2
2
P
= C × V
× f )ȍ (C × V
× f ) where:
D
PD
CC
i
L
CC o
f = input frequency in MHz; C = output load capacity in pF;
i
L
f = output frequency in MHz; V = supply voltage in V;
o
CC
2
ȍ (C × V
× f ) = sum of the outputs.
L
CC
o
2. The condition is V = GND to V
I
CC.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74LVC02A D
DWG NUMBER
SOT108-1
14-Pin Plastic SO
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74LVC02A D
74LVC02A DB
74LVC02A PW
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
74LVC02A DB
SOT337-1
74LVC02APW DH
SOT402-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN
SYMBOL
NUMBER
NAME AND FUNCTION
1Y
1A
1
2
3
4
5
6
7
14
13
12
11
10
9
V
CC
1, 4, 10, 13
2, 5, 8, 11
3, 6, 9, 12
7
1Y – 4Y
1A – 4A
1B – 4B
GND
Data outputs
Data inputs
Ground (0 V)
4Y
4B
4A
3Y
3B
3A
1B
2Y
2A
14
V
CC
Positive supply voltage
2B
GND
8
SV00389
2
1998 Apr 28
853-2019 19310
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74LVC02A
LOGIC SYMBOL
LOGIC DIAGRAM (ONE GATE)
A
B
2
3
1A
1B
1Y
2Y
3Y
4Y
1
Y
5
6
2A
2B
4
8
9
3A
3B
SV00820
10
13
11
12
4A
4B
FUNCTION TABLE
INPUTS
OUTPUTS
nY
SV00390
nA
nB
L
L
H
H
L
H
L
H
L
L
L
LOGIC SYMBOL (IEEE/IEC)
2
3
≥1
≥1
≥1
≥1
H
1
4
NOTES:
5
6
H = HIGH voltage level
L = LOW voltage level
8
9
10
11
12
13
SV00391
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
CONDITIONS
UNIT
MIN
2.7
1.2
0
MAX
3.6
V
V
DC supply voltage (for max. speed performance)
DC supply voltage (for low-voltage applications)
DC Input voltage range
V
V
CC
3.6
CC
V
I
5.5
V
V
O
DC output voltage range
0
V
CC
V
T
amb
Operating ambient temperature range in free-air
–40
+85
°C
V
CC
V
CC
= 1.2 to 2.7V
= 2.7 to 3.6V
0
0
20
10
t , t
r
Input rise and fall times
ns/V
f
3
1998 Apr 28
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74LVC02A
1
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
DC supply voltage (for max. speed
performance)
V
–0.5 to +6.5
V
CC
IK
I
DC input diode current
DC input voltage
V t0
–50
–0.5 to +5.5
"50
mA
V
I
V
Note 2
I
I
DC output diode current
DC output voltage
V
O
uV or V t 0
mA
V
OK
CC
O
V
Note 2
= 0 to V
CC
–0.5 to V + 0.5
O
CC
I
DC output source or sink current
V
O
mA
mA
°C
"50
"100
O
I
, I
DC V or GND current
GND CC
CC
T
stg
Storage temperature range
–65 to +150
Power dissipation per package
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
P
TOT
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
500
500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
UNIT
1
MIN
TYP
MAX
V
V
V
V
V
V
V
V
V
V
V
= 1.2V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
V
HIGH level Input voltage
LOW level Input voltage
V
V
IH
= 2.7 to 3.6V
= 1.2V
2.0
GND
0.8
V
IL
= 2.7 to 3.6V
= 2.7V; V = V or V ; I = –12mA
V
V
V
V
*0.5
I
IH
IL
O
CC
CC
CC
CC
= 3.0V; V = V or V ; I = –100µA
*0.2
*0.6
*0.8
V
CC
I
IH
IL
O
O
O
V
OH
HIGH level output voltage
LOW level output voltage
V
V
= 3.0V; V = V or V
I
I
= –18mA
= –24mA
I
IH
IL;
IL;
= 3.0V; V = V or V
I
IH
= 2.7V; V = V or V ; I = 12mA
0.40
0.20
0.55
"5
10
I
IH
IL
O
= 3.0V; V = V or V ; I = 100µA
V
OL
I
IH
IL
O
O
= 3.0V; V = V or V
I
= 24mA
I
IH
IL;
"0.1
I
Input leakage current
V
CC
V
CC
= 3.6V; V = 5.5V or GND
µA
µA
I
I
I
Quiescent supply current
= 3.6V; V = V or GND; I = 0
0.1
CC
I
CC
O
Additional quiescent supply current
per input pin
∆I
CC
V
CC
= 2.7V to 3.6V; V = V –0.6V; I = 0
5
500
µA
I
CC
O
NOTES:
1. All typical values are at V = 3.3V and T
= 25°C.
amb
CC
4
1998 Apr 28
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74LVC02A
AC CHARACTERISTICS
GND = 0 V; t = t v 2.5 ns; C = 50 pF
r
f
L
LIMITS
SYMBOL
PARAMETER
WAVEFORM
UNIT
V
CC
= 3.3V ±0.3V
V
CC
= 2.7V
V
CC
= 1.2V
1
1
MIN
TYP
MAX
4.6
MIN
TYP
MAX
TYP
11
Propagation delay
nA, nB to nY
t
/t
Figures 1, 2
1.5
2.8
1.5
3.2
5.6
ns
PHL PLH
NOTE:
1. These typical values are at V = 3.3V and T
= 25°C.
amb
CC
AC WAVEFORMS
TEST CIRCUIT
V
V
V
= 1.5 V at V w 2.7 V
M
CC
S
1
= 0.5 S V at V < 2.7 V
M
CC
CC
2 < V
Open
GND
CC
V
CC
and V are the typical output voltage drop that occur with the
OL
OH
output load.
500Ω
500Ω
V
V
O
I
PULSE
GENERATOR
D.U.T.
V
I
50pF
C
L
R
T
nA, nB, INPUT
GND
V
M
V
V
CC
I
Test
/t
S
1
t
t
PLH
PHL
t 2.7V
2.7V – 3.6V
V
CC
V
OH
t
Open
PLH PHL
2.7V
nY OUTPUT
V
M
SY00077
V
Waveform 2. Load circuitry for switching times.
OL
SV00392
Waveform 1. Input (nA, nB) to output (nY) propagation delays.
5
1998 Apr 28
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74LVC02A
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
6
1998 Apr 28
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74LVC02A
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
7
1998 Apr 28
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74LVC02A
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
8
1998 Apr 28
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74LVC02A
NOTES
9
1998 Apr 28
Philips Semiconductors
Product specification
Quad 2-input NOR gate
74LVC02A
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-04477
Document order number:
Philips
Semiconductors
相关型号：
74LVC04AD-T
IC LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14, 3.90 MM, PLASTIC, MS-012, SOT108-1, SOP-14, Gate
NXP
©2020 ICPDF网 联系我们和版权申明