74LVC1G07GW-Q100H [NXP]
74LVC1G07-Q100 - Buffer with open-drain output TSSOP 5-Pin;
| 型号： | 74LVC1G07GW-Q100H |
| 厂家： | 
NXP |
| 描述： | 74LVC1G07-Q100 - Buffer with open-drain output TSSOP 5-Pin 光电二极管 逻辑集成电路 |
| 文件： | 总13页 (文件大小：103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LVC1G07-Q100
Buffer with open-drain output
Rev. 1 — 23 May 2013
Product data sheet
1. General description
The 74LVC1G07-Q100 provides the non-inverting buffer.
The output of this device is an open drain and can be connected to other open-drain
outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device in a mixed 3.3 V and 5 V environment.
Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall
time.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
74LVC1G07-Q100
NXP Semiconductors
Buffer with open-drain output
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74LVC1G07GW-Q100 40 C to +125 C
TSSOP5
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
SOT353-1
74LVC1G07GV-Q100 40 C to +125 C
SC-74A
plastic surface-mounted package; 5 leads
SOT753
4. Marking
Table 2.
Marking
Type number
Marking code[1]
74LVC1G07GW-Q100
74LVC1G07GV-Q100
VS
V07
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Y
A
Y
4
2
2
4
A
Y
A
mna623
mna624
GND mna591
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram
6. Pinning information
6.1 Pinning
ꢀꢁ/9&ꢂ*ꢃꢀꢄ4ꢂꢃꢃ
ꢁ
ꢂ
ꢃ
ꢄ
QꢀFꢀ
$
9
<
&&
ꢅ
*1'
DDDꢀꢁꢁꢂꢃꢄꢅ
Fig 4. Pin configuration SOT353-1 and SOT753
74LVC1G07_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 23 May 2013
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74LVC1G07-Q100
NXP Semiconductors
Buffer with open-drain output
6.2 Pin description
Table 3.
Symbol
n.c.
Pin description
Pin
1
Description
not connected
data input
A
2
GND
Y
3
ground (0 V)
data output
4
VCC
5
supply voltage
7. Functional description
Table 4.
Function table[1]
Input A
Output Y
L
L
Z
H
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
0.5
50
0.5
50
0.5
0.5
-
Max
+6.5
-
Unit
V
supply voltage
input clamping current
input voltage
VI < 0 V
mA
V
[1]
VI
+6.5
-
IOK
output clamping current
output voltage
VO < 0 V
mA
V
[1]
VO
Active mode
+6.5
+6.5
50
[1][2]
Power-down mode
VO = 0 V to 6.5 V
V
IO
output current
mA
mA
mA
C
ICC
IGND
Tstg
Ptot
supply current
-
100
-
ground current
100
65
-
storage temperature
total power dissipation
+150
250
[3]
Tamb = 40 C to +125 C
mW
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
74LVC1G07_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 23 May 2013
3 of 13
74LVC1G07-Q100
NXP Semiconductors
Buffer with open-drain output
9. Recommended operating conditions
Table 6.
Symbol
VCC
Recommended operating conditions
Parameter
Conditions
Min
Typ
Max
5.5
5.5
5.5
5.5
+125
20
Unit
V
supply voltage
input voltage
output voltage
1.65
-
-
-
-
-
-
-
VI
0
V
VO
Active mode
0
V
Power-down mode; VCC = 0 V
0
V
Tamb
ambient temperature
40
C
ns/V
ns/V
t/V
input transition rise and VCC = 1.65 V to 2.7 V
-
-
fall rate
VCC = 2.7 V to 5.5 V
10
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
VIH
HIGH-level
input voltage
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
0.65VCC
-
-
-
-
-
-
-
-
-
0.65VCC
-
V
V
V
V
V
V
V
V
1.7
-
1.7
-
2.0
-
-
2.0
-
-
V
CC = 4.5 V to 5.5 V
0.7VCC
0.7VCC
VIL
LOW-level
input voltage
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
VI = VIH or VIL
-
-
-
-
0.35VCC
0.7
-
-
-
-
0.35VCC
0.7
0.8
0.8
0.3VCC
0.3VCC
VOL
LOW-level
output voltage
IO = 100 A;
-
-
0.10
-
0.10
V
VCC = 1.65 V to 5.5 V
IO = 4 mA; VCC = 1.65 V
IO = 8 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
IO = 32 mA; VCC = 4.5 V
-
-
-
-
-
-
-
0.45
0.30
0.40
0.55
0.55
5
-
-
-
-
-
-
0.70
0.45
0.60
0.80
0.80
100
V
-
V
-
V
-
-
V
V
[2]
II
input leakage VI = 5.5 V or GND;
0.1
A
current
VCC = 0 V to 5.5 V
IOZ
IOFF
OFF-state
VI = VIH or VIL;
-
-
0.1
0.1
10
10
-
-
100
200
A
A
output current VO = VCC or GND; VCC = 5.5 V
power-off
leakage
current
VI or VO = 5.5 V; VCC = 0 V
74LVC1G07_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 23 May 2013
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NXP Semiconductors
Buffer with open-drain output
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
ICC
ICC
CI
supply current VI = 5.5 V or GND; IO = 0 A;
VCC = 1.65 V to 5.5 V
-
-
-
0.1
10
500
-
-
200
A
A
pF
[2]
additional
per pin; VI = VCC 0.6 V;
5
-
-
5000
-
supply current IO = 0 A; VCC = 2.3 V to 5.5 V
input
VCC = 3.3 V; VI = GND to VCC
5.0
capacitance
[1] All typical values are measured at Tamb = 25 C.
[2] These typical values are measured at VCC = 3.3 V.
11. Dynamic characteristics
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for load circuit see Figure 6.
Symbol Parameter Conditions 40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
[2]
tpd
propagation delay A to Y; see Figure 5
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
1.0
0.5
0.5
0.5
0.5
-
2.6
1.7
2.3
2.2
1.6
7.0
6.7
5.5
4.7
4.2
3.5
-
1.0
0.5
0.5
0.5
0.5
-
8.4
7.0
6.0
5.5
4.5
-
ns
ns
ns
ns
ns
pF
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
[3]
CPD
power dissipation VI = GND to VCC; VCC = 3.3 V
capacitance
[1] Typical values are measured at Tamb = 25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLZ and tPZL
[3] PD is used to determine the dynamic power dissipation (PD in W).
.
C
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
74LVC1G07_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 23 May 2013
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NXP Semiconductors
Buffer with open-drain output
12. Waveforms
V
I
V
A input
M
GND
t
t
PZL
PLZ
V
CC
Y output
V
M
V
V
X
OL
mna626
Measurement points are given in Table 9.
OL is the typical output voltage level that occurs with the output load.
V
Fig 5. The input (A) to output (Y) propagation delays
Table 9. Measurement points
Supply voltage
VCC
Input
VM
Output
VM
VX
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
0.5VCC
0.5VCC
1.5 V
1.5 V
0.5VCC
0.5VCC
0.5VCC
1.5 V
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VOL + 0.3 V
3.0 V to 3.6 V
4.5 V to 5.5 V
1.5 V
0.5VCC
74LVC1G07_Q100
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Product data sheet
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NXP Semiconductors
Buffer with open-drain output
V
EXT
V
CC
R
L
V
V
O
I
G
DUT
R
T
C
L
R
L
mna616
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 6. Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VCC
Input
VI
Load
CL
VEXT
tPZL, tPLZ
2VCC
2VCC
6 V
tr, tf
RL
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VCC
VCC
2.7 V
2.7 V
VCC
2.0 ns
2.0 ns
2.5 ns
2.5 ns
2.5 ns
30 pF
30 pF
50 pF
50 pF
50 pF
1 k
500
500
500
500
3.0 V to 3.6 V
4.5 V to 5.5 V
6 V
2VCC
74LVC1G07_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 23 May 2013
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NXP Semiconductors
Buffer with open-drain output
13. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
SOT353-1
D
E
A
X
c
y
H
v
M
A
E
Z
5
4
A
2
A
(A )
3
A
1
θ
L
L
p
1
3
e
w M
b
p
detail X
e
1
0
1.5
3 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
A
A
A
b
c
D
E
e
e
1
H
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
E
max.
0.1
0
1.0
0.8
0.30
0.15
0.25
0.08
2.25
1.85
1.35
1.15
2.25
2.0
0.46
0.21
0.60
0.15
7°
0°
mm
1.1
0.65
1.3
0.15
0.425
0.3
0.1
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
00-09-01
03-02-19
SOT353-1
MO-203
SC-88A
Fig 7. Package outline SOT353-1 (TSSOP5)
74LVC1G07_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 23 May 2013
8 of 13
74LVC1G07-Q100
NXP Semiconductors
Buffer with open-drain output
Plastic surface-mounted package; 5 leads
SOT753
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
1
2
3
p
detail X
e
b
p
w
M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.100
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
02-04-16
06-03-16
SOT753
SC-74A
Fig 8. Package outline SOT753 (SC-74A)
74LVC1G07_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 23 May 2013
9 of 13
74LVC1G07-Q100
NXP Semiconductors
Buffer with open-drain output
14. Abbreviations
Table 11. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MIL
Military
MM
Machine Model
TTL
Transistor-Transistor Logic
15. Revision history
Table 12. Revision history
Document ID
Release date
20130523
Data sheet status
Change notice
Supersedes
74LVC1G07_Q100 v.1
Product data sheet
-
-
74LVC1G07_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 23 May 2013
10 of 13
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NXP Semiconductors
Buffer with open-drain output
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use in automotive applications — This NXP
16.2 Definitions
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
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Draft — The document is a draft version only. The content is still under
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representations or warranties as to the accuracy or completeness of
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Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
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representation or warranty that such applications will be suitable for the
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Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
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Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
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shall an agreement be valid in which the NXP Semiconductors product is
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damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
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Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
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Notwithstanding any damages that customer might incur for any reason
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customer for the products described herein shall be limited in accordance
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Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
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Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74LVC1G07_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 23 May 2013
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NXP Semiconductors
Buffer with open-drain output
No offer to sell or license — Nothing in this document may be interpreted or
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Translations — A non-English (translated) version of a document is for
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Notice: All referenced brands, product names, service names and trademarks
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17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
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Product data sheet
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Buffer with open-drain output
18. Contents
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
8
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 12
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 23 May 2013
Document identifier: 74LVC1G07_Q100
相关型号：
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