74LVC1G08GW [NXP]
Single 2-input AND gate; 单路2输入与门
| 型号： | 74LVC1G08GW |
| 厂家： | 
NXP |
| 描述： | Single 2-input AND gate |
| 文件： | 总15页 (文件大小：84K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74LVC1G08
Single 2-input AND gate
Product specification
2004 Sep 15
Supersedes data of 2002 Oct 02
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
FEATURES
DESCRIPTION
• Wide supply voltage range from 1.65 V to 5.5 V
• High noise immunity
The 74LVC1G08 is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
• Complies with JEDEC standard:
– JESD8-7 (1.65 V to 1.95 V)
Input can be driven from either 3.3 V or 5 V devices.
These features allow the use of these devices in a mixed
3.3 V and 5 V environment.
– JESD8-5 (2.3 V to 2.7 V)
– JESD8B/JESD36 (2.7 V to 3.6 V).
• ±24 mA output drive (VCC = 3.0 V)
• CMOS low power consumption
• Latch-up performance ≤250 mA
• Direct interface with TTL levels
• Inputs accept voltages up to 5 V
Schmitt trigger action at all inputs makes the circuit tolerant
for slower input rise and fall time.
This device is fully specified for partial power-down
applications using Ioff. The Ioff circuitry disables the output,
preventing the damaging backflow current through the
device when it is powered down.
The 74LVC1G08 provides the single 2-input AND function.
• ESD protection:
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
• Multiple package options
• Specified from −40 °C to +85 °C and −40 °C to +125 °C.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
SYMBOL
PARAMETER
propagation delay
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ
3.4
ns
ns
ns
ns
ns
pF
pF
inputs A, B to output Y
VCC = 2.5 V; CL = 30 pF; RL = 500 Ω 2.2
VCC = 2.7 V; CL = 50 pF; RL = 500 Ω 2.5
V
CC = 3.3 V; CL = 50 pF; RL = 500 Ω 2.1
VCC = 5.0 V; CL = 50 pF; RL = 500 Ω 1.7
CI
input capacitance
5
CPD
power dissipation capacitance
VCC = 3.3 V; notes 1 and 2
16
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC
.
2004 Sep 15
2
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
FUNCTION TABLE
See note 1.
INPUT
OUTPUT
A
B
Y
L
L
L
H
L
L
L
H
H
L
H
H
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
TEMPERATURE
RANGE
PINS
PACKAGE MATERIAL
CODE
MARKING
74LVC1G08GW
74LVC1G08GV
74LVC1G08GM
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
5
5
6
SC-88A
SC-74A
XSON6
plastic
plastic
plastic
SOT353
SOT753
SOT886
VE
V08
VE
PINNING
PIN (TSSOP5 AND VSSOP5)
PIN (XSON6)
SYMBOL
DESCRIPTION
1
2
3
4
-
1
2
3
4
5
6
B
data input B
data input A
ground (0 V)
data output Y
not connected
supply voltage
A
GND
Y
n.c.
VCC
5
2004 Sep 15
3
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
08
B
A
1
2
3
6
5
4
V
CC
1
2
3
5
4
B
A
V
Y
CC
n.c.
Y
08
GND
GND
001aab639
001aab638
Transparent top view
Fig.1 Pin configuration SC-88A and SC-74A.
Fig.2 Pin configuration XSON6.
handbook, halfpage
1
1
2
B
A
handbook, halfpage
&
4
Y
4
2
MNA114
MNA113
Fig.3 Logic symbol.
Fig.4 IEE/IEC logic symbol.
A
B
Y
mna221
Fig.5 Logic diagram.
2004 Sep 15
4
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
PARAMETER
supply voltage
CONDITIONS
MIN.
1.65
MAX.
5.5
UNIT
V
VI
input voltage
0
5.5
VCC
5.5
+125
20
V
VO
output voltage
active mode
0
V
VCC = 0 V; Power-down mode
0
V
Tamb
tr, tf
operating ambient temperature
input rise and fall times
−40
0
°C
VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
ns/V
ns/V
0
10
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage −0.5 +6.5
V
IIK
input diode current
input voltage
VI < 0 V
note 1
−
−50
mA
V
VI
−0.5
−
+6.5
±50
IOK
VO
output diode current
output voltage
VO > VCC or VO < 0 V
mA
V
active mode; notes 1 and 2
−0.5
VCC + 0.5
+6.5
±50
Power-down mode; notes 1 and 2 −0.5
V
IO
output source or sink current
VCC or GND current
storage temperature
power dissipation
VO = 0 V to VCC
−
mA
mA
°C
mW
ICC, IGND
Tstg
−
±100
+150
250
−65
−
Ptot
Tamb = −40 °C to +125 °C
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
2004 Sep 15
5
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.(1)
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 °C to +85 °C
VIH HIGH-level input
1.65 to 1.95 0.65 × VCC
−
−
−
−
−
−
−
−
−
−
−
−
V
voltage
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
1.7
V
V
V
V
V
V
V
2.0
0.7 × VCC
VIL
LOW-level input
voltage
−
−
−
−
0.35 × VCC
0.7
0.8
0.3 × VCC
VOL
LOW-level output
voltage
VI = VIH or VIL
IO = 100 µA
IO = 4 mA
1.65 to 5.5
1.65
2.3
−
−
−
−
−
−
−
−
−
−
−
−
0.1
V
V
V
V
V
V
0.45
0.3
IO = 8 mA
IO = 12 mA
IO = 24 mA
IO = 32 mA
VI = VIH or VIL
IO = −100 µA
IO = −4 mA
IO = −8 mA
IO = −12 mA
IO = −24 mA
IO = −32 mA
2.7
0.4
3.0
0.55
0.55
4.5
VOH
HIGH-level output
voltage
1.65 to 5.5
1.65
2.3
V
CC − 0.1
−
−
−
−
−
−
−
V
1.2
1.9
2.2
2.3
3.8
−
−
V
−
V
2.7
−
V
3.0
−
V
4.5
−
V
ILI
input leakage
current
VI = 5.5 V or GND 5.5
±0.1
±0.1
0.1
5
±5
µA
Ioff
power OFF leakage VI or VO = 5.5 V
current
0
−
−
−
±10
10
µA
µA
µA
ICC
∆ICC
quiescent supply
current
VI = VCC or GND;
IO = 0 A
5.5
additionalquiescent VI = VCC − 0.6 V;
2.3 to 5.5
500
supply current per
pin
IO = 0 A
2004 Sep 15
6
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.(1)
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 °C to +125 °C
VIH
HIGH-level input
voltage
1.65 to 1.95 0.65 × VCC
−
−
−
−
−
−
−
−
−
−
−
−
V
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
1.7
V
V
V
V
V
V
V
2.0
0.7 × VCC
VIL
LOW-level input
voltage
−
−
−
−
0.35 × VCC
0.7
0.8
0.3 × VCC
VOL
LOW-level output
voltage
VI = VIH or VIL
IO = 100 µA
IO = 4 mA
1.65 to 5.5
1.65
2.3
−
−
−
−
−
−
−
−
−
−
−
−
0.1
V
V
V
V
V
V
0.70
0.45
0.60
0.80
0.80
IO = 8 mA
IO = 12 mA
IO = 24 mA
IO = 32 mA
VI = VIH or VIL
IO = −100 µA
IO = −4 mA
IO = −8 mA
IO = −12 mA
IO = −24 mA
IO = −32 mA
2.7
3.0
4.5
VOH
HIGH-level output
voltage
1.65 to 5.5
1.65
2.3
V
CC − 0.1
−
−
−
−
−
−
−
−
V
0.95
1.7
1.9
2.0
3.4
−
−
V
−
V
2.7
−
V
3.0
−
V
4.5
−
V
ILI
input leakage
current
VI = 5.5 V or GND 5.5
±100
µA
Ioff
power OFF leakage VI or VO = 5.5 V
current
0
−
−
−
−
−
−
±200
200
µA
µA
µA
ICC
∆ICC
quiescent supply
current
VI = VCC or GND;
IO = 0 A
5.5
additionalquiescent VI = VCC − 0.6 V;
2.3 to 5.5
5000
supply current per
pin
IO = 0 A
Note
1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
2004 Sep 15
7
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.0 ns.
TEST CONDITIONS
WAVEFORMS VCC (V)
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Tamb = −40 °C to +85 °C
tPHL/tPLH
propagation delay
A, B to Y
see Figs 6 and 7
1.65 to 1.95 1.0
3.4
8.0
ns
2.3 to 2.7
2.7
0.5
0.5
0.5
0.5
2.2
2.5
2.1
1.7
5.5
5.5
4.5
4.0
ns
ns
ns
ns
3.0 to 3.6
4.5 to 5.5
Tamb = −40 °C to +125 °C
tPHL/tPLH
propagation delay
A, B to Y
see Figs 6 and 7
1.65 to 1.95 1.0
−
−
−
−
−
10.5
7.0
7.0
6.0
5.5
ns
ns
ns
ns
ns
2.3 to 2.7
2.7
0.5
0.5
0.5
0.5
3.0 to 3.6
4.5 to 5.5
2004 Sep 15
8
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
AC WAVEFORMS
V
handbook, halfpage
A, B input
I
V
M
GND
t
t
PHL
PLH
V
OH
V
Y output
M
MNA614
V
OL
INPUT
VCC
VM
VI
tr = tf
≤ 2.0 ns
1.65 V to 1.95 V 0.5 × VCC
VCC
2.3 V to 2.7 V
2.7 V
0.5 × VCC
1.5 V
VCC
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
2.7 V
2.7 V
VCC
3.0 V to 3.6 V
4.5 V to 5.5 V
1.5 V
0.5 × VCC
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.6 Input A, B to output Y propagation delay times.
2004 Sep 15
9
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
V
EXT
V
CC
R
L
V
V
O
I
PULSE
GENERATOR
D.U.T.
C
R
R
L
L
T
MNA616
VEXT
VCC
VI
CL
RL
tPLH/tPHL
tPZH/tPHZ
tPZL/tPLZ
1.65 V to 1.95 V VCC
30 pF
30 pF
50 pF
50 pF
50 pF
1 kΩ
open
open
open
open
open
GND
GND
GND
GND
GND
2 × VCC
2 × VCC
6 V
2.3 V to 2.7 V
2.7 V
VCC
500 Ω
500 Ω
500 Ω
500 Ω
2.7 V
2.7 V
VCC
3.0 V to 3.6 V
4.5 V to 5.5 V
6 V
2 × VCC
Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.7 Load circuitry for switching times.
2004 Sep 15
10
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
PACKAGE OUTLINES
Plastic surface mounted package; 5 leads
SOT353
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
1
2
3
c
e
1
b
p
L
p
w
M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
(2)
UNIT
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max
0.30
0.20
1.1
0.8
0.25
0.10
2.2
1.8
1.35
1.15
2.2
2.0
0.45
0.15
0.25
0.15
mm
0.1
1.3
0.65
0.2
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
SC-88A
97-02-28
SOT353
2004 Sep 15
11
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
Plastic surface mounted package; 5 leads
SOT753
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X
e
b
p
w
M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
1
b
c
D
E
e
H
L
Q
v
w
y
p
p
E
0.100
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
SOT753
SC-74A
02-04-16
2004 Sep 15
12
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4×
(2)
L
L
1
e
6
5
4
e
1
e
1
6×
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.25
0.17
1.5
1.4
1.05
0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.6
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
04-07-15
04-07-22
SOT886
MO-252
2004 Sep 15
13
Philips Semiconductors
Product specification
Single 2-input AND gate
74LVC1G08
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2004 Sep 15
14
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2004
SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R20/05/pp15
Date of release: 2004 Sep 15
Document order number: 9397 750 13757
相关型号：
74LVC1G08GW-G
IC LVC/LCX/Z SERIES, 2-INPUT AND GATE, PDSO5, 1.25 MM, PLASTIC, MO-203, SC-88A, SOT353-1, TSSOP-5, Gate
NXP
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