74LVC1G126GF,132 [NXP]
74LVC1G126 - Bus buffer/line driver; 3-state SON 6-Pin;型号: | 74LVC1G126GF,132 |
厂家: | NXP |
描述: | 74LVC1G126 - Bus buffer/line driver; 3-state SON 6-Pin 驱动 光电二极管 逻辑集成电路 |
文件: | 总16页 (文件大小:80K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74LVC1G126
Bus buffer/line driver; 3-state
Rev. 08 — 9 April 2009
Product data sheet
1. General description
The 74LVC1G126 provides one non-inverting buffer/line driver with 3-state output. The
3-state output is controlled by the output enable input (OE). A LOW-level at pin OE causes
the output to assume a high-impedance OFF-state.
The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of
this device in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
2. Features
I Wide supply voltage range from 1.65 V to 5.5 V
I High noise immunity
I Complies with JEDEC standard:
N JESD8-7 (1.65 V to 1.95 V)
N JESD8-5 (2.3 V to 2.7 V)
N JESD8B/JESD36 (2.7 V to 3.6 V)
I ±24 mA output drive (VCC = 3.0 V)
I CMOS low power consumption
I Latch-up performance exceeds 250 mA
I Direct interface with TTL levels
I Inputs accept voltages up to 5 V
I Multiple package options
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Specified from −40 °C to +85 °C and −40 °C to +125 °C
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
−40 °C to +125 °C
Name
Description
Version
74LVC1G126GW
TSSOP5
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
SOT353-1
74LVC1G126GV
74LVC1G126GM
−40 °C to +125 °C
−40 °C to +125 °C
SC-74A
XSON6
plastic surface-mounted package; 5 leads
SOT753
SOT886
plastic extremely thin small outline package;
no leads; 6 terminals; body 1 × 1.45 × 0.5 mm
74LVC1G126GF
−40 °C to +125 °C
XSON6
plastic extremely thin small outline package;
SOT891
no leads; 6 terminals; body 1 × 1 × 0.5 mm
4. Marking
Table 2.
Marking codes
Type number
74LVC1G126GW
74LVC1G126GV
74LVC1G126GM
74LVC1G126GF
Marking[1]
VN
V26
VN
VN
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
2
A
Y
4
2
1
Y
A
4
1
OE
OE
mna126
OE
mna125
mna127
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
2 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
6. Pinning information
6.1 Pinning
74LVC1G126
74LVC1G126
OE
A
1
2
3
6
5
4
V
CC
74LVC1G126
1
2
3
5
4
OE
A
V
Y
CC
OE
A
1
2
3
6
5
4
V
CC
n.c.
Y
n.c.
Y
GND
GND
GND
001aaf197
001aaf401
001aaf196
Transparent top view
Transparent top view
Fig 4. Pin configuration
SOT353-1 and SOT753
Fig 5. Pin configuration SOT886
Fig 6. Pin configuration SOT891
6.2 Pin description
Table 3.
Symbol
Pin description
Pin
Description
SOT353-1/SOT753
SOT886/SOT891
OE
A
1
2
3
4
-
1
2
3
4
5
6
output enable input
data input
GND
Y
ground (0 V)
data output
n.c.
VCC
not connected
supply voltage
5
7. Functional description
Table 4.
Function table[1]
Input
OE
H
Output
A
L
Y
L
H
H
X
H
Z
L
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
3 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
−0.5
−50
−0.5
-
Max
+6.5
-
Unit
V
supply voltage
input clamping current
input voltage
VI < 0 V
mA
V
[1]
VI
+6.5
±50
VCC + 0.5
+6.5
±50
100
-
IOK
output clamping current
output voltage
VO > VCC or VO < 0 V
Active mode
mA
V
[1][2]
[1][2]
VO
−0.5
−0.5
-
Power-down mode
VO = 0 V to VCC
V
IO
output current
mA
mA
mA
mW
°C
ICC
IGND
Ptot
Tstg
supply current
-
ground current
−100
-
[3]
total power dissipation
storage temperature
Tamb = −40 °C to +125 °C
250
+150
−65
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 package: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6.
Symbol
VCC
Recommended operating conditions
Parameter
Conditions
Min
Typ
Max
5.5
Unit
V
supply voltage
input voltage
output voltage
1.65
-
-
-
-
-
-
-
VI
0
5.5
V
VO
Active mode
0
VCC
5.5
V
VCC = 0 V; Power-down mode
0
V
Tamb
ambient temperature
−40
+125
20
°C
ns/V
ns/V
∆t/∆V
input transition rise and fall rate VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
-
-
10
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
4 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ[1]
Max
Unit
Tamb = −40 °C to +85 °C
VIH
HIGH-level input voltage VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
0.65 × VCC
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
1.7
-
VCC = 2.7 V to 3.6 V
2.0
-
VCC = 4.5 V to 5.5 V
0.7 × VCC
-
VIL
LOW-level input voltage
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
-
-
-
-
0.35 × VCC
0.7
0.8
0.3 × VCC
VOL
LOW-level output voltage VI = VIH or VIL
VCC = 1.65 V to 5.5 V; IO = 100 µA
-
-
-
-
-
-
-
-
-
-
-
-
0.1
V
V
V
V
V
V
VCC = 1.65 V; IO = 4 mA
VCC = 2.3 V; IO = 8 mA
VCC = 2.7 V; IO = 12 mA
VCC = 3.0 V; IO = 24 mA
VCC = 4.5 V; IO = 32 mA
0.45
0.3
0.4
0.55
0.55
VOH
HIGH-level output voltage VI = VIH or VIL
VCC = 1.65 V to 5.5 V; IO = −100 µA
VCC = 1.65 V; IO = −4 mA
V
CC − 0.1
-
-
V
1.2
1.9
2.2
2.7
3.8
-
-
-
V
VCC = 2.3 V; IO = −8 mA
-
-
V
VCC = 2.7 V; IO = −12 mA
-
-
V
VCC = 3.0 V; IO = −24 mA
-
-
V
VCC = 4.5 V; IO = −32 mA
-
-
V
II
input leakage current
VCC = 0 V to 5.5 V; VI = 5.5 V or GND
±0.1
±0.1
±5
±10
µA
µA
IOZ
OFF-state output current VCC = 3.6 V; VI = VIH or VIL;
VO = 5.5 V or GND
-
IOFF
ICC
power-off leakage current VCC = 0 V; VI or VO = 5.5 V
-
-
±0.1
±10
µA
µA
supply current
VI = 5.5 V or GND;
CC = 1.65 V to 5.5 V; IO = 0 A
0.1
10
V
∆ICC
additional supply current per pin; VCC = 2.3 V to 5.5 V;
-
-
5
5
500
-
µA
VI = VCC − 0.6 V; IO = 0 A
CI
input capacitance
pF
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
5 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ[1]
Max
Unit
Tamb = −40 °C to +125 °C
VIH
HIGH-level input voltage VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
0.65 × VCC
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
1.7
-
VCC = 2.7 V to 3.6 V
2.0
-
VCC = 4.5 V to 5.5 V
0.7 × VCC
-
VIL
LOW-level input voltage
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
-
-
-
-
0.35 × VCC
0.7
0.8
0.3 × VCC
VOL
LOW-level output voltage VI = VIH or VIL
VCC = 1.65 V to 5.5 V; IO = 100 µA
-
-
-
-
-
-
-
-
-
-
-
-
0.1
V
V
V
V
V
V
VCC = 1.65 V; IO = 4 mA
VCC = 2.3 V; IO = 8 mA
VCC = 2.7 V; IO = 12 mA
VCC = 3.0 V; IO = 24 mA
VCC = 4.5 V; IO = 32 mA
0.70
0.45
0.60
0.80
0.80
VOH
HIGH-level output voltage VI = VIH or VIL
VCC = 1.65 V to 5.5 V; IO = −100 µA
VCC = 1.65 V; IO = −4 mA
V
CC − 0.1
-
-
-
-
-
-
-
-
-
V
0.95
1.7
1.9
2.0
3.4
-
-
V
VCC = 2.3 V; IO = −8 mA
-
V
VCC = 2.7 V; IO = −12 mA
-
V
VCC = 3.0 V; IO = −24 mA
-
V
VCC = 4.5 V; IO = −32 mA
-
V
II
input leakage current
VCC = 0 V to 5.5 V; VI = 5.5 V or GND
±100
±200
µA
µA
IOZ
OFF-state output current VCC = 3.6 V; VI = VIH or VIL;
VO = 5.5 V or GND
-
IOFF
ICC
power-off leakage current VCC = 0 V; VI or VO = 5.5 V
-
-
-
-
±200
µA
µA
supply current
VI = 5.5 V or GND;
CC = 1.65 V to 5.5 V; IO = 0 A
200
V
∆ICC
additional supply current per pin; VCC = 2.3 V to 5.5 V;
-
-
5000
µA
VI = VCC − 0.6 V; IO = 0 A
[1] All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
6 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
11. Dynamic characteristics
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9.
Symbol Parameter Conditions −40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
Max
[2]
[3]
[4]
[5]
tpd
propagation delay A to Y; see Figure 7
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
1.0
0.5
0.5
0.5
0.5
3
8.0
5.5
5.5
4.5
4.0
1.0
0.5
0.5
0.5
0.5
10.5
7
ns
ns
ns
ns
ns
2.1
2.3
2.0
1.7
VCC = 2.7 V
7
VCC = 3.0 V to 3.6 V
6
VCC = 4.5 V to 5.5 V
5.5
ten
enable time
OE to Y; see Figure 8
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.0
0.5
0.5
0.5
0.5
3.2
2.2
2.4
2.1
1.6
9.4
6.6
6.6
5.3
5.0
1.0
0.5
0.5
0.5
0.5
12
8.5
8.5
7
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
OE to Y; see Figure 8
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
6.5
tdis
disable time
1.0
0.5
0.5
0.5
0.5
4.3
2.7
3.4
3.0
2.2
9.2
5.5
5.5
5.5
4.2
1.0
0.5
0.5
0.5
0.5
12
7
ns
ns
ns
ns
ns
7
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
7
5.5
CPD
power dissipation per buffer; VI = GND to VCC
capacitance
output enabled
-
-
25
6
-
-
-
-
-
-
pF
pF
output disabled
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLH and tPHL
[3] ten is the same as tPZH and tPZL
[4] tdis is the same as tPLZ and tPHZ
[5] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
7 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
12. Waveforms
V
I
(1)
V
A input
M
GND
t
t
PLH
PHL
(1)
V
Y output
M
mna128
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7. Input A to output Y propagation delay times
V
I
V
M
OE input
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
output
enabled
output
enabled
output
disabled
mna646
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8. 3-state enable and disable times
Table 9.
Measurement points
Supply voltage
VCC
Input
VM
Output
VM
VX
VY
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
0.5VCC
0.5VCC
1.5 V
1.5 V
0.5VCC
0.5VCC
0.5VCC
1.5 V
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VOL + 0.3 V
V
V
V
V
V
OH − 0.15 V
OH − 0.15 V
OH − 0.3 V
OH − 0.3 V
OH − 0.3 V
3.0 V to 3.6 V
4.5 V to 5.5 V
1.5 V
0.5VCC
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
8 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
V
EXT
V
CC
R
L
V
V
O
I
G
DUT
R
T
C
L
R
L
mna616
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 9. Load circuitry for switching times
Table 10. Test data
Supply voltage
VCC
Input
VI
Load
CL
VEXT
tr, tf
RL
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ
2VCC
2VCC
6 V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VCC
VCC
2.7 V
2.7 V
VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
30 pF
30 pF
50 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
open
GND
open
GND
3.0 V to 3.6 V
4.5 V to 5.5 V
open
GND
6 V
open
GND
2VCC
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
9 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
13. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
SOT353-1
D
E
A
X
c
y
H
v
M
A
E
Z
5
4
A
2
A
(A )
3
A
1
θ
L
L
p
1
3
e
w M
b
p
detail X
e
1
0
1.5
3 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
A
A
A
b
c
D
E
e
e
1
H
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
E
max.
0.1
0
1.0
0.8
0.30
0.15
0.25
0.08
2.25
1.85
1.35
1.15
2.25
2.0
0.46
0.21
0.60
0.15
7°
0°
mm
1.1
0.65
1.3
0.15
0.425
0.3
0.1
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
00-09-01
03-02-19
SOT353-1
MO-203
SC-88A
Fig 10. Package outline SOT353-1 (TSSOP5)
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
10 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
Plastic surface-mounted package; 5 leads
SOT753
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X
e
b
p
w
M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.100
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
02-04-16
06-03-16
SOT753
SC-74A
Fig 11. Package outline SOT753 (SC-74A)
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
11 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4×
(2)
L
L
1
e
6
5
4
e
1
e
1
6×
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.25
0.17
1.5
1.4
1.05
0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.6
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
04-07-15
04-07-22
SOT886
MO-252
Fig 12. Package outline SOT886 (XSON6)
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
12 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
SOT891
b
1
2
3
4×
(1)
L
L
1
e
6
5
4
e
1
e
1
6×
(1)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.20 1.05 1.05
0.12 0.95 0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.55 0.35
Note
1. Can be visible in some manufacturing processes.
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
05-04-06
07-05-15
SOT891
Fig 13. Package outline SOT891 (XSON6)
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
13 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
14. Abbreviations
Table 11. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
TTL
Transistor-Transistor Logic
15. Revision history
Table 12. Revision history
Document ID
Release date
20090409
Data sheet status
Change notice
Supersedes
74LVC1G126_8
Modifications:
Product data sheet
-
74LVC1G126_7
Table 2: Table note added, explaining where to find the pin 1 indicator.
74LVC1G126_7
74LVC1G126_6
74LVC1G126_5
74LVC1G126_4
74LVC1G126_3
74LVC1G126_2
74LVC1G126_1
20070830
20061009
20040921
20021002
20020528
20010406
20001222
Product data sheet
-
-
-
-
-
-
-
74LVC1G126_6
74LVC1G126_5
74LVC1G126_4
74LVC1G126_3
74LVC1G126_2
74LVC1G126_1
-
Product data sheet
Product specification
Product specification
Product specification
Preliminary specification
Preliminary specification
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
14 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74LVC1G126_8
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 08 — 9 April 2009
15 of 16
74LVC1G126
NXP Semiconductors
Bus buffer/line driver; 3-state
18. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14
8
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 9 April 2009
Document identifier: 74LVC1G126_8
相关型号:
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