74LVC1G157GV [NXP]
Single 2-input multiplexer; 单路2输入多路复用器
| 型号： | 74LVC1G157GV |
| 厂家： | 
NXP |
| 描述： | Single 2-input multiplexer |
| 文件： | 总15页 (文件大小：80K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LVC1G157
Single 2-input multiplexer
Rev. 03 — 12 July 2007
Product data sheet
1. General description
The 74LVC1G157 is a single 2-input multiplexer which select data from two data inputs (I0
and I1) under control of a common data select input (S). The state of the common data
select input determines the particular register from which the data comes. The output (Y)
presents the selected data in the true (non-inverted) form.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in mixed 3.3 V and 5 V applications.
This device is fully specified for partial power-down applications using IOFF
.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and
fall times.
2. Features
■ Wide supply voltage range from 1.65 V to 5.5 V
■ High noise immunity
■ Complies with JEDEC standard:
◆ JESD8-7 (1.65 V to 1.95 V)
◆ JESD8-5 (2.3 V to 2.7 V)
◆ JESD8B/JESD36 (2.7 V to 3.6 V)
■ ±24 mA output drive (VCC = 3.0 V)
■ CMOS low power consumption
■ Latch-up performance exceeds 250 mA
■ Direct interface with TTL levels
■ Inputs accept voltages up to 5 V
■ ESD protection:
◆ HBM JESD22-A114E exceeds 2000 V
◆ MM JESD22-A115-A exceeds 200 V
■ Multiple package options
■ Specified from −40 °C to +85 °C and −40 °C to +125 °C
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature
range
Name
Description
Version
74LVC1G157GW −40 °C to +125 °C SC-88
74LVC1G157GV −40 °C to +125 °C SC-74
74LVC1G157GM −40 °C to +125 °C XSON6
plastic surface-mounted package; 6 leads
SOT363
SOT457
plastic surface-mounted package (TSOP6); 6 leads
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1 × 1.45 × 0.5 mm
74LVC1G157GF
−40 °C to +125 °C XSON6
plastic extremely thin small outline package; no leads; SOT891
6 terminals; body 1 × 1 × 0.5 mm
4. Marking
Table 2.
Marking
Type number
Marking code
74LVC1G157GW
74LVC1G157GV
74LVC1G157GM
74LVC1G157GF
YP
YP
YP
YP
5. Functional diagram
1
3
6
G1
I1 I0
6
S
3
1
1
1
MUX
Y
4
4
001aac653
001aac652
Fig 1. Logic symbol
Fig 2. IEC logic symbol
1
3
I1
I0
4
MULTIPLEXER
Y
SELECTOR
OUTPUT S
6
001aac655
S
Fig 3. Functional diagram
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
2 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
S
I1
I0
Y
001aac654
Fig 4. Logic diagram
6. Pinning information
6.1 Pinning
74LVC1G157
74LVC1G157
I1
GND
I0
1
2
3
6
5
4
S
V
Y
74LVC1G157
1
2
3
6
5
4
I1
GND
I0
S
V
Y
I1
GND
I0
1
2
3
6
5
4
S
V
Y
CC
CC
CC
001aac657
001aaf545
001aac656
Transparent top view
Transparent top view
Fig 5. Pin configuration SOT363
(SC-88) and SOT457 (SC-74)
Fig 6. Pin configuration SOT886
(XSON6)
Fig 7. Pin configuration SOT891
(XSON6)
6.2 Pin description
Table 3.
Pin description
Pin
Symbol
Description
I1
1
2
3
4
5
6
data input from source 1
ground (0 V)
GND
I0
data input from source 0
multiplexer output
supply voltage
Y
VCC
S
common data select input
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
3 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
7. Functional description
Table 4.
Function table[1]
Inputs
Output
S
L
I1
X
X
L
I0
L
Y
L
L
H
X
X
H
L
H
H
H
H
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
−0.5
−50
−0.5
-
Max
+6.5
-
Unit
V
supply voltage
input clamping current
input voltage
VI < 0 V
mA
V
[1]
VI
+6.5
±50
VCC + 0.5
+6.5
±50
100
-
IOK
output clamping current
output voltage
VO > VCC or VO < 0 V
Active mode
mA
V
[1][2]
[1][2]
VO
−0.5
−0.5
-
Power-down mode
VO = 0 V to VCC
V
IO
output current
mA
mA
mA
mW
°C
ICC
IGND
Ptot
Tstg
supply current
-
ground current
−100
-
[3]
total power dissipation
storage temperature
Tamb = −40 °C to +125 °C
250
+150
−65
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For SC-88 and SC-74 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K.
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
4 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Symbol Parameter
Conditions
Min
Typ
Max
5.5
Unit
V
VCC
VI
supply voltage
input voltage
output voltage
1.65
-
-
-
-
-
-
-
0
5.5
V
VO
Active mode
-
VCC
5.5
V
VCC = 0 V; Power-down mode
-
V
Tamb
ambient temperature
−40
+125
20
°C
ns/V
ns/V
∆t/∆V
input transition rise and fall rate VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
-
-
10
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
Max
VIH
HIGH-level
input voltage
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
VI = VIH or VIL
0.65VCC
-
-
-
-
-
-
-
-
-
0.65VCC
-
V
V
V
V
V
V
V
V
1.7
-
1.7
-
2.0
-
-
2.0
-
-
0.7VCC
0.7VCC
VIL
LOW-level
input voltage
-
-
-
-
0.35VCC
0.7
-
-
-
-
0.35VCC
0.7
0.8
0.8
0.3VCC
0.3VCC
VOH
HIGH-level
output voltage
IO = −100 µA;
VCC − 0.1
-
-
V
CC − 0.1
-
V
VCC = 1.65 V to 5.5 V
IO = −4 mA; VCC = 1.65 V
IO = −8 mA; VCC = 2.3 V
IO = −12 mA; VCC = 2.7 V
IO = −24 mA; VCC = 3.0 V
IO = −32 mA; VCC = 4.5 V
VI = VIH or VIL
1.2
1.9
2.2
2.3
3.8
1.54
2.15
2.50
2.62
4.11
-
-
-
-
-
0.95
1.7
1.9
2.0
3.4
-
-
-
-
-
V
V
V
V
V
VOL
LOW-level
output voltage
IO = 100 µA;
-
-
0.10
-
0.10
V
VCC = 1.65 V to 5.5 V
IO = 4 mA; VCC = 1.65 V
IO = 8 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
IO = 32 mA; VCC = 4.5 V
-
-
-
-
-
-
0.07
0.12
0.17
0.33
0.39
±0.1
0.45
0.30
0.40
0.55
0.55
±5
-
-
-
-
-
-
0.70
0.45
0.60
0.80
0.80
±20
V
V
V
V
V
II
input leakage VI = 5.5 V or GND;
current CC = 0 V to 5.5 V
µA
V
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
5 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
Table 7.
Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
Max
IOFF
power-off
leakage
current
VCC = 0 V; VI or VO = 5.5 V
-
±0.1
±10
-
±20
µA
ICC
∆ICC
CI
supply current VI = 5.5 V or GND; IO = 0 A;
CC = 1.65 V to 5.5 V
-
-
-
0.1
5
10
500
-
-
-
-
40
5000
-
µA
µA
pF
V
additional
per pin; VCC = 2.3 V to 5.5 V;
supply current VI = VCC − 0.6 V; IO = 0 A
input
VCC = 3.3 V; VI = GND to VCC
2.5
capacitance
[1] All typical values are measured at Tamb = 25 °C.
11. Dynamic characteristics
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for load circuit see Figure 9.
Symbol Parameter Conditions −40 °C to +85 °C
Min
Typ[1] Max
−40 °C to +125 °C
Unit
Min
Max
[2]
[2]
[3]
tpd
propagation delay I0, I1 to Y; see Figure 8
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.5
1.0
1.0
1.0
0.5
4.3
2.9
3.1
2.7
2.2
11.0
6.1
5.6
5.0
4.0
1.5
1.0
1.0
1.0
0.5
13.0
7.6
7.0
6.3
5.0
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
S to Y; see Figure 8
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.5
1.0
1.0
1.0
0.5
-
4.3
2.9
3.3
2.9
2.3
18
11.0
6.9
5.9
5.0
4.0
-
1.5
1.0
1.0
1.0
0.5
-
13.0
8.6
7.4
6.3
5.0
-
ns
ns
ns
ns
ns
pF
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
CPD
power dissipation VI = GND to VCC; VCC = 3.3 V
capacitance
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLH and tPHL
.
[3] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
6 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
12. Waveforms
V
I
V
I0, I1, S input
M
GND
t
t
PLH
PHL
V
OH
Y output
V
M
V
OL
001aac658
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8. Data inputs (I0, I1) and common data select input (S) to output (Y) propagation delays
Table 9. Measurement points
Supply voltage
VCC
Input
VM
Output
VM
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
0.5VCC
0.5VCC
1.5 V
1.5 V
0.5VCC
0.5VCC
0.5VCC
1.5 V
3.0 V to 3.6 V
4.5 V to 5.5 V
1.5 V
0.5VCC
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
7 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
V
EXT
V
CC
R
L
V
V
O
I
PULSE
GENERATOR
DUT
R
T
C
L
R
L
mna616
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance; should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 9. Load circuit for switching times
Table 10. Test data
Supply voltage
VCC
Input
VI
Load
CL
VEXT
tr = tf
RL
tPLH, tPHL
open
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VCC
VCC
2.7 V
2.7 V
VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
30 pF
30 pF
50 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
open
open
3.0 V to 3.6 V
4.5 V to 5.5 V
open
open
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
8 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
13. Package outline
Plastic surface-mounted package; 6 leads
SOT363
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1
index
A
A
1
1
2
3
c
e
1
b
p
L
p
w
M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max
0.30
0.20
1.1
0.8
0.25
0.10
2.2
1.8
1.35
1.15
2.2
2.0
0.45
0.15
0.25
0.15
mm
0.1
1.3
0.65
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
04-11-08
06-03-16
SOT363
SC-88
Fig 10. Package outline SOT363 (SC-88)
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
9 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
Plastic surface-mounted package (TSOP6); 6 leads
SOT457
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1
index
A
A
1
c
1
2
3
L
p
e
b
p
w
M B
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.1
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
05-11-07
06-03-16
SOT457
SC-74
Fig 11. Package outline SOT457 (SC-74)
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
10 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4×
(2)
L
L
1
e
6
5
4
e
1
e
1
6×
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.25
0.17
1.5
1.4
1.05
0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.6
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
04-07-15
04-07-22
SOT886
MO-252
Fig 12. Package outline SOT886 (XSON6)
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
11 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
SOT891
b
1
2
3
4×
(1)
L
L
1
e
6
5
4
e
1
e
1
6×
(1)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.20 1.05 1.05
0.12 0.95 0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.55 0.35
Note
1. Can be visible in some manufacturing processes.
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
05-04-06
07-05-15
SOT891
Fig 13. Package outline SOT891 (XSON6)
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
12 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
14. Abbreviations
Table 11. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
TTL
Transistor-Transistor Logic
15. Revision history
Table 12. Revision history
Document ID
74LVC1G157_3
Modifications:
Release date
20070712
Data sheet status
Change notice
Supersedes
Product data sheet
-
74LVC1G157_2
• Section 10 “Static characteristics”:
Changed: Conditions for input leakage current and supply current.
• New package outline drawing for XSON6/SOT891.
74LVC1G157_2
74LVC1G157_1
20061011
Product data sheet
-
74LVC1G157_1
-
20050425
Product data sheet
-
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
13 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of a NXP Semiconductors product can reasonably be expected to
16.2 Definitions
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
17. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
74LVC1G157_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 July 2007
14 of 15
74LVC1G157
NXP Semiconductors
Single 2-input multiplexer
18. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13
8
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 14
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 12 July 2007
Document identifier: 74LVC1G157_3
相关型号：
74LVC1G157GV-Q100
LVC/LCX/Z SERIES, 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO6, PLASTIC, SC-74, SOT-457, TSOP-6
NXP
74LVC1G157GV-Q100,125
Multiplexer, LVC/LCX/Z Series, 1-Func, 2 Line Input, 1 Line Output, True Output, CMOS, PDSO6
NXP
©2020 ICPDF网 联系我们和版权申明