74LVC374A [NXP]
Octal D-type flip-flop with 5-volt tolerant inputs/outputs; positive edge-trigger 3-State; 八路D型触发器，5伏容限输入/输出;正边沿触发三态
| 型号： | 74LVC374A |
| 厂家： | 
NXP |
| 描述： | Octal D-type flip-flop with 5-volt tolerant inputs/outputs; positive edge-trigger 3-State |
| 文件： | 总12页 (文件大小：104K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74LVC374A
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger
(3-State)
Product specification
1998 Jul 29
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
Inputs can be driven from either 3.3V or 5V devices. In 3-State
operation, outputs can handle 5V. This feature allows the use of
these devices as translators in a mixed 3.3V/5V environment.
FEATURES
• 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
• Supply voltage range of 2.7V to 3.6V
• Complies with JEDEC standard no. 8-1A
• CMOS low power consumption
The 74LVC374A is an octal D-type flip-flop featuring separate
D-type inputs for each flip-flop and 3-State outputs for bus-oriented
applications. A clock (CP) and an output enable (OE) input are
common to all flip-flops.
• Direct interface with TTL levels
The eight flip-flops will store the state of their individual D-inputs
that meet the setup and hold times requirements on the
LOW-to-HIGH CP transition.
• High impedance when V = 0V
CC
• 8-bit positive edge-triggered register
When OE is LOW, the contents of the eight flip-flops is available at
the outputs. When OE is HIGH, the outputs go to the high
impedance OFF-state. Operation of the OE input does not affect the
state of the flip-flops.
• Independent register and 3-State buffer operation
DESCRIPTION
The 74LVC374A is a high-performance, low-power, low-voltage,
Si-gate CMOS device, superior to most advanced CMOS
compatible TTL families.
The ’374’ is functionally identical to the ’574’, but the ’574’ has a
different pin arrangement.
QUICK REFERENCE DATA
GND = 0V; T
=25°C; t = t v 2.5ns
amb
r
f
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
Propagation delay
CP to Q
C = 50pF
L
t
f
/t
ns
PHL PLH
V
CC
= 3.3V
4.8
150
5.0
n
maximum clock frequency
Input capacitance
MHz
pF
max
C
C
I
Power dissipation capacitance per
flip-flop
Notes 1 and 2
20
pF
PD
NOTE:
1. C is used to determine the dynamic power dissipation (P in mW):
PD
D
2
2
P
= C x V
x f + S (C x V
x f ) where:
D
PD
CC
i
L
CC o
f = input frequency in MHz; C = output load capacity in pF;
i
L
f = output frequency in MHz; V = supply voltage in V;
o
CC
2
S (C x V
x f ) = sum of outputs.
L
CC
o
2. The condition is V = GND to V
I
CC
ORDERING INFORMATION
TEMPERATURE
RANGE
OUTSIDE
NORTH AMERICA
PACKAGES
NORTH AMERICA
PKG. DWG. #
20-Pin Plastic Shrink Small Outline (SO)
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74LVC374A D
74LVC374A DB
74LVC374A PW
74LVC374A D
74LVC374A DB
7LVC374APW DH
SOT163-1
SOT339-1
SOT360-1
20-Pin Plastic Shrink Small Outline (SSOP) Type II
20-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I
2
1998 Jul 29
853-1861 19802
Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
PIN CONFIGURATION
LOGIC SYMBOL (IEEE/IEC)
11
1
C1
EN1
20
V
CC
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
3
4
2
5
1D
7
8
6
9
13
14
12
15
17
18
16
19
GND 10
11
SA00389
CP
SA00391
FUNCTIONAL DIAGRAM
PIN DESCRIPTION
PIN NUMBER SYMBOL
FUNCTION
1
OE
Output enable input (active-Low)
Data inputs
3
D0
D1
D2
D3
D4
D5
Q0
Q1
Q2
Q3
Q4
Q5
2
5
6
3, 4, 7, 8, 13,
14, 17, 18
D0-D7
4
7
2, 5, 6, 9, 12,
15, 16, 19
Q0-Q7
3-state flip-flop outputs
8
9
3-State
OUTPUTS
FF1
to
FF8
Clock input (LOW-to-HIGH,
edge-triggered)
12
13
14
11
CP
15
10
20
GND
Ground (0V)
17
18
D6
D7
Q6
Q7
16
19
V
CC
Positive supply voltage
CP
OE
11
1
LOGIC SYMBOL
11
SA00392
CP
D0
D1
D2
D3
D4
D5
D6
D7
Q0
2
3
4
Q1
5
Q2
6
7
Q3
9
8
Q4
12
13
14
17
18
Q5
15
Q6
16
Q7
OE
1
19
SA00390
3
1998 Jul 29
Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
LOGIC DIAGRAM
D0
D1
D2
D3
D4
D5
D6
D7
D
D
D
D
D
D
D
D
Q
Q
Q
Q
Q
Q
Q
Q
CP
CP
CP
CP
CP
CP
CP
CP
FF1
FF2
FF3
FF4
FF5
FF6
FF7
FF8
CP
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
SA00393
FUNCTION TABLE
INPUTS
LE
OUTPUTS
OPERATING MODES
INTERNAL FLIP-FLOPS
OE
D
Q to Q
n
0
7
Load and read register
L
L
°
l
h
L
H
L
H
°
Load register and
disable outputs
H
H
°
°
l
h
L
H
Z
Z
H
h
L
l
Z
°
= HIGH voltage level
= HIGH voltage level one setup time prior to the LOW-to-HIGH CP transition
= LOW voltage level
= LOW voltage level one setup time prior to the LOW-to-HIGH CP transition
= High impedance OFF-state
= LOW-to-HIGH clock transition
4
1998 Jul 29
Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
CONDITIONS
UNIT
MIN
2.7
1.2
0
MAX
DC supply voltage (for max. speed performance)
DC supply voltage (for low-voltage applications)
DC input voltage range
3.6
3.6
5.5
V
CC
V
V
V
I
DC output voltage range; output HIGH or LOW
state
0
V
CC
V
O
V
DC output voltage range; output 3-State
0
5.5
T
amb
Operating ambient temperature range in free-air
–40
+85
°C
V
CC
V
CC
= 1.2 to 2.7V
= 2.7 to 3.6V
0
0
20
10
t , t
r
Input rise and fall times
ns/V
f
1
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
UNIT
V
V
CC
I
IK
–0.5 to +6.5
–50
DC input diode current
V t0
mA
V
I
V
I
DC input voltage
Note 2
–0.5 to +6.5
I
DC output diode current
V
uV or V t 0
"50
mA
OK
O
CC
O
DC output voltage; output HIGH or LOW state
DC output voltage; output 3-State
DC output source or sink current
Note 2
–0.5 to V +0.5
CC
V
V
O
Note 2
–0.5 to 6.5
I
V
O
= 0 to V
CC
"50
mA
mA
°C
O
I
, I
DC V or GND current
"100
GND CC
CC
T
Storage temperature range
–65 to +150
stg
Power dissipation per package
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
P
TOT
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
500
500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
5
1998 Jul 29
Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
UNIT
1
MIN
TYP
MAX
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.2V
V
CC
V
HIGH level Input voltage
LOW level Input voltage
V
V
IH
= 2.7 to 3.6V
2.0
= 1.2V
GND
0.8
V
IL
= 2.7 to 3.6V
= 2.7V; V = V or V ; I = –12mA
V
V
V
V
*0.5
I
IH
IL
O
CC
CC
CC
CC
= 3.0V; V = V or V ; I = –100µA
*0.2
*0.6
*0.8
V
I
IH
IL
O
O
O
CC
V
OH
HIGH level output voltage
LOW level output voltage
V
= 3.0V; V = V or V
I
I
= –18mA
= –24mA
I
IH
IL;
IL;
= 3.0V; V = V or V
I
IH
= 2.7V; V = V or V ; I = 12mA
0.40
0.20
0.55
5
"10
"10
10
I
IH
IL
O
= 3.0V; V = V or V ; I = 100µA
GND
V
OL
V
I
IH
IL
O
O
= 3.0V; V = V or V
I
= 24mA
I
IH
IL;
2
I
Input leakage current
= 3.6V; V = 5.5V or GND
0.1
0.1
µA
µA
µA
µA
I
I
I
3-State output OFF-state current
Power off leakage supply
Quiescent supply current
= 3.6V; V = V or V ; V = 5.5V or GND
OZ
I
IH
IL
O
I
off
= 0.0V; V or V = 5.5V
0.1
I
O
I
= 3.6V; V = V or GND; I = 0
0.1
CC
I
CC
O
Additional quiescent supply current
per input pin
∆I
CC
V
CC
= 2.7V to 3.6V; V = V –0.6V; I = 0
5
500
µA
I
CC
O
NOTES:
1. All typical values are at V = 3.3V and T
= 25°C.
amb
CC
2. The specified overdrive current at the data input forces the data input to the opposite logic input state.
AC CHARACTERISTICS
GND = 0V; t = t v 2.5ns; C = 50pF; R = 500Ω; T
= –40°C to +85°C.
r
f
L
L
amb
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3V ±0.3V
V
CC
= 2.7V
V = 1.2V
CC
UNIT
1
MIN
TYP
MAX
MIN
MAX
TYP
t
t
Propagation delay
CP to Q
PHL
PLH
1, 4
2, 4
1.5
1.5
4.8
7.0
7.5
1.5
8.0
8.5
21
22
ns
ns
n
t
3-State output enable time
OE to Q
PZH
4.8
1.5
t
PZL
n
t
t
3-State output disable time
OE to Q
PHZ
PLZ
2, 4
1
1.5
3.0
2.0
4.3
1.5
0
6.0
–
1.5
3.0
2.0
7.0
–
15
–
ns
ns
ns
n
t
W
Clock pulse width HIGH or LOW
Setup time
D to CP
n
t
3
–
–
–
SU
Hold time
D to CP
n
t
3
1
1.5
0.6
–
–
–
1.5
80
–
–
–
–
ns
h
f
maximum clock pulse frequency
100
MHz
max
NOTE:
1. Unless otherwise stated, all typical values are at V = 3.3V and T
= 25°C.
amb
CC
6
1998 Jul 29
Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
AC WAVEFORMS
V
V
= 1.5V at V w 2.7V; V = 0.5 V at V t 2.7V.
M
OL
CC
M
CC
CC
and V are the typical output voltage drop that occur with the
V
I
OH
output load.
V
X
V
Y
= V + 0.3V at V w 2.7V; V = V + 0.1 V at V t2.7V
OL
CC
CC
X
Y
OL
OH
CC
CC
CC
CC
V
nOE INPUT
GND
M
= V –0.3V at V w2.7V; V = V – 0.1 V at V t2.7V
OH
1/f
max
t
t
V
PLZ
PZL
I
V
CC
V
V
V
M
M
M
CP INPUT
Q
n
OUTPUT
LOW-to-OFF
OFF-to-LOW
GND
V
M
t
w
V
X
t
PHL
t
PLH
V
OL
V
OH
V
V
Qn OUTPUT
M
M
t
t
PZH
PHZ
V
OL
V
OH
Q
n
OUTPUT
V
Y
HIGH-to-OFF
OFF-to-HIGH
SA00394
V
M
Waveform 1. Clock (CP) to output (Q ) propagation delays, the
clock pulse width, output transition times and the maximum
clock pulse frequency.
n
GND
outputs
enabled
outputs
enabled
outputs
disabled
SW00207
V
I
Waveform 3. 3-State enable and disable times.
CP
INPUT
V
M
TEST CIRCUIT
GND
t
su
t
su
S
1
2 x V
Open
CC
V
CC
t
h
t
h
GND
V
I
500Ω
500Ω
V
V
O
I
Dn
INPUT
V
PULSE
GENERATOR
M
D.U.T.
GND
50pF
C
L
R
T
V
OH
Qn
OUTPUT
V
M
V
Test
/t
S
OL
1
NOTE: The shaded areas indicate when the input is permitted to change
V
V
CC
I
t
Open
2 x V
CC
PLH PHL
for predictable output performance.
t 2.7V
V
t
/t
CC
PLZ PZL
SW00107
2.7V – 3.6V
2.7V
t
/t
GND
PHZ PZH
Waveform 2. Data setup and hold times for the D input to the
n
SY00003
CP input.
Waveform 4. Load circuitry for switching times.
7
1998 Jul 29
Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
8
1998 Jul 29
Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
9
1998 Jul 29
Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
10
1998 Jul 29
Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
NOTES
11
1998 Jul 29
Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 08-98
9397-750-04507
Document order number:
Philips
Semiconductors
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