74LVC4066PW [NXP]
Quad bilateral switches; 四双边开关
| 型号： | 74LVC4066PW |
| 厂家： | 
NXP |
| 描述： | Quad bilateral switches |
| 文件： | 总23页 (文件大小：131K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74LVC4066
Quad bilateral switches
Product specification
2003 Aug 12
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
FEATURES
DESCRIPTION
• Very low ON resistance:
The 74LVC4066 is a high-speed Si-gate CMOS device.
– 7.5 Ω (typical) at VCC = 2.7 V
– 6.5 Ω (typical) at VCC = 3.3 V
– 6 Ω (typical) at VCC = 5 V.
The 74LVC4066 has four independent analog switches.
Each switch has two input/output terminals (nY and nZ)
and an active HIGH enable input (nE). When nE is LOW,
the analog switch is turned off.
• ESD protection:
– HBM EIA/JESD22-A114-A Exceeds 2000 V
– MM EIA/JESD22-A115-A Exceeds 200 V.
• High noise immunity
• CMOS low power consumption
• Latch up performance exceeds 250 mA
• Complies with JEDEC standard no. 8-1A
• Direct interface TTL-levels.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
SYMBOL
PARAMETER
turn-on time E to Vos
CONDITIONS
TYPICAL
UNIT
t
PZH/tPZL
CL = 50 pF; RL = 500 Ω; VCC = 3 V 2.5
CL = 50 pF; RL = 500 Ω; VCC = 5 V 1.9
CL = 50 pF; RL = 500 Ω; VCC = 3 V 3.4
CL = 50 pF; RL = 500 Ω; VCC = 5 V 2.5
ns
ns
ns
ns
pF
pF
pF
pF
t
PHZ/tPLZ
turn-off time E to Vos
CI
input capacitance
VCC = 3 V
3.5
CPD
CS
power dissipation capacitance
switch capacitance
VCC = 3.3 V; notes 1 and 2
OFF-state
12.5
8.0
ON-state
14.0
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ((CL + CS) × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
CS = switch capacitance.
2. The condition is VI = GND to VCC
.
2003 Aug 12
2
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
FUNCTION TABLE
See note 1.
INPUT nE
SWITCH
L
OFF
ON
H
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
PACKAGE
PACKAGE
TYPE NUMBER
TEMPERATURE
PINS
MATERIAL
CODE
RANGE
74LVC4066D
74LVC4066PW
74LVC4066BQ
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
14
14
14
SO14
plastic
plastic
plastic
SOT108-2
SOT402-1
SOT762-1
TSSOP14
DHVQFN14
PINNING
PIN
SYMBOL
DESCRIPTION
1
2
1Y
1Z
independent input/output
independent output/input
independent output/input
independent input/output
enable input (active HIGH)
enable input (active HIGH)
ground (0 V)
handbook, halfpage
1Y
1Z
1
2
3
4
5
6
7
V
14
CC
3
2Z
13
12
11
10
9
1E
4
2Y
2E
3E
GND
3Y
3Z
2Z
4E
4Y
4Z
3Z
3Y
5
2Y
4066
6
2E
7
3E
8
independent input/output
independent output/input
independent output/input
independent input/output
enable input (active HIGH)
enable input (active HIGH)
supply voltage
8
GND
9
MNB109
10
11
12
13
14
4Z
4Y
4E
1E
VCC
Fig.1 Pin configuration SO14 and TSSOP14.
2003 Aug 12
3
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
V
1Y
1
handbook, halfpage
handbook, halfpage
CC
1
1Y
1Z
2
14
13 1E
1Z
2
3
13 1E
12 4E
4
5
8
6
2Y
2E
3Y
3E
2Z
3Z
3
9
2Z
(1)
2Y
2E
3E
4
5
6
11 4Y
10 4Z
GND
9
3Z
11 4Y
12 4E
4Z 10
7
8
GND 3Y
Top view
MNB110
MNB111
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.2 Pin configuration DHVQFN14.
Fig.3 Logic symbol.
1
2
3
1
1
1
1
1
13
#
#
#
#
X1
1
2
3
handbook, halfpage
13
#
#
#
#
4
5
Z
1
4
5
X1
8
6
9
1
8
6
9
Y
E
X1
11
12
10
11
12
10
1
X1
V
MNA658
CC
(a)
(b)
MNB112
Fig.4 logic symbol (IEEE/IEC).
Fig.5 Logic diagram (one switch).
2003 Aug 12
4
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN. MAX. UNIT
VCC
VI
1.65
0
5.5
5.5
VCC
V
V
V
input voltage
VS
switch voltage
0
Tamb
tr, tf
operating ambient temperature
input rise and fall times
−40
0
+125 °C
VCC = 1.65 to 2.7 V
CC = 2.7 to 5.5 V
20
10
ns/V
ns/V
V
0
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V);
see note 1.
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN. MAX. UNIT
VCC
VI
−0.5
−0.5
−
+6.5
+6.5
−50
±50
+6.5
±50
V
input voltage
note 2
V
IIK
input diode current
switch diode current
switch voltage
VI < −0.5 V or VI > VCC + 0.5 V
VI < −0.5 V or VI > VCC + 0.5 V
enable and disable mode
−0.5 < VS < VCC + 0.5 V
mA
mA
V
ISK
VS
IS
−
−0.5
−
switch source or sink current
mA
ICC, IGND VCC or GND current
−
±100 mA
+150 °C
Tstg
Ptot
storage temperature
power dissipation
−65
−
Tamb = −40 to +125 °C; note 3
500
mW
Notes
1. To avoid drawing VCC current out of terminal Z, when switch current flows in terminal Y, the voltage drop across the
bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of
terminal Y. In this case there is no limit for the voltage drop across the switch, but the voltage at Y and Z may not
exceed VCC or GND.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
3. For SO14 packages: above 70 °C derate linearly with 8 mW/K.
For TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.
2003 Aug 12
5
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
DC CHARACTERISTICS
At recommended operating conditions; voltage are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 to +85 °C; note 1
VIH
HIGH-level input
voltage
1.65 to 1.95 0.65VCC
−
−
−
−
−
V
V
V
V
V
V
V
V
µA
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
5.5
1.7
−
2.0
−
0.7VCC
−
VIL
LOW-level input
voltage
−
−
−
−
−
−
0.35VCC
0.7
−
−
0.8
−
0.30VCC
±5
ILI
input leakage current VI = 5.5 V or GND
(control pin)
±0.1
IS(OFF)
IS(ON)
ICC
analog switch
OFF-state current
VI = VIH or VIL;
|VS| = VCC − GND; see Fig.7
5.5
5.5
5.5
5.5
−
−
−
−
±0.1
±0.1
0.1
5
±5
µA
µA
µA
µA
analog switch
ON-state current
VI = VIH or VIL;
|VS| = VCC − GND; see Fig.8
±5
quiescent supply
current
VI = VCC or GND;
VS = GND or VCC; IO = 0 A
10
∆ICC
additional quiescent
supply current per
control pin
VI = VCC − 0.6 V;
VS = GND or VCC; IO = 0 A
500
2003 Aug 12
6
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
TEST CONDITIONS
OTHER
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
VCC (V)
Tamb = −40 to +125 °C
VIH
HIGH-level input
voltage
1.65 to 1.95 0.65VCC
−
−
−
−
−
V
V
V
V
V
V
V
V
µA
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
5.5
1.7
−
−
−
−
−
−
−
−
2.0
0.7VCC
VIL
LOW-level input
voltage
−
−
−
−
−
0.35VCC
0.7
0.8
0.30VCC
±20
ILI
input leakage current VI = 5.5 V or GND
(control pin)
IS(OFF)
IS(ON)
ICC
analog switch
OFF-state current
VI = VIH or VIL;
|VS| = VCC − GND; see Fig.7
5.5
5.5
5.5
5.5
−
−
−
−
−
−
−
−
±20
±20
40
µA
µA
µA
µA
analog switch
ON-state current
VI = VIH or VIL;
|VS| = VCC − GND; see Fig.8
quiescent supply
current
VI = VCC or GND;
VS = GND or VCC; IO = 0 A
∆ICC
additional quiescent
supply current per
control pin
VI = VCC − 0.6 V;
VS = GND or VCC; IO = 0 A
5000
Note
1. All typical values are measured at Tamb = 25 °C.
2003 Aug 12
7
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
Resistance RON
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP. MAX. UNIT
OTHER
IS (mA)
VCC (V)
Tamb = −40 to +85 °C; note 1; see Fig.6
RON(peak)
ON-resistance
(peak)
VS = GND to VCC
VI = VIH
;
4
1.65 to 1.95
2.3 to 2.7
2.7
−
35
14
11.5
8.5
6.5
10
8.5
7.5
6.5
6
100
30
25
20
15
30
20
18
15
10
30
20
18
15
10
−
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
8
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
12
24
32
4
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
RON(rail)
ON-resistance (rail) VS = GND; VI = VIH
8
12
24
32
4
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
VS = VCC; VI = VIH
12
8.5
7.5
6.5
6
8
12
24
32
4
3.0 to 3.6
4.5 to 5.5
1.8
RON(flatness) ON-resistance
(flatness)
VS = GND to VCC
;
100
17
10
5
VI = VIH;
see Figs.10 to 13
8
2.5
−
12
24
32
2.7
−
3.3
−
5.0
3
−
2003 Aug 12
8
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP. MAX. UNIT
OTHER
IS (mA)
VCC (V)
Tamb = −40 to +125 °C; see Fig.6
RON(peak)
ON-resistance
(peak)
VS = GND to VCC
VI = VIH
;
4
1.65 to 1.95
2.3 to 2.7
2.7
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
150
45
38
30
23
45
30
27
23
15
45
30
27
23
15
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
8
−
−
−
−
−
−
−
−
−
−
−
−
−
−
12
24
32
4
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
RON(rail)
ON-resistance (rail) VS = GND; VI = VIH
8
12
24
32
4
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
VS = VCC; VI = VIH
8
12
24
32
3.0 to 3.6
4.5 to 5.5
Note
1. Typical value Ron(flatness) is measured at Tamb = −40 to +85 °C, all other typical values are measured at Tamb = 25 °C.
2003 Aug 12
9
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
E
V
IL
E
V
IH
V
Y
Z
Y
Z
A
A
V
= GND to V
I
S
S
CC
V = V
or GND
CC
V
= GND or V
I
O
CC
GND
GND
MNA659
GND
MNA660
Fig.6 Test circuit for measuring ON-state
resistance (RON).
Fig.7 Test circuit for measuring OFF-state current.
MNA673
2
10
handbook, halfpage
R
ON
V
= 1.8 V
2.5 V
(Ω)
CC
E
V
IH
Y
Z
2.7 V
10
3.3 V
5.0 V
A
A
V = V
or GND
V
(open circuit)
GND
I
CC
O
MNA661
1
0
1
2
3
4
5
V (V)
I
Fig.9 Typical ON-resistance (RON) as a function
of input voltage (VS) for VS = GND to VCC
Fig.8 Test circuit for measuring ON-state current.
.
2003 Aug 12
10
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
MNA663
MNA664
15
15
handbook, halfpage
handbook, halfpage
R
R
ON
ON
°
C
°
C
°
C
T
= +85
+25
amb
(Ω)
(Ω)
°
C
°
C
°
C
T
= +85
+25
amb
−40
10
10
−40
5
0
5
0
0
0
1
2
3
1
2
3
V (V)
V (V)
l
l
Fig.10 RON for VCC = 2.5 V.
Fig.11 RON for VCC = 2.7 V.
MNA666
MNA665
10
8
handbook, halfpage
handbook, halfpage
R
ON
R
ON
(Ω)
(Ω)
T
=
amb
7
8
°
+85
C
6
5
4
3
°
= +85 C
T
amb
°
°
6
4
2
+25
−40
C
C
°
+25
C
°
−40
C
2
0
0
0
1
2
3
4
5
1
2
3
4
V (V)
l
V (V)
I
Fig.12 RON for VCC = 3.3 V.
Fig.13 RON for VCC = 5.0 V.
2003 Aug 12
11
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
AC CHARACTERISTICS
GND = 0 V.
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
WAVEFORMS
V
CC (V)
Tamb = −40 to +85 °C; note 1
tPHL/tPLH propagation delay nY to nZ see Figs 14 and 16;
1.65 to 1.95
2.3 to 2.7
2.7
−
0.8
2.0
ns
or nZ to nY
note 2
−
0.4
0.4
0.3
0.2
5.3
3.0
2.6
2.5
1.9
4.2
2.4
3.6
3.4
2.5
1.2
1.0
0.8
0.6
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
−
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
−
−
t
PZH/tPZL
turn-ON time E to VOS
see Figs 15 and 16
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
5.6
5.0
4.4
3.9
9.0
5.5
6.5
6.0
5.0
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
tPHZ/tPLZ
turn-OFF time E to VOS
see Figs 15 and 16
3.0 to 3.6
4.5 to 5.5
Tamb = −40 to +125 °C
tPHL/tPLH propagation delay nY to nZ see Figs 14 and 16;
1.65 to 1.95
2.3 to 2.7
2.7
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
3.0
2.0
1.5
1.5
1.0
12.5
7.0
6.5
5.5
5.0
11.5
7.0
8.5
7.5
6.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
or nZ to nY
note 2
−
−
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
−
−
t
PZH/tPZL
turn-ON time E to VOS
see Figs 15 and 16
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
tPHZ/tPLZ
turn-OFF time E to VOS
see Figs 15 and 16
3.0 to 3.6
4.5 to 5.5
Notes
1. All typical values are measured at Tamb = 25 °C.
2. tPHL/tPLH propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and
the specified capacitance when driven by an ideal voltage source (zero output impedance).
2003 Aug 12
12
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
AC WAVEFORMS
V
handbook, halfpage
I
V
Y or Z
M
GND
t
t
PHL
PLH
V
OH
V
Z or Y
M
V
OL
MNA667
INPUT
VCC
VM
VI
tr = tf
1.65 to 1.95 V
2.3 to 2.7 V
0.5VCC
0.5VCC
VCC
VCC
2.7 V
VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
2.7 and 3.0 to 3.6 V 1.5 V
4.5 to 5.5 V 0.5VCC
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.14 The input (VS) to output (VO) propagation delays.
2003 Aug 12
13
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
V
I
E
V
M
t
GND
t
PLZ
PZL
V
CC
output
Y or Z
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
output
Y
Y or Z
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
switch
enabled
switch
enabled
switch
disabled
MNA668
INPUT
VCC
VM
VI
tr = tf
1.65 to 1.95 V
2.3 to 2.7 V
0.5VCC
0.5VCC
VCC
VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
2.7 and 3.0 to 3.6 V 1.5 V
4.5 to 5.5 V 0.5VCC
2.7 V
VCC
V
X = VOL + 0.3 V at VCC ≥ 2.7 V;
VX = VOL + 0.1 × VCC at VCC < 2.7 V;
VY = VOH − 0.3 V at VCC ≥ 2.7 V;
VY = VOH − 0.1 × VCC at VCC < 2.7 V.
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.15 Turn-on and turn-off times.
2003 Aug 12
14
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
V
EXT
V
CC
R
L
V
V
O
I
PULSE
GENERATOR
D.U.T.
C
R
R
L
L
T
MNA616
VEXT
tPLH/tPHL tPZH/tPHZ tPZL/tPLZ
VCC
VI
CL
RL
1 kΩ
1.65 to 1.95 V
2.3 to 2.7 V
VCC
VCC
30 pF
30 pF
50 pF
50 pF
open
GND
GND
GND
GND
2VCC
2VCC
6 V
500 Ω open
500 Ω open
500 Ω open
2.7 and 3.0 to 3.6 V 2.7 V
4.5 to 5.5 V
VCC
2VCC
Definitions for test circuits:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.16 Load circuitry for switching times.
ADDITIONAL AC CHARACTERISTICS
Recommended conditions and typical values at Tamb = 25 °C.
SYMBOL
dsin
PARAMETER
TEST CONDITIONS
VCC (V) TYPICAL UNIT
sine-wave distortion
RL = 10 kΩ; CL = 50 pF; fin = 1 kHz; 1.65
see Fig.18
0.032
0.008
0.006
0.005
0.068
0.009
0.008
0.006
170
%
2.3
%
3
%
4.5
%
RL = 10 kΩ; CL = 50 pF;
fin = 10 kHz; see Fig.18
1.65
2.3
3
%
%
%
4.5
1.65
2.3
3
%
fON
switch ON signal frequency
response
RL = 600 Ω; CL = 50 pF; see
Fig.17; note 1
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
210
212
4.5
1.65
2.3
3
215
RL = 50 Ω; CL = 5 pF; see Fig.17;
> 500
> 500
> 500
> 500
note 1
4.5
2003 Aug 12
15
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
SYMBOL
PARAMETER
TEST CONDITIONS
VCC (V) TYPICAL UNIT
αOFF(feedthru) switch OFF signal feed-through RL = 600 Ω; CL = 50 pF;
1.65
2.3
3
−46
−46
−46
−46
−42
−42
−42
−42
69
dB
dB
dB
dB
dB
dB
dB
dB
mV
mV
mV
mV
dB
dB
dB
dB
dB
dB
dB
dB
pF
pF
pF
pC
pC
attenuation
fin = 1 MHz; see Fig.19; note 2
4.5
1.65
2.3
3
RL = 50 Ω; CL = 5 pF; fin = 1 MHz;
see Fig.19; note 2
4.5
1.65
2.3
3
αct(E-Y/Z)
crosstalk between control input RL = 600 Ω; CL = 50 pF;
to signal output
fin = 1 MHz; tr = tf = 2 ns; see
Fig.20
87
156
302
−58
−58
−58
−58
−58
−58
−58
−58
11.0
12.5
15.6
0.8
4.5
1.65
2.3
3
αct(S)
crosstalk between switches)
RL = 600 Ω; CL = 50 pF;
fin = 1 MHz; see Fig.21
4.5
1.65
2.3
3
RL = 50 Ω; CL = 5 pF; fin = 1 MHz;
see Fig.21
4.5
2.5
3.3
5.0
CPD
power dissipation capacitance
charge injection
fin = 10 MHz
Q
CL = 0.1 nF; Vgen = 0 V; Rgen = 0 Ω; 3.3
f = 1 MHz; RL = 1 MΩ; see Fig.22;
note 3
5.5
1.2
Notes
1. Adjust fin voltage to obtain 0 dBm level at output. Increase fin frequency until dB meter reads −3 dB.
2. Adjust fin voltage to obtain 0 dBm level at input.
3. Guaranteed by design.
E
V
IH
0.1 µF
Y/Z
Z/Y
V
O
f
R
50 Ω
C
dB
in
L
L
channel
ON
1/2V
CC
MNA669
Fig.17 Test circuit for measuring the frequency response when switch is ON.
2003 Aug 12
16
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
E
V
IH
10 µF
Y/Z
Z/Y
V
O
DISTORTION
METER
f
600 Ω
R
C
L
in
L
channel
ON
1/2V
CC
MNA670
VCC
1.65 V
VIH
1.4 V (p-p)
2 V (p-p)
2.3 V
3 V
2.5 V (p-p)
4 V (p-p)
4. V
Fig.18 Test circuit for measuring sine-wave distortion.
E
V
IL
0.1 µF
Y/Z
Z/Y
V
O
f
R
R
L
50 Ω
1/2V
C
dB
in
L
L
channel
OFF
1/2V
CC
CC
MNB113
Fig.19 Test circuit for measuring feed-through when switch is OFF.
E
Y/Z
in
Z/Y
V
O
R
R
600 Ω
C
L
L
50 Ω
600 Ω
50 pF
1/2V
1/2V
CC
CC
MNA672
Fig.20 Crosstalk between control input to signal output.
17
2003 Aug 12
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
E1
V
IH
0.1 µF
50 Ω
R
in
1Y or 1Z
1Z or 1Y
V
O1
600 Ω
C
R
L
f
L
in
50 pF
600 Ω
channel ON
1/2V
CC
E2
V
IL
2Y or 2Z
2Z or 2Y
V
O2
C
R
L
600 Ω
L
R
in
600 Ω
50 pF
channel OFF
1/2V
CC
MNB114
Fig.21 Crosstalk between switches.
E
R
gen
Y/Z
Z/Y
R
V
O
logic
input
1
MΩ
0.1
nF
V
C
gen
L
L
MNA674
logic
input (E)
off
on
off
V
∆V
out
O
MNA675
Q = ∆Vout × CL
Fig.22 Charge injection test.
18
2003 Aug 12
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
PACKAGE OUTLINES
SO14: plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm
SOT108-2
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.55
1.40
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.010 0.061
0.004 0.055
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039
0.016
0.028
0.012
inches
0.041
0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
01-05-29
03-02-19
SOT108-2
MS-012
2003 Aug 12
19
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
7
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.72
0.38
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT402-1
MO-153
2003 Aug 12
20
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
SOT762-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
6
L
1
7
8
E
h
e
14
13
9
D
h
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
b
c
E
e
e
1
y
D
D
E
L
v
w
y
1
h
h
1
max.
0.05 0.30
0.00 0.18
3.1
2.9
1.65
1.35
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
2
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT762-1
- - -
MO-241
- - -
2003 Aug 12
21
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 Aug 12
22
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613508/01/pp23
Date of release: 2003 Aug 12
Document order number: 9397 750 11652
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