74LVCH16541ADL-T_技术文档

74LVCH16541A

16-bit buffer/line driver; 3-state

Rev. 3 — 15 February 2012

Product data sheet

1. General description

The 74LVCH16541A is a 16-bit buffer/line driver with 3-state outputs. The 3-state outputs

are controlled by the output enable inputs (1OEn and 2OEn). A HIGH on nOEn causes

the outputs to assume a high-impedance OFF-state.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices in mixed 3.3 V and

5 V applications.

Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused

inputs.

2. Features and benefits

 5 Volt tolerant inputs and outputs for interfacing with 5 V logic

 Wide supply voltage range from 1.2 V to 3.6 V

 CMOS low-power consumption

 MULTIBYTE flow-through standard pin-out architecture

 Low inductance multiple power and ground pins for minimum noise and ground

bounce

 Direct interface with TTL levels

 High-impedance outputs when V_CC= 0 V

 All data inputs have bus hold

 Complies with JEDEC standard:

 JESD8-7A (1.65 V to 1.95 V)

 JESD8-5A (2.3 V to 2.7 V)

 JESD8-C/JESD36 (2.7 V to 3.6 V)

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-B exceeds 200 V

 CDM JESD22-C101E exceeds 1000 V

 Specified from 40 C to +85 C and 40 C to +125 C.

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

3. Ordering information

Table 1.

Ordering information

Type number

Package

Temperature range Name

Description

Version

74LVCH16541ADGG

74LVCH16541ADL

40 to +125 C

TSSOP48 plastic thin shrink small outline package; 48 leads; SOT362-1

body width 6.1 mm

40 to +125 C

SSOP48

plastic shrink small outline package; 48 leads;

body width 7.5 mm

SOT370-1

4. Functional diagram

1

1OE1

&

47

46

2

3

36

35

13

48

1A0

1A1

1Y0

1Y1

2A0

2A1

2Y0

2Y1

1OE2

EN

24

2OE1

&

25

14

2OE2

2

3

47

A0

A1

A2

A3

A4

A5

A6

A7

A0

A1

A2

A3

A4

A5

A6

A7

1Y0

1Y1

1Y2

1Y3

1Y4

1Y5

1Y6

1Y7

2Y0

2Y1

2Y2

2Y3

2Y4

2Y5

2Y6

2Y7

1

44

43

5

6

33

32

16

17

46

44

43

41

40

38

37

36

35

33

32

30

29

27

26

1A2

1A3

1Y2

1Y3

2A2

2A3

2Y2

2Y3

5

6

8

9

41

40

38

37

8

9

30

29

27

26

19

20

22

23

1A4

1A5

1A6

1A7

1Y4

1Y5

1Y6

1Y7

2A4

2A5

2A6

2A7

2Y4

2Y5

2Y6

2Y7

11

12

13

14

16

17

19

20

22

23

2

11

12

1

24

25

1OE1

1OE2

2OE1

2OE2

48

mna056

mna057

Fig 1. IEC logic symbol

Fig 2. Logic diagram

V

CC

data

input

to internal circuit

mna004

Fig 3. Bus hold circuit

74LVCH16541A

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Product data sheet

Rev. 3 — 15 February 2012

2 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

5. Pinning information

5.1 Pinning

1OE1

1Y0

1

2

3

4

5

6

7

8

9

48 1OE2

47 1A0

46 1A1

45 GND

44 1A2

43 1A3

1Y1

GND

1Y2

1Y3

V

42

V

CC

1Y4

1Y5

41 1A4

40 1A5

39 GND

38 1A6

37 1A7

36 2A0

35 2A1

34 GND

33 2A2

32 2A3

GND 10

1Y6 11

1Y7 12

2Y0 13

2Y1 14

GND 15

2Y2 16

2Y3 17

16541

V

18

31 V

CC

2Y4 19

2Y5 20

GND 21

2Y6 22

2Y7 23

2OE1 24

30 2A4

29 2A5

28 GND

27 2A6

26 2A7

25 2OE2

mna055

Fig 4. Pin configuration

5.2 Pin description

Table 2.

Name

1OE1

1OE2

2OE1

2OE2

GND

Pin description

Description

1

output enable input (active LOW)

ground (0 V)

48

24

25

4, 10, 15, 21, 28, 34, 39, 45

7, 18, 31, 42

V_CC

positive supply voltage

data output

1Y[0:7]

2Y[0:7]

1A[0:7]

2A[0:7]

2, 3, 5, 6, 8, 9, 11, 12

13, 14, 16, 17, 19, 20, 22, 23

47, 46, 44, 43, 41, 40, 38, 37

36, 35, 33, 32, 30, 29, 27, 26

data output

data input

74LVCH16541A

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Product data sheet

Rev. 3 — 15 February 2012

3 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

6. Functional description

Table 3.

Function table^[1]

Input

Output

nOE1

nOE2

nAn

L

nYn

L

H

X

H

X

Z

X

Z

[1] H = HIGH voltage level

L = LOW voltage level

X = don’t care

Z = high-impedance OFF-state

7. Limiting values

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

V_CC

V_I

Parameter

Conditions

Min

0.5

50

-

Max

+6.5

-

Unit

V

supply voltage

[1]

input voltage

V

I_IK

input clamping current

output clamping current

output voltage

V_I< 0

mA

V

I_OK

V_O> V_CCor V_O< 0

output HIGH or LOW state

output 3-state

50

V_CC+ 0.5

+6.5

50

100

-

[2]

V_O

0.5

-

V

I_O

output current

V_O= 0 V to V_CC

mA

C

I_CC

I_GND

T_stg

P_tot

supply current

-

ground current

100

65

-

storage temperature

total power dissipation

+150

500

[3]

T_amb= 40 C to +125 C

mW

[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.

[2] The output voltage ratings may be exceeded if the output current ratings are observed.

[3] Above 60 C the value of P_totderates linearly with 5.5 mW/K.

74LVCH16541A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 15 February 2012

4 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

8. Recommended operating conditions

Table 5.

Symbol

V_CC

Recommended operating operations

Parameter

Conditions

Min

1.65

1.2

0

Max

3.6

-

Unit

V

supply voltage

functional

V

V_I

input voltage

5.5

V_CC

5.5

+125

20

V

V_O

output voltage

output HIGH or LOW state

output 3-state or V_CC= 0 V

in free air

0

V

0

V

T_amb

ambient temperature

40

0

C

ns/V

t/V

input transition rise and fall rate

V_CC= 1.65 V to 2.7 V

V_CC= 2.7 V to 3.6 V

0

10

9. Static characteristics

Table 6.

Static characteristics

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 40 C to +85 C

Min Max

Typ^[1]

1.08

40 C to +125 C

Min Max

1.08

Unit

V_IH

HIGH-levelinput V_CC= 1.2 V

voltage

-

V

V_CC= 1.65 V to 1.95 V

0.65  V_CC

-

0.65  V_CC

V

_CC= 2.3 V to 2.7 V

V_CC= 2.7 V to 3.6 V

LOW-level input V_CC= 1.2 V

1.7

-

1.7

2.0

-

2.0

V_IL

-

0.12

-

0.12

voltage

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

V_CC= 2.7 V to 3.6 V

V_I= V_IHor V_IL

0.35  V_CC

0.7

0.35  V_CC

0.7

0.8

V_OH

HIGH-level

output voltage

I_O= 100 A;

V_CC 0.2 V_CC

-

V_CC 0.3

-

V

V_CC= 1.65 V to 3.6 V

I_O= 4 mA; V_CC= 1.65 V 1.2

I_O= 8 mA; V_CC= 2.3 V 1.8

-

1.05

1.65

2.05

2.25

2.0

-

V

I_O= 12 mA; V_CC= 2.7 V 2.2

I_O= 18 mA; V_CC= 3.0 V 2.4

I_O= 24 mA; V_CC= 3.0 V 2.2

V_I= V_IHor V_IL

V_OL

LOW-level

output voltage

I_O= 100 A;

_CC= 1.65 V to 3.6 V

-

0.2

-

0.3

V

I_O= 4 mA; V_CC= 1.65 V

I_O= 8 mA; V_CC= 2.3 V

I_O= 12 mA; V_CC= 2.7 V

I_O= 24 mA; V_CC= 3.0 V

-

0.45

0.6

-

0.65

0.8

V

-

V

-

0.4

0.6

V

-

0.55

5

0.8

V

I_I

input leakage

current

V_CC= 3.6 V;

V_I= 5.5 V or GND^[2]

0.1

20

A

74LVCH16541A

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Product data sheet

Rev. 3 — 15 February 2012

5 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

Table 6.

Static characteristics …continued

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

40 C to +85 C

40 C to +125 C

Unit

Min

Typ^[1]

Max

Min

Max

20

I_OZ

OFF-state

V_I= V_IHor V_IL; V_CC= 3.6 V;

-

±0.1

5

-

A

output current^[2]V_O= 5.5 V or GND

I_OFF

I_CC

power-off

leakage supply

V_CC= 0 V; V_Ior V_O= 5.5 V

±0.1

0.1

5

10

20

20

80

supply current

V_CC= 3.6 V;

V_I= V_CCor GND; I_O= 0 A

I_CC

additional

per input pin;

500

5000

supply current

V_CC= 1.65 V to 3.6 V;

V_I= V_CC 0.6 V; I_O= 0 A

C_I

input

capacitance

V_CC= 0 V to 3.6 V;

V_I= GND to V_CC

-

5.0

-

pF

I_BHL

bus hold LOW

current ^[3][4]

V_CC= 1.65; V_I= 0.58 V

V_CC= 2.3; V_I= 0.7 V

V_CC= 3.0; V_I= 0.8 V

10

30

-

10

25

-

A

75

60

I_BHH

bus hold HIGH V_CC= 1.65; V_I= 1.07 V

current ^[3][4]

10

30

75

200

300

500

200

300

500

10

25

60

200

300

500

200

300

500

V_CC= 2.3; V_I= 1.7 V

V_CC= 3.0; V_I= 2.0 V

I_BHLO

bus hold LOW

overdrive

current ^[3][5]

V_CC= 1.95 V

V_CC= 2.7 V

V_CC= 3.6 V

I_BHHO

bus hold HIGH V_CC= 1.95 V

overdrive

current ^[3][5]

V_CC= 3.6 V

V_CC= 2.7 V

[1] All typical values are measured at V_CC= 3.3 V (unless stated otherwise) and T_amb= 25 C.

[2] The bus hold circuit is switched off when V_I> V_CCallowing 5.5 V on the input pin.

[3] For data inputs only; control inputs do not have a bus hold circuit.

[4] The specified sustaining current at the data inputs holds the input below the specified V_Ilevel.

[5] The specified overdrive current at the data input forces the data input to the opposite logic input state.

74LVCH16541A

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Product data sheet

Rev. 3 — 15 February 2012

6 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

10. Dynamic characteristics

Table 7.

Dynamic characteristics

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.

Symbol Parameter Conditions T_amb= 40 C to +85 C 40 C to +125 C Unit

Min

Typ^[1]

Max

Min

Max

[2]

t_pd

t_en

t_dis

propagation nAn to nYn; see Figure 5

delay

V_CC= 1.2 V

-

10

4.7

2.6

2.5

2.2

-

ns

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

1.8

1.5

1.0

10.4

5.2

5.0

4.2

1.8

1.5

1.0

12.0

6.0

6.5

5.5

V_CC= 2.7 V

V_CC= 3.0 V to 3.6 V

enable time nOEn to nYn; see Figure 6

V_CC= 1.2 V

-

17

5.5

3.2

3.4

2.6

-

ns

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

1.5

1.0

1.5

1.0

14.6

7.7

6.9

5.6

1.5

1.0

1.5

1.0

16.8

8.9

9.0

7.0

V_CC= 2.7 V

V_CC= 3.0 V to 3.6 V

disable time nOEn to nYn; see Figure 6

V_CC= 1.2 V

-

9.0

7.3

4.1

4.6

4.5

-

ns

V_CC= 1.65 V to 1.95 V

2.6

1.0

1.5

-

9.2

5.2

6.5

5.5

1.0

2.6

1.0

1.5

-

10.6

6.0

8.5

7.0

1.5

V

_CC= 2.3 V to 2.7 V

V_CC= 2.7 V

V_CC= 3.0 V to 3.6 V

[3]

[4]

t_sk(o)

C_PD

output skew V_CC= 3.0 V to 3.6 V

time

power

dissipation

capacitance

per input; V_I= GND to V_CC

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

-

8.5

-

pF

12.1

15.3

V_CC= 3.0 V to 3.6 V

[1] Typical values are measured at T_amb= 25 C and V_CC= 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.

[2] t_pdis the same as t_PLHand t_PHL

t_enis the same as t_PZLand t_PZH

t_disis the same as t_PLZand t_PHZ

[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.

[4] _PDis used to determine the dynamic power dissipation (P_Din W).

.

C

P_D= C_PD V_CC² f_i N + (C_L V_CC² f_o) where:

f_i= input frequency in MHz; f_o= output frequency in MHz

C_L= output load capacitance in pF

V_CC= supply voltage in Volts

N = number of inputs switching

(C_L V_CC² f_o) = sum of the outputs

74LVCH16541A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 15 February 2012

7 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

11. Waveforms

V

I

nAn input

GND

V

M

t

PLH

PHL

V

OH

V

nYn output

M

V

OL

mna171

Measurement points are given in Table 8.

V_OLand V_OHare typical output voltage levels that occur with the output load.

Fig 5. Input nAn to output nYn propagation delays

V

I

nOEn input

GND

V

M

t

PZL

PLZ

V

CC

output

V

M

LOW-to-OFF

OFF-to-LOW

V

X

V

OL

t

PHZ

PZH

V

OH

V

Y

output

HIGH-to-OFF

OFF-to-HIGH

V

M

GND

outputs

enabled

outputs

enabled

outputs

disabled

col015

Measurement points are given in Table 8.

Logic levels: V_OLand V_OHare typical output voltage levels that occur with the output load.

Fig 6. 3-state enable and disable times

Table 8.

Measurement points

Supply voltage

V_CC

V_M

Input

V_I

V_X

V_Y

1.2 V

0.5  V_CC

1.5 V

V_CC

2.7 V

V_OL+ 0.15 V

V_OL+ 0.3 V

V_OH 0.15 V

V_OH 0.3 V

1.65 V to 1.95 V

2.3 V to 2.7 V

2.7 V

3.0 V to 3.6 V

1.5 V

74LVCH16541A

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Product data sheet

Rev. 3 — 15 February 2012

8 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

t

W

V

I

90 %

negative

pulse

V

M

10 %

0 V

t

r

f

t

f

r

V

I

90 %

positive

pulse

V

M

10 %

0 V

t

W

V

EXT

R

V

CC

L

V

O

I

G

DUT

R

T

C

L

R

L

001aae331

Test data is given in Table 9.

Definitions for test circuit:

R_L= Load resistance.

C_L= Load capacitance including jig and probe capacitance.

R_T= Termination resistance should be equal to output impedance Z_oof the pulse generator.

V_EXT= External voltage for measuring switching times.

Fig 7. Test circuit for measuring switching times

Table 9.

Test data

Supply voltage

Input

V_I

Load

C_L

V_EXT

t_r, t_f

R_L

t_PLH, t_PHL

open

t_PLZ, t_PZL

2  V_CC

t_PHZ, t_PZH

GND

1.2 V

V_CC

2.7 V

 2 ns

 2.5 ns

30 pF

50 pF

1 k

500 

1.65 V to 1.95 V

2.3 V to 2.7 V

2.7 V

open

GND

open

GND

open

GND

3.0 V to 3.6 V

open

GND

74LVCH16541A

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Product data sheet

Rev. 3 — 15 February 2012

9 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

12. Package outline

TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm

SOT362-1

E

D

A

X

c

H

v

M

A

y

E

Z

48

25

Q

A

2

(A )

3

A

1

pin 1 index

θ

L

p

L

detail X

1

24

w

M

b

e

p

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions).

A

(1)

(2)

UNIT

A

b

c

D

E

e

H

L

p

Q

v

w

y

Z

θ

1

2

3

p

E

max.

8^o

0^o

0.15

0.05

1.05

0.85

0.28

0.17

0.2

0.1

12.6

12.4

6.2

6.0

8.3

7.9

0.8

0.4

0.50

0.35

0.8

0.4

mm

1.2

0.5

1

0.25

0.08

0.1

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT362-1

MO-153

Fig 8. Package outline SOT362-1 (TSSOP48)

74LVCH16541A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 15 February 2012

10 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm

SOT370-1

D

E

A

X

c

y

H

v

M

A

E

Z

25

48

Q

A

2

A

(A )

3

1

θ

pin 1 index

L

p

L

24

1

detail X

w M

b

p

e

0

5

10 mm

scale

DIMENSIONS (mm are the original dimensions)

A

(1)

UNIT

A

b

c

D

E

e

H

E

L

Q

v

w

y

Z

θ

p

1

2

3

max.

8^o

0^o

0.4

0.2

2.35

2.20

0.3

0.2

0.22 16.00

0.13 15.75

7.6

7.4

10.4

10.1

1.0

0.6

1.2

1.0

0.85

0.40

mm

2.8

0.25

0.635

1.4

0.25

0.18

0.1

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT370-1

MO-118

Fig 9. Package outline SOT370-1 (SSOP48)

74LVCH16541A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 15 February 2012

11 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

13. Abbreviations

Table 10. Abbreviations

Acronym

CDM

DUT

Description

Charged Device Model

Device Under Test

ESD

ElectroStatic Discharge

Human Body Model

Machine Model

HBM

MM

TTL

Transistor-Transistor Logic

14. Revision history

Table 11. Revision history

Document ID

Release date

20120215

Data sheet status

Change notice

Supersedes

74LVCH16541A v.3

Modifications:

Product data sheet

-

74LVCH16541A v.2

• The format of this data sheet has been redesigned to comply with the new identity guidelines

of NXP Semiconductors.

• Legal texts have been adapted to the new company name where appropriate.

• Table 4, Table 5, Table 6, Table 7, and Table 9: values added for lower voltage ranges.

74LVCH16541A v.2

74LVCH16541A v.1

20040218

Product specification

-

74LVCH16541A v.1

19980519

Product specification

-

74LVCH16541A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 15 February 2012

12 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

15. Legal information

15.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

Suitability for use — NXP Semiconductors products are not designed,

15.2 Definitions

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer’s own

risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications and

products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

15.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information. NXP Semiconductors takes no

responsibility for the content in this document if provided by an information

source outside of NXP Semiconductors.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

74LVCH16541A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 15 February 2012

13 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims resulting from customer design and

use of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specifications.

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for automotive use. It is neither qualified nor tested

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and standards, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

15.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

16. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

74LVCH16541A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 15 February 2012

14 of 15

74LVCH16541A

NXP Semiconductors

16-bit buffer/line driver; 3-state

17. Contents

1

2

3

4

General description . . . . . . . . . . . . . . . . . . . . . . 1

Features and benefits . . . . . . . . . . . . . . . . . . . . 1

Ordering information. . . . . . . . . . . . . . . . . . . . . 2

Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

5

5.1

5.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

6

Functional description . . . . . . . . . . . . . . . . . . . 4

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4

Recommended operating conditions. . . . . . . . 5

Static characteristics. . . . . . . . . . . . . . . . . . . . . 5

Dynamic characteristics . . . . . . . . . . . . . . . . . . 7

Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10

Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12

7

8

9

10

11

12

13

14

15

Legal information. . . . . . . . . . . . . . . . . . . . . . . 13

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13

Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

15.1

15.2

15.3

15.4

16

17

Contact information. . . . . . . . . . . . . . . . . . . . . 14

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 15 February 2012

Document identifier: 74LVCH16541A


型号：	74LVCH16541ADL-T
厂家：	NXP
描述：	IC LVC/LCX/Z SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, Bus Driver/Transceiver 驱动光电二极管输出元件逻辑集成电路
文件：	总15页 (文件大小：116K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

74LVCH16541ADL-T [NXP]

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