74LVT04D,118 [NXP]
74LVT04 - 3.3 V Hex inverter SOIC 14-Pin;
| 型号： | 74LVT04D,118 |
| 厂家： | 
NXP |
| 描述： | 74LVT04 - 3.3 V Hex inverter SOIC 14-Pin 信息通信管理 光电二极管 逻辑集成电路 |
| 文件： | 总13页 (文件大小：126K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LVT04
3.3 V Hex inverter
Rev. 2 — 28 April 2014
Product data sheet
1. General description
The 74LVT04 is a high-performance product designed for VCC operation at 3.3 V.
The 74LVT04 provides six inverting buffers.
2. Features and benefits
TTL input and output switching levels
Latch-up protection
JESD78 class II exceeds 500 mA
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 C to +85 C
3. Ordering information
Table 1.
Type number Package
Temperature range Name
Ordering information
Description
Version
74LVT04D
40 C to +85 C
SO14
plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
74LVT04DB
74LVT04PW
40 C to +85 C
40 C to +85 C
SSOP14
TSSOP14
plastic shrink small outline package; 14 leads; body SOT337-1
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74LVT04
NXP Semiconductors
3.3 V Hex inverter
4. Functional diagram
ꢀ
ꢀ
ꢂ
ꢁ
ꢀ<
ꢁ<
ꢂ<
ꢃ<
ꢄ<
ꢅ<
ꢀ
ꢀ
ꢀ$
ꢁ$
ꢂ$
ꢃ$
ꢄ$
ꢅ$
ꢁ
ꢃ
ꢀ
ꢂ
ꢃ
ꢄ
ꢅ
ꢅ
ꢄ
ꢀ
ꢀ
ꢀ
ꢆ
ꢇ
ꢇ
ꢆ
ꢀꢀ
ꢀꢂ
ꢀꢈ
ꢀꢁ
ꢀꢀ
ꢀꢂ
ꢀꢈ
ꢀꢁ
Y
A
mna341
PQDꢀꢁꢂ
PQDꢀꢁꢀ
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram for one gate
5. Pinning information
5.1 Pinning
1
2
3
4
5
6
7
14
13
12
11
10
9
1A
1Y
V
CC
6A
6Y
5A
5Y
4A
4Y
2A
2Y
04
3A
3Y
8
GND
001aac915
Fig 4. Pin configuration SOT108-1 (SO14), SOT337-1 (SSOP14) and SOT402-1 (TSSOP14)
74LVT04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 28 April 2014
2 of 13
74LVT04
NXP Semiconductors
3.3 V Hex inverter
5.2 Pin description
Table 2.
Symbol
nA
Pin description
Pin
Description
data input
1, 3, 5, 9, 11, 13
nY
2, 4, 6, 8, 10, 12
data output
ground (0 V)
supply voltage
GND
VCC
7
14
6. Functional description
Table 3.
Function table[1]
Input
nA
L
Output
nY
H
H
L
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
0.5
0.5
0.5
50
50
-
Max
+4.6
+7.0
+7.0
-
Unit
V
supply voltage
[1]
[1]
input voltage
V
VO
output voltage
output in OFF-state or HIGH-state
VI < 0 V
V
IIK
input clamping current
output clamping current
output current
mA
mA
mA
mA
C
IOK
VO < 0 V
-
IO
output in LOW-state
output in HIGH-state
64
-
32
+150
150
500
Tstg
Tj
storage temperature
junction temperature
total power dissipation
65
-
[2]
[3]
C
Ptot
Tamb = 40 °C to +85 °C
-
mW
[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability.
[3] For SO14 packages: above 70 C derate linearly with 8 mW/K.
For SSOP14 and TSSOP14 packages: above 60 C derate linearly with 5.5 mW/K.
74LVT04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 28 April 2014
3 of 13
74LVT04
NXP Semiconductors
3.3 V Hex inverter
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Symbol Parameter
Conditions
Min
Max
3.6
5.5
-
Unit
V
VCC
VI
supply voltage
2.7
input voltage
0
V
VIH
HIGH-level input voltage
LOW-level input voltage
HIGH-level output current
LOW-level output current
ambient temperature
input transition rise and fall rate
2.0
V
VIL
-
0.8
20
32
V
IOH
-
mA
mA
C
ns/V
IOL
-
Tamb
t/V
in free air
40
+85
10
outputs enabled
-
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
40 C to +85 C
Unit
Min
Typ[1]
Max
1.2
VIK
input clamp voltage
LOW-level input voltage
VCC = 2.7 V; IIK = 18 mA
-
-
-
-
-
-
-
-
-
-
-
-
V
VOH
VCC = 2.7 V to 3.6 V; IOH = 100 A
VCC 0.2
-
V
VCC = 2.7 V; IOH = 6 mA
2.4
-
V
VCC = 3.0 V; IOH = 20 mA
2.0
-
V
VOL
LOW-level output voltage VCC = 2.7 V; IOL = 100 A
VCC = 2.7 V; IOL = 24 mA
-
-
-
-
-
-
-
0.2
0.5
0.5
10
±1
±100
0.02
V
V
VCC = 3.0 V; IOL = 32 mA
V
II
input leakage current
VCC = 0 V or 3.6 V; VI = 5.5 V
VCC = 3.6 V; VI = VCC or GND
VCC = 0 V; VI or VO = 0 V to 4.5 V
A
A
A
mA
IOFF
ICCH
output off current
quiescent supply current VCC = 3.6 V; outputs HIGH;
VI = GND or VCC, IO = 0 V
ICCL
quiescent supply current VCC = 3.6 V; outputs LOW;
VI = GND or VCC; IO = 0 V
-
-
1.5
-
3
mA
ICC
additional supply current VCC = 3 V to 3.6 V;
0.2
A
per input pin[2]
one input at VCC 0.6 V;
other inputs at VCC or GND
CI
input capacitance
VI = 3 V or 0 V
-
3
-
pF
[1] All typical values are at VCC = 3.3 V and Tamb = 25C.
[2] This is the increase in supply current for each input at the specified voltage level other than VCC or GND.
74LVT04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 28 April 2014
4 of 13
74LVT04
NXP Semiconductors
3.3 V Hex inverter
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V; for test circuit, see Figure 6.
Symbol Parameter Conditions
40 C to +85 C
Unit
Min
Typ[1]
Max
tPLH
LOW to OFF-state
propagation delay
nA to nY; see Figure 5
VCC = 2.7 V
-
-
4.7
3.9
ns
ns
ns
VCC = 3.3 V 0.3 V
nA to nY; see Figure 5
VCC = 2.7 V
1.0
2.6
tPHL
OFF-state to LOW
propagation delay
-
-
3.2
3.5
VCC = 3.3 V 0.3 V
1.0
2.5
ns
[1] All typical values are at VCC = 3.3 V and Tamb = 25C.
11. Waveforms
9
,
9
9
0
Q$ꢉLQSXW
0
*1'
W
W
3+/
3/+
9
2+
9
0
9
0
Q<ꢉRXWSXW
9
PQDꢀꢁꢁ
2/
VM = 50%; VI = GND to VCC
.
VM = 1.5 V; VI = GND to 2.7 V
Fig 5. The input nA to output nY propagation delays
74LVT04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 28 April 2014
5 of 13
74LVT04
NXP Semiconductors
3.3 V Hex inverter
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
CC
V
V
O
I
PULSE
GENERATOR
DUT
R
T
C
L
R
L
001aaf615
Test data is given in Table 8.
Definitions test circuit:
RT = termination resistance should be equal to output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
RL = Load resistance.
Fig 6. Test circuit for measuring switching times
Table 8.
Input
VI
Test data
Load
CL
fi
tW
tr, tf
RL
2.7 V
10 MHz 500 ns
2.5 ns
50 pF
500
74LVT04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 28 April 2014
6 of 13
74LVT04
NXP Semiconductors
3.3 V Hex inverter
12. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
Fig 7. Package outline SOT108-1 (SO14)
74LVT04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 28 April 2014
7 of 13
74LVT04
NXP Semiconductors
3.3 V Hex inverter
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
7
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.4
0.9
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT337-1
MO-150
Fig 8. Package outline SOT337-1 (SSOP14)
74LVT04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 28 April 2014
8 of 13
74LVT04
NXP Semiconductors
3.3 V Hex inverter
76623ꢁꢆꢇꢀSODVWLFꢀWKLQꢀVKULQNꢀVPDOOꢀRXWOLQHꢀSDFNDJHꢈꢀꢁꢆꢀOHDGVꢈꢀERG\ꢀZLGWKꢀꢆꢉꢆꢀPPꢀ
627ꢆꢊꢂꢋꢁꢀ
'ꢉ
(ꢉ
$ꢉ
;ꢉ
Fꢉ
\ꢉ
+ꢉ
(ꢉ
Yꢉ 0ꢉ
$ꢉ
=ꢉ
ꢇꢉ
ꢀꢃꢉ
4ꢉ
ꢍ$ꢉꢉꢎꢉ
ꢂꢉ
$ꢉ
ꢁꢉ
$ꢉ
$ꢉ
ꢀꢉ
SLQꢉꢀꢉLQGH[ꢉ
șꢉ
/ꢉ
Sꢉ
/ꢉ
ꢀꢉ
ꢋꢉ
GHWDLOꢉ;ꢉ
Zꢉ 0ꢉ
Eꢉ
Sꢉ
Hꢉ
ꢈꢉ
ꢁꢊꢄꢉ
ꢄꢉPPꢉ
VFDOHꢉ
',0(16,216ꢀꢄPPꢀDUHꢀWKHꢀRULJLQDOꢀGLPHQVLRQVꢅꢀ
$ꢀ
ꢄꢁꢅꢀ
ꢄꢂꢅꢀ
ꢄꢁꢅꢀ
81,7ꢀ
PPꢉ
$ꢀ
ꢁꢀ
$ꢀ
ꢂꢀ
$ꢀ
ꢃꢀ
Eꢀ
Sꢀ
Fꢀ
'ꢀ
(ꢀ
Hꢀ
+ꢀ
/ꢀ
/ꢀ
Sꢀ
4ꢀ
Yꢀ
Zꢀ
\ꢀ
ꢈꢊꢀꢉ
=ꢀ
șꢉ
(ꢀ
PD[ꢉꢀ
Rꢉ
ꢈꢊꢀꢄꢉ ꢈꢊꢆꢄꢉ
ꢈꢊꢈꢄꢉ ꢈꢊꢇꢈꢉ
ꢈꢊꢂꢈꢉ
ꢈꢊꢀꢆꢉ
ꢈꢊꢁꢉ
ꢈꢊꢀꢉ
ꢄꢊꢀꢉ
ꢃꢊꢆꢉ
ꢃꢊꢄꢉ
ꢃꢊꢂꢉ
ꢅꢊꢅꢉ
ꢅꢊꢁꢉ
ꢈꢊꢋꢄꢉ
ꢈꢊꢄꢈꢉ
ꢈꢊꢃꢉ
ꢈꢊꢂꢉ
ꢈꢊꢋꢁꢉ
ꢈꢊꢂꢇꢉ
ꢇꢉ
ꢀꢊꢀꢉ
ꢈꢊꢅꢄꢉ
ꢀꢉ
ꢈꢊꢁꢉ ꢈꢊꢀꢂꢉ
ꢈꢊꢁꢄꢉ
Rꢉ
ꢈꢉ
1RWHVꢀ
ꢀꢊꢉ3ODVWLFꢉRUꢉPHWDOꢉSURWUXVLRQVꢉRIꢉꢈꢊꢀꢄꢉPPꢉPD[LPXPꢉSHUꢉVLGHꢉDUHꢉQRWꢉLQFOXGHGꢊꢉ
ꢁꢊꢉ3ODVWLFꢉLQWHUOHDGꢉSURWUXVLRQVꢉRIꢉꢈꢊꢁꢄꢉPPꢉPD[LPXPꢉSHUꢉVLGHꢉDUHꢉQRWꢉLQFOXGHGꢊꢉ
ꢀ5()(5(1&(6ꢀ
ꢀ-('(&ꢀ ꢀ-(,7$ꢀ
ꢉ02ꢌꢀꢄꢂꢉ
287/,1(ꢀ
9(56,21ꢀ
(8523($1ꢀ
352-(&7,21ꢀ
,668(ꢀ'$7(ꢀ
ꢀ,(&ꢀ
ꢆꢆꢌꢀꢁꢌꢁꢋꢉ
ꢈꢂꢌꢈꢁꢌꢀꢇꢉ
ꢉ627ꢃꢈꢁꢌꢀꢉ
Fig 9. Package outline SOT402-1 (TSSOP14)
74LVT04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 28 April 2014
9 of 13
74LVT04
NXP Semiconductors
3.3 V Hex inverter
13. Abbreviations
Table 9.
Acronym
ESD
Abbreviations
Description
ElectroStatic Discharge
Human Body Model
HBM
14. Revision history
Table 10. Revision history
Document ID
74LVT04 v.2
Modifications:
Release date
20140428
Data sheet status
Change notice
Supersedes
74LVT04_1
Product data sheet
-
• The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Imported the data sheet into the latest template
74LVT04_1
19960828
Product specification
-
-
74LVT04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 28 April 2014
10 of 13
74LVT04
NXP Semiconductors
3.3 V Hex inverter
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
15.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
74LVT04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 28 April 2014
11 of 13
74LVT04
NXP Semiconductors
3.3 V Hex inverter
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74LVT04
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 28 April 2014
12 of 13
74LVT04
NXP Semiconductors
3.3 V Hex inverter
17. Contents
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
7
8
9
10
11
12
13
14
15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
15.1
15.2
15.3
15.4
16
17
Contact information. . . . . . . . . . . . . . . . . . . . . 12
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2014.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 28 April 2014
Document identifier: 74LVT04
相关型号：
©2020 ICPDF网 联系我们和版权申明