74LVT1403 [NXP]

3.3V combined 8-bit bus receiver and 4-bit bus driver; 3.3V合并的8位总线接收器和4位的总线驱动器
74LVT1403
型号: 74LVT1403
厂家: NXP    NXP
描述:

3.3V combined 8-bit bus receiver and 4-bit bus driver
3.3V合并的8位总线接收器和4位的总线驱动器

总线驱动器
文件: 总10页 (文件大小:74K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
74LVT1403  
3.3V combined 8-bit bus receiver and  
4-bit bus driver  
Product specification  
IC23 Data Handbook  
1998 Nov 12  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
3.3V combined 8-bit bus receiver  
and 4-bit bus driver  
74LVT1403  
FEATURES  
4-bit 74LVT125-like bus driver  
DESCRIPTION  
The 74LVT1403 is a high-performance BiCMOS product designed  
for V operation at 3.3V.  
CC  
8-bit 74LVT14-like Schmitt trigger  
Bus drive +64mA/–32mA  
This device combines the functionality of a 4-bit data path bus driver  
and 8-bit Schmitt trigger bus receiver, along with control logic in one  
32-pin package.  
7 bus inputs with common inversion control pin  
32-pin TSSOP footprint  
The receiver inputs are Schmitt trigger type capable of transforming  
slowly changing input signals into sharply defined, jitter-free output  
signals. The receiver outputs are 74LVT14 style with +32mA/–20mA  
drive capability. The receiver inputs include the bus hold feature.  
DE pin with resistive pull up and active LOW for easier live  
insertion  
The driver outputs feature power-up in 3-State/live insertion  
capability and are all controlled by the A/B, EN1, and EN2 control  
pins. The driver inputs include the bus hold feature.  
DE pin includes Schmitt trigger with typical 0.6V hysteresis  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
Propagation delay An to Yn  
Propagation delay An to Yn  
Input capacitance  
C = 50pF; V = 3.3V  
4.5  
4.0  
3
ns  
ns  
PLH  
L
CC  
C = 50pF; V = 3.3V  
PHL  
L
CC  
C
V = 0V or 3.0V  
I
pF  
mA  
IN  
I
Total supply current  
Outputs low, V = 3.6V  
4
CC  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
DWG NUMBER  
32-pin plastic TSSOP  
–40°C to +85°C  
74LVT1403 DR  
74LVT1403 DR  
SOT487-1  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN NUMBER  
SYMBOL NAME AND FUNCTION  
32  
31  
V
1
CC  
31, 30, 29, 28, 27, 26,  
25, 24  
RA0–RA7  
Receive Data inputs  
INV  
RY0  
2
RA0  
2, 3, 4, 5, 6, 7, 8, 9  
12, 13, 14, 15  
21, 20, 19, 18  
10, 11  
RY0–RY7  
DA0–DA3  
DY0–DY3  
EN1, EN2  
A/B  
Receive Data outputs  
Driver Data inputs  
RY1  
3
30 RA1  
29 RA2  
28 RA3  
RY2  
RY3  
4
5
Driver Data outputs  
Driver Output enables  
27  
26  
25  
RY4  
RY5  
RY6  
RY7  
6
7
8
9
RA4  
RA5  
RA6  
23  
Mode control for en-  
ables  
THIN  
SHRINK  
SMALL  
OUTLINE  
PACKAGE  
(TSSOP)  
1
16, 22  
32  
INV  
Inversion control  
Ground (0V)  
24 RA7  
GND  
23  
A/B  
EN1 10  
EN2 11  
DA0 12  
DA1 13  
DA2 14  
DA3 15  
GND 16  
V
CC  
Positive supply voltage  
22  
21  
20  
19  
18  
GND  
DY0  
DY1  
DY2  
DY3  
17  
DE  
Driver output enable ac-  
tive LOW with resistive  
pull up  
17  
DE  
SV00907  
2
1998 Nov 12  
853-2134 20359  
Philips Semiconductors  
Product specification  
3.3V combined 8-bit bus receiver  
and 4-bit bus driver  
74LVT1403  
LOGIC SYMBOL  
FUNCTION TABLE – RECEIVER  
INPUTS  
OUTPUTS  
INV  
RA0–RA7  
INV  
X
RY0  
H
RY1–RY7  
RY0  
RY1  
RA0  
L
H
L
L
X
L
RA1  
L
H
L
L
H
H
L
H
H
RY7  
A/B  
RA7  
H
H
L
X
=
=
=
High voltage level  
Low voltage level  
Don’t care  
EN1  
EN2  
CONTROL  
BLOCK  
— = Reported on different line  
DE  
FUNCTION TABLE – DRIVER  
CONTROL INPUTS  
OUTPUT CONDITION  
DA0  
DA1  
DA2  
DA3  
DY0  
DY1  
DY2  
DE  
L
A/B  
L
EN1  
L
EN2  
L
DY Status  
A
Z
Z
A
Z
Z
Z
L
L
X
H
L
L
H
X
L
H
H
H
X
H
H
DY3  
L
X
L
SV00900  
L
L
X
H
X
X
H
L
X
Z
A
=
=
=
=
=
High voltage level  
Low voltage level  
Don’t care  
High impedance “off” state  
Active  
DATA PATH IN ACTIVE MODE  
INPUT  
DAn  
L
OUTPUT  
DYn  
L
H
H
3
1998 Nov 12  
Philips Semiconductors  
Product specification  
3.3V combined 8-bit bus receiver  
and 4-bit bus driver  
74LVT1403  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
CONDITIONS  
RATING  
UNIT  
V
DC supply voltage  
–0.5 to +4.6  
–0.5 to +7.0  
–0.5 to +7.0  
128  
V
CC  
3
V
DC input voltage  
V
I
3
V
OUT  
DC output voltage  
Output in Off or High state  
Output in Low state  
Output in High state  
Output in Low state  
Output in High state  
V
mA  
mA  
mA  
mA  
mA  
mA  
°C  
DYn DC output current  
RYn DC output current  
–64  
I
OUT  
–32  
64  
I
DC input diode current  
DC output diode current  
Storage temperature range  
V < 0  
I
–50  
IK  
I
V
O
< 0  
–50  
OK  
T
stg  
–65 to +150  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.  
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
SYMBOL  
PARAMETER  
UNIT  
MIN  
2.7  
0
MAX  
3.6  
V
CC  
DC supply voltage  
Input voltage  
V
V
V
I
5.5  
V
High-level input voltage  
Low-level Input voltage  
2.0  
V
IH  
V
0.8  
–32  
–20  
32  
V
IL  
DYn  
RYn  
DYn  
RYn  
DYn  
mA  
mA  
mA  
mA  
mA  
ns/V  
°C  
I
High-level output current  
Low-level output current  
OH  
32  
I
OL  
Low-level output current; current duty cycle 50%, f 1kHz  
Input transition rise or fall rate; Outputs enabled  
Operating free-air temperature range  
64  
t/V  
10  
T
amb  
–40  
+85  
4
1998 Nov 12  
Philips Semiconductors  
Product specification  
3.3V combined 8-bit bus receiver  
and 4-bit bus driver  
74LVT1403  
DC ELECTRICAL CHARACTERISTICS  
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).  
LIMITS  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
Temp = -40°C to +85°C  
UNIT  
1
MIN  
TYP  
MAX  
V
V
Positive-going threshold  
RAn  
RAn  
RAn  
V
V
= 3.3V  
= 3.3V  
= 3.3V  
1.5  
1.7  
2.0  
V
V
T+  
CC  
Negative-going  
threshold  
0.9  
0.4  
1.1  
0.6  
1.3  
T–  
CC  
V  
Hysteresis  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
T
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
V
Input clamp voltage  
= 2.7V; I = –18mA  
–1.2  
IK  
IK  
= 2.7 to 3.6V; I = –100µA  
V
–0.2  
CC  
OH  
RYn  
DYn  
RYn  
= 2.7V; I = –6mA  
2.4  
2.0  
OH  
= 3.0V; I = –20mA  
OH  
High-level output  
voltage  
V
OH  
= 2.7 to 3.6V; I = –100µA  
V
CC  
–0.2  
V
CC  
–0.1  
OH  
= 2.7V; I = –8mA  
2.4  
2.0  
2.5  
OH  
= 3.0V; I = –32mA  
2.2  
OH  
= 2.7V; I = 100µA  
0.2  
0.5  
0.5  
0.2  
0.5  
0.4  
0.5  
0.55  
10  
OL  
= 2.7V; I = 24mA  
OL  
= 3.0V; I = 32mA  
OL  
= 2.7V; I = 100µA  
0.1  
0.3  
0.25  
0.3  
0.4  
1
OL  
V
OL  
Low-level output voltage  
= 2.7V; I = 24mA  
OL  
DYn  
= 3.0V; I = 16mA  
OL  
= 3.0V; I = 32mA  
OL  
= 3.0V; I = 64mA  
OL  
= 0 or 3.6V; V = 5.5V  
All inputs  
Control pins  
INV, EN1, EN2, A/B  
DE  
I
= 3.6V; V = V  
±0.1  
±0.1  
–60  
0.1  
–1  
±1  
I
CC  
±1  
µA  
I
Input leakage current  
Output off current  
V
= 3.6V; V = GND  
I
CC I  
–100  
1
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 3.6V; V = V  
I CC  
4
Data port  
= 3.6V; V = GND  
–5  
µA  
µA  
µA  
µA  
I
I
= 0V; V or V = 0 to 4.5V  
1
±100  
OFF  
I
O
= 3V; V = 0.8V  
75  
150  
–150  
I
Bus hold current RA and DA  
inputs  
I
HOLD  
= 3V; V = 2.0V  
–75  
I
Current into an output in the  
I
V
V
= 5.5V; V = 3.0V  
60  
125  
µA  
EX  
O
CC  
High state when V > V  
O
CC  
1.2V; V = 0.5V to V  
CC  
;
CC  
O
Power-up/down 3-State output  
V = GND or V  
;
I
±1  
±100  
µA  
I
CC  
PU/PD  
3
current  
EN1, EN2, A/B, DE = Don’t care  
I
3-State output high current  
3-State output low current  
V
V
V
= 3.6V; V = 3.0V  
1
5
µA  
µA  
OZH  
CC  
CC  
CC  
O
I
= 3.6V; V = 0.5V  
–1  
–5  
OZL  
O
= 3.6V;  
I
0.13  
4
0.19  
11  
mA  
mA  
mA  
mA  
CCH  
Outputs High, V = GND or V  
I
= 0  
= 0  
I
CC, O  
V
CC  
= 3.6V;  
Quiescent supply current  
I
CCL  
Outputs Low, V = GND or V  
I
CC, O  
I
V
= 3.6V;  
CC  
I
0.13  
0.1  
0.19  
0.2  
CCZ  
5
Outputs Disabled, V = GND or V  
I = 0  
CC, O  
I
Additional supply current per  
V
= 3V to 3.6V; One input at V –0.6V,  
CC CC  
I  
CC  
2
input pin  
Other inputs at V or GND  
CC  
NOTES:  
1. All typical values are at V = 3.3V and T  
= 25°C.  
amb  
CC  
2. This is the increase in supply current for each input at the specified voltage level other than V or GND.  
CC  
3. This parameter is valid for any V between 0V and 1.2V with a transition time of up to 10msec. From V = 1.2V to V = 3.3V ± 0.3V, a  
CC  
CC  
CC  
transition time of 100µsec is permitted. This parameter is valid for T  
= 25°C only.  
amb  
4. Unused pins at V or GND.  
CC  
5. All RYn outputs High. All DYn outputs pulled up to V or pulled down to ground.  
CC  
5
1998 Nov 12  
Philips Semiconductors  
Product specification  
3.3V combined 8-bit bus receiver  
and 4-bit bus driver  
74LVT1403  
AC CHARACTERISTICS  
RAn = Receive inputs; Ryn = Receive outputs  
DAn = Driver inputs; Dyn = Driver outputs  
LIMITS  
= 3.3V ± 0.3V  
V
CC  
V
CC  
= 2.7V  
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
MIN  
TYP  
MAX  
MAX  
t
t
Propagation delay  
RA0 to RY0  
1.0  
1.0  
3.8  
3.2  
5.7  
4.4  
6.9  
4.3  
PLH  
PHL  
2
1, 2  
1, 2  
1
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
t
t
Propagation delay  
RAn to RYn (n = 1 to 7)  
2.0  
2.0  
4.5  
4.0  
6.7  
5.7  
7.8  
6.4  
PLH  
PHL  
t
t
Propagation delay  
Invert to RYn  
2.0  
2.0  
4.0  
3.6  
6.3  
5.5  
7.1  
7.4  
PLH  
PHL  
t
t
Propagation delay  
DAn to DYn  
1.0  
1.0  
3.1  
2.0  
4.2  
3.0  
4.7  
3.5  
PLH  
PHL  
t
Output enable time  
ENn to DYn with A/B = 0  
2.0  
2.0  
4.8  
4.3  
7.1  
6.7  
9.6  
7.4  
PZH  
3
t
PZL  
t
Output enable time  
ENn to DYn with A/B = 1  
2.0  
2.0  
4.3  
4.0  
6.5  
6.1  
7.8  
6.6  
PZH  
4
t
PZL  
t
Output disable time  
ENn to DYn with A/B =0  
2.0  
2.0  
4.7  
4.0  
7.1  
6.3  
8.2  
6.9  
PHZ  
3
t
PLZ  
t
Output disable time  
ENn to DYn with A/B =1  
2.0  
2.0  
4.2  
4.0  
6.8  
6.2  
8.3  
6.5  
PHZ  
4
t
PLZ  
t
Output enable time  
A/B to DYn  
2.0  
2.0  
5.0  
4.2  
8.6  
6.5  
9.5  
7.2  
PZH  
3, 4  
3, 4  
3
t
PZL  
t
Output disable time  
A/B to DYn  
2.0  
2.0  
5.1  
4.3  
7.5  
6.2  
7.7  
6.6  
PHZ  
t
PLZ  
t
Output enable time  
DE to DYn  
2.0  
2.0  
5.1  
4.7  
7.6  
6.8  
9.1  
7.5  
PZH  
t
PZL  
t
Output disable time  
DE to DYn  
2.0  
2.0  
5.9  
4.9  
9.3  
7.2  
9.7  
7.7  
PHZ  
3
t
PLZ  
AC WAVEFORMS  
V
M
= 1.5V, V = GND to 2.7V  
IN  
2.7V  
0V  
2.7V  
0V  
INV INPUT  
An INPUT  
INV INPUT  
RAn INPUT  
1.5V  
1.5V  
1.5V  
1.5V  
t
t
t
t
PLH  
PLH  
PHL  
PHL  
V
V
V
V
OH  
OL  
OH  
OL  
Yn OUTPUT  
RYn OUTPUT  
1.5V  
1.5V  
1.5V  
1.5V  
SV00897  
SV01015  
Waveform 1. Input (An) to Output (Yn) Propagation Delays  
Waveform 2. Input (An) to Output (Yn) Propagation Delays  
6
1998 Nov 12  
Philips Semiconductors  
Product specification  
3.3V combined 8-bit bus receiver  
and 4-bit bus driver  
74LVT1403  
AC WAVEFORMS (Continued)  
V
M
= 1.5V, V = GND to 2.7V  
IN  
2.7V  
2.7V  
A/B INPUT  
OE INPUT  
A/B INPUT  
OE INPUT  
1.5V  
1.5V  
1.5V  
1.5V  
0V  
0V  
t
t
t
t
PZL  
PLZ  
PZL  
PLZ  
3.0V  
3.0V  
Yn OUTPUT  
Yn OUTPUT  
Yn OUTPUT  
Yn OUTPUT  
1.5V  
1.5V  
V
V
+ 0.3V  
V
V
+ 0.3V  
OL  
OL  
OL  
OL  
t
t
t
t
PZH  
PHZ  
PZH  
PHZ  
V
V
V
V
OH  
OH  
OH  
OH  
– 0.3V  
– 0.3V  
0V  
SV00898  
0V  
SV01014  
Waveform 3. 3-State Output Enable and Disable Times  
Waveform 4. 3-State Output Enable and Disable Times  
TEST CIRCUIT AND WAVEFORM  
6.0V  
V
CC  
t
W
AMP (V)  
Open  
GND  
90%  
90%  
NEGATIVE  
PULSE  
V
V
M
V
V
OUT  
M
10%  
R
R
IN  
L
10%  
90%  
PULSE  
GENERATOR  
D.U.T.  
0V  
(t  
t
t
(t  
(t  
)
t
TLH  
)
THL  
F
R
R
T
C
L
L
)
t
(t )  
TLH  
R
THL F  
AMP (V)  
90%  
M
Test Circuit for 3-State Outputs  
POSITIVE  
PULSE  
V
V
M
10%  
10%  
t
W
0V  
SWITCH POSITION  
V
= 1.5V  
M
TEST  
SWITCH  
Open  
6V  
Input Pulse Definition  
t
/t  
PLH PHL  
t
/t  
PLZ PZL  
t
/t  
GND  
PHZ PZH  
INPUT PULSE REQUIREMENTS  
DEFINITIONS  
FAMILY  
R = Load resistor; see AC CHARACTERISTICS for value.  
L
Amplitude  
Rep. Rate  
t
t
R
t
F
W
C = Load capacitance includes jig and probe capacitance;  
L
see AC CHARACTERISTICS for value.  
74LVT  
2.7V  
500ns  
v10MHz  
v2.5ns v2.5ns  
R = Termination resistance should be equal to Z  
T
of  
OUT  
pulse generators.  
SV00092  
7
1998 Nov 12  
Philips Semiconductors  
Product specification  
3.3V combined 8-bit bus receiver  
and 4-bit bus driver  
74LVT1403  
TSSOP32: plastic thin shrink small outline package; 32 leads;  
body width 6.1 mm; lead pitch 0.65 mm  
SOT487-1  
8
1998 Nov 12  
Philips Semiconductors  
Product specification  
3.3V combined 8-bit bus receiver  
and 4-bit bus driver  
74LVT1403  
NOTES  
9
1998 Nov 12  
Philips Semiconductors  
Product specification  
3.3V combined 8-bit bus receiver  
and 4-bit bus driver  
74LVT1403  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make chages at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
Production  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1998  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
Date of release: 05-98  
Document order number:  
9397-750-04815  
Philips  
Semiconductors  

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