74LVT16646ADL,112 [NXP]
74LVT16646A - 3.3 V 16-bit bus transceiver; 3-state SSOP 56-Pin;
| 型号： | 74LVT16646ADL,112 |
| 厂家： | 
NXP |
| 描述： | 74LVT16646A - 3.3 V 16-bit bus transceiver; 3-state SSOP 56-Pin |
| 文件： | 总21页 (文件大小：101K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LVT16646A
3.3 V 16-bit bus transceiver; 3-state
Rev. 03 — 12 January 2005
Product data sheet
1. General description
The 74LVT16646A is a high-performance BiCMOS product designed for VCC operation at
3.3 V. This device is a 16-bit transceiver featuring non-inverting 3-state bus compatible
outputs in both send and receive directions. The control function implementation
minimizes external timing requirements. The device features an output enable (OE) input
for easy cascading and a direction (DIR) input for direction control.
Data on bus A or bus B is clocked into the registers on the LOW-to-HIGH transition of the
appropriate clock (CPAB or CPBA). The select control (SAB and SBA) inputs can
multiplex stored and real-time (transparent mode data).
2. Features
■ 16-bit universal bus interface
■ 3-state buffers
■ Output capability: from +64 mA to −32 mA
■ TTL input and output switching levels
■ Input and output interface capability to systems at 5 V supply
■ Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
■ Live insertion and extraction permitted
■ No bus-current loading when output is tied to 5 V bus
■ Power-up reset
■ Power-up 3-state
■ Latch-up protection exceeds 500 mA per JESD78
■ ESD protection:
◆ MIL STD 883 Method 3 015: exceeds 2000 V
◆ Machine model: exceeds 200 V
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
3. Quick reference data
Table 1:
Quick reference data
Tamb = 25 °C.
Symbol
Parameter
Conditions
Min Typ Max Unit
tPLH, tPHL propagation delay nAx to nBx or
nBx to nAx
CL = 50 pF; VCC = 3.3 V
-
1.9
-
ns
CI
input capacitance
VI = 0 V or 3.0 V
-
-
-
3
-
-
-
pF
pF
µA
CI/O
ICC
I/O pin capacitance
quiescent supply current
VI/O = 0 V or 3.0 V; outputs disabled
VCC = 3.6 V; outputs disabled
9
70
4. Ordering information
Table 2:
Ordering information
Type number
Package
Temperature range Name
Description
Version
74LVT16646ADGG −40 °C to +85 °C
TSSOP56 plastic thin shrink small outline package; 56 leads; body SOT364-1
width 6.1 mm
74LVT16646ADL
−40 °C to +85 °C
SSOP56 plastic shrink small outline package; 56 leads; body
width 7.5 mm
SOT371-1
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
2 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
5. Functional diagram
5
6
8
9
10 12 13 14
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
2
3
1CPAB
1SAB
1DIR
1
55
1CPBA
1SBA
1OE
54
56
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
52 51 49 48 47 45 44 43
15 16 18 19 20 22 23 24
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
27
26
28
30
31
29
2CPAB
2SAB
2DIR
2CPBA
2SBA
2OE
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
42 41 40 38 37 36 34 33
001aac208
Fig 1. Logic symbol
56
G3
29
G10
3EN1[BA]
3EN2[AB]
G6
G7
C4
10EN8[BA]
10EN9[AB]
G13
G14
C11
1
54
3
55
2
28
31
26
31
27
C5
C12
1
6
1
52
42
4D
13 11D
13 1
5
15
1
8
6 1
1
2
1
9
5D
1
7
7
12D 14
1
14
6
8
51
49
48
47
45
44
43
16
17
19
20
21
23
24
41
40
38
37
36
34
33
9
10
12
13
14
001aac207
Fig 2. IEC logic symbol
9397 750 14326
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Product data sheet
Rev. 03 — 12 January 2005
3 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
nOE
nDIR
nCPBA
nSBA
nCPAB
nSAB
1 OF 16 CHANNELS
1D
C1
Q
nA0
nB0
1D
C1
Q
nA1
nA2
nA3
nA4
nA5
nA6
nA7
nB1
nB2
nB3
nB4
nB5
nB6
nB7
OTHER CHANNELS
001aac214
Fig 3. Logic diagram
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
4 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
6. Pinning information
6.1 Pinning
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1DIR
1CPAB
1SAB
GND
1OE
2
1CPBA
1SBA
GND
1B0
3
4
5
1A0
6
1A1
1B1
7
V
CC
V
CC
8
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A1
2A2
GND
2A3
2A4
2A5
1B2
1B3
1B4
GND
1B5
1B6
1B7
2B0
2B1
2B2
GND
2B3
2B4
2B5
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
16646A
V
CC
V
CC
2A6
2A7
2B6
2B7
GND
GND
2SBA
2CPBA
20E
2SAB
2CPAB
2DIR
001aac209
Fig 4. Pinning configuration
6.2 Pin description
Table 3:
Pin description
Symbol
1DIR
1CPAB
1SAB
GND
1A0
Pin
1
Description
direction control inputs 0 to 7
clock inputs 0 to 7; A to B side
select inputs 0 to 7; A to B side
ground (0V)
2
3
4
5
data input or output 0; A side
data input or output 1; A side
positive supply voltage
1A1
6
VCC
7
1A2
8
data input or output 2; A side
9397 750 14326
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Product data sheet
Rev. 03 — 12 January 2005
5 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
Table 3:
Symbol
1A3
Pin description …continued
Pin
9
Description
data input or output 3; A side
1A4
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
data input or output 4; A side
ground (0V)
GND
1A5
data input or output 5; A side
data input or output 6; A side
data input or output 7; A side
data input or output 8; A side
data input or output 9; A side
data input or output 10; A side
ground (0V)
1A6
1A7
2A0
2A1
2A2
GND
2A3
data input or output 11; A side
data input or output 12; A side
data input or output 13; A side
positive supply voltage
2A4
2A5
VCC
2A6
data input or output 14; A side
data input or output 15; A side
ground (0V)
2A7
GND
2SAB
2CPAB
2DIR
2OE
2CPBA
2SBA
GND
2B7
select inputs 8 to 15; A to B side
clock inputs 8 to 15; A to B side
direction control inputs 8 to 15
output enable inputs 8 to 15
clock inputs 8 to 15; B to A side
select inputs 8 to 15; B to A side
ground (0V)
data input or output 15; B side
data input or output 14; B side
positive supply voltage
2B6
VCC
2B5
data input or output 13; B side
data input or output 12; B side
data input or output 11; B side
ground (0V)
2B4
2B3
GND
2B2
data input or output 10; B side
data input or output 9; B side
data input or output 8; B side
data input or output 7; B side
data input or output 6; B side
data input or output 5; B side
ground (0V)
2B1
2B0
1B7
1B6
1B5
GND
1B4
data input or output 4; B side
data input or output 3; B side
data input or output 2; B side
1B3
1B2
9397 750 14326
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Product data sheet
Rev. 03 — 12 January 2005
6 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
Table 3:
Symbol
VCC
Pin description …continued
Pin
50
51
52
53
54
55
56
Description
positive supply voltage
1B1
data input or output 1; B side
data input or output 0; B side
ground (0V)
1B0
GND
1SBA
1CPBA
1OE
select inputs 0 to 7; B to A side
clock inputs 0 to 7; B to A side
output enable inputs 0 to 7
7. Functional description
7.1 Function table
Table 4:
Function table[1]
Operating mode
Inputs
Data I/O
reference
nOE nDIR nCPAB nCPBA nSAB nSBA nAx
nBx
Store A (B unspecified)
Store B (A unspecified)
X
X
↑
X
X
X
input
unspecified Figure 5c
output[2]
X
X
X
↑
X
X
unspecified input
output[2]
Figure 5c
Store A and B data
H
H
L
L
L
L
X
X
L
↑
H or L
X
↑
H or L
X
X
X
X
X
L
X
X
L
input
input
output
output
input
input
input
input
input
input
output
output
Figure 5c
-
Isolation, hold storage
Real time B data to A bus
Stored B data to A bus
Real time A data to B bus
Stored A data to B bus
Figure 5a
Figure 5d
Figure 5b
Figure 5d
L
X
H or L
X
H
X
X
H
H
X
H or L
X
H
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
↑ = LOW-to-HIGH clock transition.
[2] The data output function may be enabled or disabled by various signals at the nOE input. Data input functions are always enabled, i.e.
data at the bus pins will be stored on every LOW-to-HIGH transition of the clock.
9397 750 14326
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Product data sheet
Rev. 03 — 12 January 2005
7 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
A
B
A
B
nOE
L
nDIR nCPAB nCPBA nSAB nSBA
nOE
L
nDIR nCPAB nCPBA nSAB nSBA
L
X
X
X
L
H
X
X
L
X
001aac210
001aac211
a. Real time bus transfer bus B to bus A
b. Real time bus transfer bus A to bus B
A
B
A
B
nOE
L
L
nDIR nCPAB nCPBA nSAB nSBA
H
L
X
X
X
X
X
X
X
nOE
L
L
nDIR nCPAB nCPBA nSAB nSBA
X
L
X
H/L
X
X
H
H
X
H
X
H
H/L
001aac212
001aac213
c. Storage from bus A, bus B or bus A and bus B
d. Transfer stored data to bus A or bus B
Fig 5. Examples of bus-management functions
9397 750 14326
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Product data sheet
Rev. 03 — 12 January 2005
8 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
8. Limiting values
Table 5:
Symbol
VCC
Limiting values
Parameter
Conditions
Min
Max
Unit
V
supply voltage
input voltage
output voltage
−0.5 +4.6
−0.5 +7.0
−0.5 +7.0
[1]
[1]
VI
V
VO
output in off-state or
HIGH state
V
IIK
IOK
IO
input diode current
output diode current
output source current
VI < 0 V
−50
−50
-
-
mA
mA
mA
mA
°C
VO < 0 V
-
output in LOW state
output in HIGH state
128
-
−64
−65
-
Tstg
Tj
storage temperature
junction temperature
+150
150
[2]
°C
[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings
are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal
environment can create junction temperatures which are detrimental to reliability.
9. Recommended operating conditions
Table 6:
Recommended operating conditions
Symbol Parameter
Conditions
Min
Typ
Max Unit
VCC
VI
supply voltage
2.7
-
-
-
-
-
-
-
3.6
5.5
-
V
input voltage
0
V
VIH
VIL
IOH
IOL
HIGH-level input voltage
LOW-level input voltage
HIGH-level output current
LOW-level output current
2.0
V
-
-
-
-
0.8
−32
32
64
V
mA
mA
mA
none
duty cycle ≤ 50 %;
f ≥ 1 kHz
∆t/∆V
input transition rise or fall
rate
outputs enabled
-
-
-
10
ns/V
Tamb
ambient temperature
−40
+85
°C
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
9 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
10. Static characteristics
Table 7:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +85 °C[1]
VIK
input clamp voltage
VCC = 2.7 V; IIK = −18 mA
-
−0.85
−1.2
V
V
VOH
HIGH-level output
voltage
VCC = 2.7 V to 3.6 V;
V
CC − 0.2 VCC
-
IOH = 100 µA
VCC = 2.7 V; IOH = −8 mA
VCC = 3.0 V; IOH = −32 mA
VCC = 2.7 V
2.4
2.0
2.5
2.3
-
-
V
V
VOL
LOW-level output
voltage
IOL = 100 µA
-
-
0.07
0.03
0.2
0.5
V
V
IOL = 24 mA
VCC = 3.0 V
IOL = 16 mA
-
-
-
-
0.25
0.3
0.4
-
0.4
V
V
V
V
IOL = 32 mA
0.5
IOL = 64 mA
0.55
0.55
[2]
VRST
ILI
power-up LOW output VCC = 3.6 V; IO = 1 mA;
voltage VI = GND or VCC
input leakage current VCC = 3.6 V; VI = VCC or GND
-
-
-
-
-
-
0.1
0.1
0.1
0.5
+0.1
0.1
±1
µA
µA
µA
µA
µA
µA
of control pins
VCC = 0 V or 3.6 V; VI = 5.5 V
10
[3]
[3]
[3]
input leakage current VCC = 3.6 V; VI = 5.5 V
20
of I/O data pins
VCC = 3.6 V; VI = VCC
10
VCC = 3.6 V; VI = 0 V
−5
IOFF
output off current
VCC = 0 V;
±100
VI or VO = 0 V to 4.5 V
[4]
[4]
[4]
IHOLD
bus hold current A or VCC = 3 V; VI = 0.8 V
75
130
−140
-
-
µA
µA
µA
µA
B outputs
VCC = 3 V; VI = 2.0 V
−75
±500
-
-
VCC = 0 V to 3.6 V; VI = 3.6 V
-
IEX
current into an output VO = 5.5 V; VCC = 3.0 V
in HIGH state when
50
125
VO > VCC
[5]
I
PU, IPD
power-up and
VCC ≤ 1.2 V; VO = 0.5 V to VCC
;
-
35
±100
µA
power-down 3-state
output current
VI = GND or VCC; pin nDIR and
nOE are don‘t care
ICC
quiescent supply
current
VCC = 3.6 V; IO = 0 A;
VI = GND or VCC
outputs HIGH
outputs LOW
outputs disabled
-
-
-
0.07
4.9
0.12
6
mA
mA
mA
[6]
0.07
0.12
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
10 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
Table 7:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
[7]
∆ICC
additional supply
VCC = 3 V to 3.6 V; one input at
-
0.1
0.2
mA
current per input pin
VCC − 0.6 V, other inputs at VCC
or GND
CI
input capacitance
I/O pin capacitance
VI = 0 V or 3.0 V
-
-
3
9
-
-
pF
pF
CI/O
VI/O = 0 V or 3.0 V; outputs
disabled
[1] All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
[2] For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
[3] Unused pins at VCC or GND.
[4] This is the bus hold overdrive current required to force the input to the opposite logic state.
[5] This parameter is valid for VCC = 0 V to 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to 3.3 V ± 0.3 V. A transition time
of 100 µs is permitted. This parameter is valid for Tamb = 25 °C only.
[6] ICC is measured with outputs pulled to VCC or GND.
[7] This is the increase in supply current for each input at the specified voltage level other than VCC or GND.
11. Dynamic characteristics
Table 8:
Dynamic characteristics
GND = 0 V; tr = tf = 2.5 ns; CL = 50 pF; RL = 500 Ω; for input definitions see Figure 13; for test circuit see Figure 14.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +85 °C[1]
fmax
tPLH
maximum clock frequency VCC = 3.3 V ± 0.3 V; see
150
-
-
MHz
Figure 6
propagation delay nAx to see Figure 8
nBx or nBx to nAx
VCC = 3.3 V ± 0.3 V
0.5
-
1.9
-
3.7
4.3
ns
ns
VCC = 2.7 V
propagation delay nCPAB see Figure 6
to nBx or nCPBA to nAx
VCC = 3.3 V ± 0.3 V
1.5
-
2.7
-
4.5
5.3
ns
ns
VCC = 2.7 V
propagation delay nSAB see Figure 7
to nBx or nSBA to nAx
VCC = 3.3 V ± 0.3 V
1.0
-
2.5
-
4.6
5.4
ns
ns
VCC = 2.7 V
tPHL
propagation delay nAx to see Figure 8
nBx or nBx to nAx
VCC = 3.3 V ± 0.3 V
0.5
-
1.9
-
3.7
4.4
ns
ns
VCC = 2.7 V
propagation delay nCPAB see Figure 6
to nBx or nCPBA to nAx
VCC = 3.3 V ± 0.3 V
1.5
-
2.4
-
4.5
5.2
ns
ns
VCC = 2.7 V
propagation delay nSAB see Figure 7
to nBx or nSBA to nAx
VCC = 3.3 V ± 0.3 V
1.0
-
2.8
-
4.8
5.6
ns
ns
VCC = 2.7 V
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
11 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
Table 8:
Dynamic characteristics …continued
GND = 0 V; tr = tf = 2.5 ns; CL = 50 pF; RL = 500 Ω; for input definitions see Figure 13; for test circuit see Figure 14.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tPZH
output enable time nOE to see Figure 11
nAx or nBx
VCC = 3.3 V ± 0.3 V
1.0
-
2.7
-
4.7
5.4
ns
ns
VCC = 2.7 V
output enable time nDIR see Figure 11
to nAx or nBx
VCC = 3.3 V ± 0.3 V
1.0
-
2.9
-
4.8
5.4
ns
ns
VCC = 2.7 V
tPZL
tPHZ
tPLZ
output enable time nOE to see Figure 12
nAx or nBx
VCC = 3.3 V ± 0.3 V
1.0
-
2.5
-
4.9
5.7
ns
ns
VCC = 2.7 V
output enable time nDIR see Figure 12
to nAx or nBx
VCC = 3.3 V ± 0.3 V
1.0
-
2.8
-
4.9
5.6
ns
ns
VCC = 2.7 V
see Figure 11
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
output disable time nOE
to nAx or nBx
1.5
-
3.2
-
5.2
5.5
ns
ns
output disable time nDIR see Figure 11
to nAx or nBx
VCC = 3.3 V ± 0.3 V
1.0
-
3.1
-
5.7
6.6
ns
ns
VCC = 2.7 V
see Figure 12
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
output disable time nOE
to nAx or nBx
1.5
-
2.9
-
4.6
4.7
ns
ns
output disable time nDIR see Figure 12
to nAx or nBx
VCC = 3.3 V ± 0.3 V
1.0
-
2.9
-
5.2
5.7
ns
ns
VCC = 2.7 V
[1] All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
Table 9:
Dynamic characteristics setup requirements
GND = 0 V; tr = tf = 2.5 ns; CL = 50 pF; RL = 500 Ω.
Symbol Parameter Conditions
Tamb = −40 °C to +85 °C
Min
Typ
Max
Unit
tsu(H)
tsu(L)
th(H)
set-up time HIGH nAx to see Figure 10
nCPAB or nBx to nCPBA
VCC = 3.3 V ± 0.3 V
1.0
1.1
0.6
-
-
-
ns
ns
VCC = 2.7 V
see Figure 10
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
set-up time LOW nAx to
nCPAB or nBx to nCPBA
1.9
2.4
0.4
-
-
-
ns
ns
hold time HIGH nAx to
nCPAB or nBx to nCPBA
see Figure 10
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
1.0
1.0
0.4
-
-
-
ns
ns
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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
12 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
Table 9:
Dynamic characteristics setup requirements …continued
GND = 0 V; tr = tf = 2.5 ns; CL = 50 pF; RL = 500 Ω.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
th(L)
hold time LOW nAx to
nCPAB or nBx to nCPBA
see Figure 10
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
1.0
1.0
0.5
-
-
-
ns
ns
tW(H)
pulse width HIGH nCPAB see Figure 6
or nCPBA
VCC = 3.3 V ± 0.3 V
2.6
2.6
2.2
-
-
-
ns
ns
VCC = 2.7 V
tW(L)
pulse width HIGH nCPAB see Figure 6
or nCPBA
VCC = 3.3 V ± 0.3 V
2.8
2.8
2.4
-
-
-
ns
ns
VCC = 2.7 V
12. Waveforms
1/f
max
3.0 V or V
CC
whichever
is less
nCPBA or
nCPAB
V
V
V
M
M
M
0 V
t
t
W(L)
W(H)
t
PLH
t
PHL
V
V
OH
nAx or nBx
V
V
M
M
OL
001aac215
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 6. Propagation delay clock input to output, clock pulse width and maximum clock
frequency
3.0 V or V
0 V
CC
nSBA or nSAB
nAx or nBx
V
V
M
M
t
t
PHL
PLH
V
OH
V
V
M
M
V
OL
001aac216
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 7. Propagation delay nSAB to nBx or nSBA to nAx
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
13 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
3.0 V or V
0 V
CC
nAx or nBx
nBx or nAx
V
V
M
M
t
t
PHL
PLH
V
OH
V
V
M
M
V
OL
001aac343
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 8. Propagation delay nAx to nBx or nBx to nAx
3.0 V or V
0 V
CC
nSBA or nSAB
V
V
M
M
t
t
PHL
PLH
V
V
V
OH
nAx or nBx
V
M
M
OL
001aac217
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 9. Propagation delay nSBA to nAx or nSAB to nBx
3.0 V
or V
CC
nAx or nBx
V
t
V
V
t
V
M
M
M
M
0 V
t
t
su(H)
h(H)
su(L)
h(L)
3.0 V
or V
CC
nCPBA or
nCPAB
V
V
M
M
0 V
001aac218
VM = 1.5 V.
The shaded areas indicate when the input is permitted to change for predictable output
performance.
Fig 10. Data setup and hold times
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
14 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
3.0 V or V
whichever
is less
CC
nOE, nDIR
nDIR
V
t
V
M
M
0 V
t
PZH
PHZ
V
V
OH
− 0.3 V
0 V
OH
V
M
nAx or nBx
001aac219
VM = 1.5 V.
VOH is typical voltage output drop that occur with the output load.
Fig 11. 3-state output enable and disable time nOE, nDIR to nAx or nBx
3.0 V or V
nOE, nDIR
nDIR
CC
CC
V
V
M
M
0 V
t
t
PLZ
PZL
3.0 V or V
V
M
V
+ 0.3 V
OL
nAx or nBx
V
0 V
OL
001aac220
VM = 1.5 V.
VOL is typical voltage output drop that occur with the output load.
Fig 12. 3-state output enable and disable time nOE, nDIR to nAx or nBx
t
W
V
I
90 %
90 %
negative
pulse
V
V
M
M
10 %
0 V
t
(t )
f
t
(t )
TLH r
THL
t
(t )
t
(t )
THL f
TLH
r
V
I
90 %
positive
pulse
V
M
V
M
10 %
10 %
0 V
t
W
001aac221
VM = 1.5 V.
Fig 13. Input pulse definition
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
15 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
V
EXT
V
CC
R
L
V
I
V
O
PULSE
GENERATOR
D.U.T.
C
L
R
L
R
T
mna616
Test data is given in Table 10.
RL = Load resistor; see Section 11 for value.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 14. Load circuitry for switching times
Table 10: Test data
VI
Repetition tW
tr
tf
CL
RL
VEXT
rate
tPHZ, tPZH tPLZ, tPZL tPLH, tPHL
2.7 V
≤ 10 MHz
500 ns
≤ 2.5 ns
≤ 2.5 ns
50 pF
500 Ω
GND
6 V
open
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
16 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
13. Package outline
SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm
SOT371-1
D
E
A
X
c
y
H
v
M
A
E
Z
29
56
Q
A
2
A
A
(A )
3
1
θ
pin 1 index
L
p
L
28
1
detail X
w M
b
p
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
max.
8o
0o
0.4
0.2
2.35
2.20
0.3
0.2
0.22 18.55
0.13 18.30
7.6
7.4
10.4
10.1
1.0
0.6
1.2
1.0
0.85
0.40
mm
2.8
0.25
0.635
1.4
0.25
0.18
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT371-1
MO-118
Fig 15. Package outline SOT371-1 (SSOP56)
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
17 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm
SOT364-1
E
D
A
X
c
H
v
M
A
y
E
Z
56
29
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
detail X
1
28
w
M
b
e
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions).
A
(1)
(2)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.15
0.05
1.05
0.85
0.28
0.17
0.2
0.1
14.1
13.9
6.2
6.0
8.3
7.9
0.8
0.4
0.50
0.35
0.5
0.1
mm
1.2
0.5
1
0.25
0.25
0.08
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT364-1
MO-153
Fig 16. Package outline SOT364-1 (TSSOP56)
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
18 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
14. Revision history
Table 11: Revision history
Document ID
74LVT16646A_3
Modifications:
Release date Data sheet status
20050112 Product data sheet
Change notice Doc. number
Supersedes
-
9397 750 14326 74LVT16646A_2
• The format of this data sheet is redesigned to comply with the current presentation and
information standard of Philips Semiconductors.
• Data sheet title changed from “3.3 V ABT 16-bit bus transceiver (3-state)” to “3.3 V 16-bit bus
transceiver; 3-state”
• Table 8: updated parameter descriptions and values.
74LVT16646A_2
74LVT16646A_1
19980219
Product specification
-
9397 750 03559 74LVT16646A_1
19940725
-
-
-
-
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
19 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
15. Data sheet status
Level Data sheet status[1] Product status[2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
16. Definitions
17. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
18. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 14326
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
20 of 21
74LVT16646A
Philips Semiconductors
3.3 V 16-bit bus transceiver; 3-state
19. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 5
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7
7.1
8
Functional description . . . . . . . . . . . . . . . . . . . 7
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
Recommended operating conditions. . . . . . . . 9
Static characteristics. . . . . . . . . . . . . . . . . . . . 10
Dynamic characteristics . . . . . . . . . . . . . . . . . 11
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 19
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 20
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Contact information . . . . . . . . . . . . . . . . . . . . 20
9
10
11
12
13
14
15
16
17
18
© Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 12 January 2005
Document number: 9397 750 14326
Published in The Netherlands
相关型号：
74LVT16652ADGG-T
IC LVT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, 6.10 MM, PLASTIC, MO-153, SOT-364-1, TSSOP-56, Bus Driver/Transceiver
NXP
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