74LVT273PW [NXP]
3.3V Octal D flip-flop; 3.3V八路D触发器
| 型号： | 74LVT273PW |
| 厂家： | 
NXP |
| 描述： | 3.3V Octal D flip-flop |
| 文件： | 总11页 (文件大小：97K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74LVT273
3.3V Octal D flip-flop
Product specification
1998 Feb 19
Supersedes data of 1994 May 11
IC23 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
FEATURES
DESCRIPTION
The LVT273 is a high-performance BiCMOS product designed for
operation at 3.3V.
• Eight edge-triggered D-type flip-flops
• Buffered common clock
V
CC
This device has eight edge-triggered D-type flip-flops with individual
D inputs and Q outputs. The common buffered Clock (CP) and
Master Reset (MR) inputs load and reset (clear) all flip-flops
simultaneously.
• Buffered asynchronous Master Reset
• Output capability: +64mA/–32mA
• TTL input and output switching levels
• Input and output interface capability to systems at 5V supply
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
• Bus-hold data inputs eliminate the need for external pull-up
All outputs will be forced Low independent of Clock or Data inputs
by a Low voltage level on the MR input. The device is useful for
applications where the true output only is required and the CP and
MR are common elements.
resistors to hold unused inputs
• Power-up reset
• Live insertion/extraction permitted
• No bus current loading when output is tied to 5V bus
• Latchup protection exceeds 500 mA per JEDEC Std 17
• ESD protection exceeds 2000V per Mil Std 883 Method 3015 and
200V per Machine Model.
QUICK REFERENCE DATA
CONDITIONS
= 25°C; GND = 0V
SYMBOL
PARAMETER
TYPICAL
UNIT
T
amb
t
t
Propagation delay
CP to Qn
3.5
3.5
PLH
PHL
C = 50pF; V = 3.3V
ns
L
CC
C
Input capacitance
V = 0V or 3.0V
I
4
pF
IN
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
SOT163-1
20-Pin Plastic SOL
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74LVT273 D
74LVT273 DB
74LVT273 PW
74LVT273 D
74LVT273 DB
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
SOT339-1
74LVT273PW DH
SOT360-1
PIN CONFIGURATION
LOGIC SYMBOL
20
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
V
CC
3
4
7
8 13 14 17 18
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
D0 D1 D2 D3 D4 D5 D6 D7
CP
MR
11
1
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
2
5
6
9
12 15 16 19
SV00018
GND 10
11
CP
SV00017
2
1998 Feb 19
853-1740 18985
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
LOGIC SYMBOL (IEEE/IEC)
FUNCTION TABLE
INPUTS
OUTPUTS
Q0 – Q7
1
OPERATING
MODE
R
MR
CP
D
n
11
C1
L
H
H
H
X
↑
X
L
H
L
Reset (clear)
Load “1”
3
2
5
1D
h
l
4
7
↑
Load “0”
6
L
X
Q
Retain state
0
8
9
H
h
=
=
High voltage level
High voltage level one set-up time prior to the Low-to-High
13
14
17
18
12
15
16
19
clock transition
=
=
L
l
Low voltage level
Low voltage level one set-up time prior to the Low-to-High
clock transition
X
↑
=
=
Don’t care
Low-to-High clock transition
SV00019
Q = Output as it was
0
PIN DESCRIPTION
PIN NUMBER
SYMBOL
CP
NAME AND FUNCTION
11
Clock pulse input (active rising edge)
Data inputs
3, 4, 7, 8, 13, 14, 17, 18
D0 – D7
Q0 – Q7
MR
2, 5, 6, 9, 12, 15, 16, 19
Data outputs
1
Master Reset input (active-Low)
Ground (0V)
10
20
GND
V
CC
Positive supply voltage
LOGIC DIAGRAM
D0
D1
D2
D3
D4
13
D5
14
D6
17
D7
18
3
4
7
8
11
CP
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP
CP
CP
CP
CP
CP
CP
R
R
R
R
R
R
R
R
D
D
D
D
D
D
D
D
1
MR
2
5
6
Q2
9
12
Q4
15
Q5
16
Q6
19
Q7
Q0
Q1
Q3
SV00020
3
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
CONDITIONS
RATING
–0.5 to +4.6
–50
UNIT
V
V
CC
I
IK
DC supply voltage
DC input diode current
V < 0
I
mA
V
3
V
I
DC input voltage
–0.5 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
OUT
DC output voltage
output in Off or High state
Output in Low state
–0.5 to +7.0
128
I
DC output current
mA
OUT
Output in High State
–64
T
stg
Storage temperature range
–65 to 150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
2.7
0
MAX
3.6
V
CC
DC supply voltage
V
V
V
I
Input voltage
5.5
V
High-level input voltage
Low-level Input voltage
High-level output current
Low-level output current
2.0
V
IH
V
0.8
–32
64
V
IL
I
mA
mA
ns/V
°C
OH
I
OL
∆t/∆v
Input transition rise or fall rate; Outputs enabled
Operating free-air temperature range
10
T
amb
–40
+85
4
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
Input clamp voltage
TEST CONDITIONS
Temp = -40°C to +85°C
UNIT
V
1
MIN
TYP
MAX
V
IK
V
V
V
V
V
V
V
V
V
V
= 2.7V; I = –18mA
–0.9
–1.2
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
IK
= 2.7 to 3.6V; I = –100µA
V
-0.2
V
CC
–0.1
OH
CC
V
OH
High-level output voltage
= 2.7V; I = –8mA
2.4
2.5
V
OH
= 3.0V; I = –32mA
2.0
2.2
0.1
OH
= 2.7V; I = 100µA
0.2
0.5
OL
= 2.7V; I = 24mA
0.3
OL
V
OL
Low-level output voltage
= 3.0V; I = 16mA
0.25
0.3
0.4
V
OL
= 3.0V; I = 32mA
0.5
OL
= 3.0V; I = 64mA
0.4
0.55
0.55
OL
4
V
RST
Power-up output low voltage
Input leakage current
Output off current
= 3.6V; I = 1mA; V = GND or V
CC
0.13
V
O
I
V
CC
V
CC
V
CC
= 0 or 3.6V; V = 5.5V
1
10
±1
1
I
= 3.6V; V = V or GND
Control pins
±0.1
0.1
I
CC
CC
I
I
µA
= 3.6V; V = V
I
3
Data pins
V
= 3.6V; V = 0
–1
1
-5
CC
CC
I
I
V
= 0V; V or V = 0 to 4.5V
±100
µA
µA
OFF
I
O
V
CC
V
CC
V
CC
= 3V; V = 0.8V
75
150
I
5
= 3V; V = 2.0V
–75
–150
I
Bus Hold current A inputs
I
HOLD
= 0V to 3.6V; V = 3.6V
±500
CC
Current into an output in the
I
EX
V
O
= 5.5V; V = 3.0V
60
125
µA
CC
High state when V > V
O
CC
I
V
V
V
= 3.6V; Outputs High, V = GND or V I 0
CC, O =
0.13
3
0.19
12
CCH
CC
CC
CC
I
Quiescent supply current
I
= 3.6V; Outputs Low, V = GND or V I 0
CC, O =
mA
mA
CCL
I
Additional supply current per
= 3V to 3.6V; One input at V -0.6V,
CC
∆I
0.1
0.2
CC
2
input pin
Other inputs at V or GND
CC
NOTES:
1. All typical values are at V = 3.3V and T
= 25°C.
amb
CC
2. This is the increase in supply current for each input at the specified voltage level other than V or GND
CC
3. Unused pins at V or GND.
CC
4. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
5. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V; t = t = 2.5ns; C = 50pF, R = 500Ω; T = –40°C to +85°C.
amb
R
F
L
L
LIMITS
= 3.3V ±0.3V
SYMBOL
PARAMETER
WAVEFORM
V
CC
V
CC
= 2.7V
UNIT
1
MIN
TYP
MAX
MAX
f
Maximum clock frequency
1
1
150
MHz
ns
MAX
t
t
Propagation delay
CP to Qn
1.7
1.9
3.5
3.5
5.5
5.5
6.3
5.9
PLH
PHL
Propagation delay
MR to Qn
t
2
1.3
3.2
6.2
6.2
ns
PHL
NOTE:
1. All typical values are at V = 3.3V and T
= 25°C.
amb
CC
5
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
AC SETUP REQUIREMENTS
GND = 0V; t = t = 2.5ns; C = 50pF, R = 500Ω, T
= –40°C to +85°C.
R
F
L
L
amb
LIMITS
= +3.3 ± 0.3V
SYMBOL
PARAMETER
WAVEFORM
V
CC
V
CC
= 2.7V
UNIT
MIN
TYP
MIN
t (H)
t (L)
s
Setup time, High or Low
Dn to CP
2.3
2.3
1.0
1.0
2.7
2.7
s
3
3
ns
ns
t (H)
Hold time, High or Low
Dn to CP
0
0
–0.6
–0.6
0
0
h
t (L)
h
t (H)
t (L)
w
Clock pulse width
High or Low
3.3
3.3
1.5
1.5
3.3
3.3
w
1
2
2
ns
ns
ns
t (L)
w
Master Reset pulse width, Low
3.3
2.7
1.5
1.0
3.3
3.2
Recovery time
MR to CP
t
REC
AC WAVEFORMS
V
M
= 1.5V, V = GND to 2.7V
IN
2.7V
1/f
MAX
1.5V
t
Dn
CP
1.5V
1.5V
1.5V
1.5V
2.7V
0V
0V
CP
Qn
1.5V
t
1.5V
t (H)
t (L)
s
t
(H)
t (L)
h
s
h
(H)
(L)
w
2.7V
w
t
t
PLH
PHL
1.5V
1.5V
VOH
0V
1.5V
1.5V
V
OL
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SV00021
SV00108
Waveform 3. Data Setup and Hold Times
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
2.7V
MR
1.5V
1.5V
0V
t
(L)
t
REC
w
2.7V
CP
Qn
1.5V
0V
t
PHL
V
OH
1.5V
VOL
SV00107
Waveform 2. Master Reset Pulse Width, Master Reset to
Output Delay and Master Reset to Clock Recovery Time
6
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
TEST CIRCUIT AND WAVEFORMS
t
W
AMP (V)
90%
V
CC
90%
NEGATIVE
PULSE
V
V
M
M
10%
10%
90%
V
V
OUT
IN
0V
PULSE
GENERATOR
t
t
(t
(t
)
t
t
(t
)
R
D.U.T.
THL
F
TLH
)
(t
)
F
R
T
TLH
R
THL
R
C
L
L
AMP (V)
90%
M
POSITIVE
PULSE
V
V
M
Test Circuit for Outputs
10%
10%
t
W
0V
V
M
= 1.5V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
DEFINITIONS
R = Load resistor; see AC CHARACTERISTICS for value.
L
FAMILY
Amplitude
Rep. Rate
t
t
t
F
W
R
C = Load capacitance includes jig and probe capacitance;
L
74LVT
2.7V
≤10MHz
500ns ≤2.5ns ≤2.5ns
see AC CHARACTERISTICS for value.
R = Termination resistance should be equal to Z
T
of
OUT
pulse generators.
SV00022
7
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
8
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
9
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
10
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal D flip-flop
74LVT273
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-03534
Document order number:
Philips
Semiconductors
相关型号：
74LVT273PWDH-T
IC LVT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, FF/Latch
NXP
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