74VHC541BQ,115 [NXP]

74VHC(T)541 - Octal buffer_line driver; 3-state QFN 20-Pin;
74VHC541BQ,115
型号: 74VHC541BQ,115
厂家: NXP    NXP
描述:

74VHC(T)541 - Octal buffer_line driver; 3-state QFN 20-Pin

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74VHC541; 74VHCT541  
Octal buffer/line driver; 3-state  
Rev. 01 — 12 August 2009  
Product data sheet  
1. General description  
The 74VHC541; 74VHCT541 are high-speed Si-gate CMOS devices.  
The 74VHC541; 74VHCT541 are octal non-inverting buffer/line drivers with 3-state bus  
compatible outputs.  
The 3-state outputs are controlled by the output enable inputs OE0 and OE1.  
A HIGH on OEn causes the outputs to assume a high-impedance OFF-state.  
2. Features  
I Balanced propagation delays  
I All inputs have a Schmitt-trigger action  
I Inputs accepts voltages higher than VCC  
I The 74VHC541 operates with CMOS input level  
I The 74VHCT541 operates with TTL input level  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
N CDM JESD22-C101C exceeds 1000 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range  
40 °C to +125 °C  
Name  
Description  
Version  
74VHC541D  
SO20  
plastic small outline package; 20 leads;  
body width 7.5 mm  
SOT163-1  
74VHCT541D  
74VHC541PW  
74VHCT541PW  
74VHC541BQ  
74VHCT541BQ  
40 °C to +125 °C  
40 °C to +125 °C  
TSSOP20  
plastic thin shrink small outline package; 20 leads; SOT360-1  
body width 4.4 mm  
DHVQFN20 plastic dual-in-line compatible thermal enhanced  
very thin quad flat package; no leads; 20 terminals;  
body 2.5 × 4.5 × 0.85 mm  
SOT764-1  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
4. Functional diagram  
Y0  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
18  
17  
16  
2
3
4
15  
14  
13  
5
6
7
1
&
EN  
19  
18  
2
17  
16  
15  
14  
13  
12  
11  
3
4
5
6
7
8
9
12  
11  
8
9
A7  
OE0  
OE1  
1
19  
mna179  
mna180  
Fig 1. Logic symbol  
Fig 2. IEC logic symbol  
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
2 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
5. Pinning information  
5.1 Pinning  
74VHC541  
74VHCT541  
terminal 1  
index area  
74VHC541  
74VHCT541  
2
3
4
5
6
7
8
9
19  
18  
17  
16  
15  
14  
13  
12  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
OE1  
Y0  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE0  
A0  
V
CC  
OE1  
Y0  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
3
A1  
4
A2  
5
A3  
6
A4  
(1)  
GND  
7
A5  
8
A6  
9
A7  
001aak047  
10  
GND  
Transparent top view  
001aak046  
(1) The die substrate is attached to this pad using  
conductive die attach material. It can not be used as a  
supply pin or input.  
Fig 3. Pin configuration SO20, TSSOP20  
Fig 4. Pin configuration DHVQFN20  
5.2 Pin description  
Table 2.  
Symbol  
OE0  
Pin description  
Pin  
Description  
1
output enable input (active LOW)  
data input  
A[0:7]  
GND  
2, 3, 4, 5, 6, 7, 8, 9  
10  
ground (0 V)  
Y[0:7]  
OE1  
18, 17, 16, 15, 14, 13, 12, 11 data output  
19  
20  
output enable input (active LOW)  
supply voltage  
VCC  
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
3 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
6. Functional description  
Table 3.  
Functional table[1]  
Control  
Input  
An  
L
Output  
OE0  
L
OE1  
Yn  
L
L
L
L
H
H
Z
X
H
X
X
H
X
Z
[1] H = HIGH voltage level;  
L = LOW voltage level;  
X = don’t care;  
Z = high-impedance OFF-state.  
7. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC  
VI  
Parameter  
Conditions  
Min  
0.5  
0.5  
20  
-
Max  
+7.0  
+7.0  
-
Unit  
V
supply voltage  
input voltage  
V
[1]  
[1]  
IIK  
input clamping current  
output clamping current  
output current  
VI < 0.5 V  
mA  
mA  
mA  
mA  
mA  
°C  
IOK  
VO < 0.5 V or VO > VCC + 0.5 V  
VO = 0.5 V to (VCC + 0.5 V)  
±20  
±25  
75  
IO  
-
ICC  
supply current  
-
IGND  
Tstg  
Ptot  
ground current  
75  
65  
-
storage temperature  
total power dissipation  
SO20 package  
+150  
Tamb = 40 °C to +125 °C  
[2]  
[3]  
[4]  
-
-
-
500  
500  
500  
mW  
mW  
mW  
TSSOP20 package  
DHVQFN20 package  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] Ptot derates linearly with 8 mW/K above 70 °C.  
[3] Ptot derates linearly with 5.5 mW/K above 60 °C.  
[4] Ptot derates linearly with 4.5 mW/K above 60 °C.  
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
4 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
8. Recommended operating conditions  
Table 5.  
Recommended operating conditions  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
74VHC541  
74VHCT541  
Unit  
Min  
2.0  
0
Typ  
Max  
5.5  
Min  
4.5  
0
Typ  
Max  
5.5  
5.5  
VCC  
+125  
-
VCC  
VI  
supply voltage  
input voltage  
5.0  
5.0  
V
-
5.5  
-
V
VO  
output voltage  
ambient temperature  
0
-
VCC  
+125  
100  
20  
0
-
V
Tamb  
t/V  
40  
-
+25  
40  
-
+25  
°C  
ns/V  
ns/V  
input transition rise  
and fall rate  
VCC = 3.3 V ± 0.3 V  
VCC = 5.0 V ± 0.5 V  
-
-
-
-
-
-
20  
9. Static characteristics  
Table 6.  
Static characteristics  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 °C  
Min Typ Max  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min  
Max  
Min  
Max  
For type 74VHC541  
VIH  
HIGH-level  
input voltage  
VCC = 2.0 V  
1.5  
-
-
-
-
-
-
-
-
1.5  
-
-
1.5  
-
-
V
V
V
V
V
V
VCC = 3.0 V  
2.1  
2.1  
2.1  
VCC = 5.5 V  
3.85  
-
3.85  
-
3.85  
-
VIL  
LOW-level  
input voltage  
VCC = 2.0 V  
-
-
-
0.5  
0.9  
1.65  
-
-
-
0.5  
0.9  
1.65  
-
-
-
0.5  
0.9  
1.65  
VCC = 3.0 V  
VCC = 5.5 V  
VOH  
HIGH-level  
VI = VIH or VIL  
output voltage  
IO = 50 µA; VCC = 2.0 V  
IO = 50 µA; VCC = 3.0 V  
IO = 50 µA; VCC = 4.5 V  
IO = 4.0 mA; VCC = 3.0 V  
IO = 8.0 mA; VCC = 4.5 V  
VI = VIH or VIL  
1.9  
2.9  
2.0  
3.0  
4.5  
-
-
-
-
-
-
1.9  
2.9  
-
-
-
-
-
1.9  
2.9  
-
-
-
-
-
V
V
V
V
V
4.4  
4.4  
4.4  
2.58  
3.94  
2.48  
3.8  
2.40  
3.70  
-
VOL  
LOW-level  
output voltage  
IO = 50 µA; VCC = 2.0 V  
IO = 50 µA; VCC = 3.0 V  
IO = 50 µA; VCC = 4.5 V  
IO = 4.0 mA; VCC = 3.0 V  
IO = 8.0 mA; VCC = 4.5 V  
VI = VIH or VIL;  
-
-
-
-
-
-
0
0
0
-
0.1  
0.1  
-
-
-
-
-
-
0.1  
0.1  
-
-
-
-
-
-
0.1  
0.1  
V
V
0.1  
0.1  
0.1  
V
0.36  
0.36  
±0.25  
0.44  
0.44  
±2.5  
0.55  
0.55  
±10.0  
V
-
V
IOZ  
OFF-state  
-
µA  
output current VO = VCC or GND;  
CC = 5.5 V  
V
II  
input leakage VI = VCC or GND;  
current CC = 0 V to 5.5 V  
-
-
-
-
0.1  
4.0  
-
-
1.0  
40  
-
-
2.0  
80  
µA  
µA  
V
ICC  
supply current VI = VCC or GND; IO = 0 A;  
CC = 5.5 V  
V
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
5 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
Table 6.  
Static characteristics …continued  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 °C  
Min Typ Max  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min  
Max  
Min  
Max  
CI  
input  
capacitance  
-
3.0  
10  
-
10  
-
10  
pF  
pF  
CO  
output  
-
4.0  
-
-
-
-
-
capacitance  
For type 74VHCT541  
VIH  
HIGH-level  
input voltage  
VCC = 4.5 V to 5.5 V  
VCC = 4.5 V to 5.5 V  
2.0  
-
-
-
-
2.0  
-
-
2.0  
-
-
V
V
VIL  
LOW-level  
0.8  
0.8  
0.8  
input voltage  
VOH  
HIGH-level  
output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 50 µA  
4.4  
4.5  
-
-
-
4.4  
3.8  
-
-
4.4  
-
-
V
V
IO = 8.0 mA  
3.94  
3.70  
VOL  
LOW-level  
output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 50 µA  
-
-
-
0
-
0.1  
0.36  
±0.25  
-
-
-
0.1  
-
-
-
0.1  
0.55  
±10.0  
V
IO = 8.0 mA  
0.44  
±2.5  
V
IOZ  
OFF-state  
per input pin; VI = VIH or VIL;  
-
µA  
output current VCC = 5.5 V; IO = 0 A;  
VO = VCC or GND;  
other pins at VCC or GND  
II  
input leakage VI = VCC or GND;  
-
-
-
-
-
-
0.1  
4.0  
-
-
-
1.0  
40  
-
-
-
2.0  
80  
µA  
µA  
mA  
current  
supply current VI = VCC or GND; IO = 0 A;  
CC = 5.5 V  
per input pin;  
VCC = 0 V to 5.5 V  
ICC  
ICC  
V
additional  
1.35  
1.5  
1.5  
supply current VI = VCC 2.1 V; IO = 0 A;  
other pins at VCC or GND;  
V
CC = 4.5 V to 5.5 V  
CI  
input  
capacitance  
-
-
3
10  
-
-
-
10  
-
-
-
10  
-
pF  
pF  
CO  
output  
4.0  
capacitance  
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
6 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
10. Dynamic characteristics  
Table 7.  
Dynamic characteristics  
GND = 0 V. For test circuit see Figure 7.  
Symbol Parameter Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ[1] Max Min  
Max  
Min  
Max  
For type 74VHC541  
[2]  
[2]  
[2]  
[3]  
tpd  
propagation An to Yn; see Figure 5  
delay  
VCC = 3.0 V to 3.6 V  
CL = 15 pF  
CL = 50 pF  
-
-
5.0  
7.0  
1.0  
1.0  
8.5  
1.0  
1.0  
9.0  
ns  
ns  
7.0 10.5  
12.0  
13.5  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
3.5  
5.0  
5.0  
7.0  
1.0  
1.0  
6.0  
8.0  
1.0  
1.0  
6.5  
9.0  
ns  
ns  
CL = 50 pF  
ten  
enable time OEn to Yn; see Figure 6  
VCC = 3.0 V to 3.6 V  
CL = 15 pF  
-
-
5.5 10.5  
7.5 14.0  
1.0  
1.0  
11.0  
16.0  
1.0  
1.0  
13.5  
17.5  
ns  
ns  
CL = 50 pF  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
-
3.5  
5.0  
7.2  
9.2  
1.0  
1.0  
8.5  
1.0  
1.0  
9.0  
ns  
ns  
CL = 50 pF  
10.5  
11.5  
tdis  
disable time OEn to Yn; see Figure 6  
VCC = 3.0 V to 3.6 V  
CL = 15 pF  
-
-
6.0 11.0  
9.5 15.4  
1.0  
1.0  
12.0  
17.5  
1.0  
1.0  
14.0  
19.5  
ns  
ns  
CL = 50 pF  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
-
-
4.5  
6.5  
10  
7.5  
8.8  
-
1.0  
1.0  
-
8.0  
10.0  
-
1.0  
1.0  
-
9.5  
11.0  
-
ns  
ns  
pF  
CL = 50 pF  
CPD  
power  
dissipation  
capacitance  
CL = 50 pF; fi = 1 MHz;  
VI = GND to VCC  
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
7 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
Table 7.  
Dynamic characteristics …continued  
GND = 0 V. For test circuit see Figure 7.  
Symbol Parameter Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ[1] Max Min  
Max  
Min  
Max  
For type 74VHCT541  
[2]  
tpd  
propagation An to Yn; see Figure 5  
delay  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
CL = 50 pF  
-
-
3.5  
5.0  
5.5  
8.5  
1.0  
1.0  
6.5  
9.5  
1.0  
1.0  
7.0  
ns  
ns  
11.0  
ten  
enable time OEn to Yn; see Figure 6  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
-
4.0  
7.0  
1.0  
1.0  
8.0  
1.0  
1.0  
9.0  
ns  
ns  
CL = 50 pF  
5.5 10.0  
12.0  
12.5  
[2]  
[3]  
tdis  
disable time OEn to Yn; see Figure 6  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
-
-
5.0  
7.0 10.0  
12  
7.0  
1.0  
1.0  
-
8.0  
12.0  
-
1.0  
1.0  
-
9.0  
12.5  
-
ns  
ns  
pF  
CL = 50 pF  
CPD  
power  
per buffer;  
-
dissipation  
CL = 50 pF; f = 1 MHz;  
capacitance VI = GND to VCC  
[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).  
[2] tpd is the same as tPLH and tPHL  
ten is the same as tPZL and tPZH  
tdis is the same as tPLZ and tPHZ  
.
.
.
[3] CPD is used to determine the dynamic power dissipation PD (µW).  
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in Volts.  
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
8 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
11. Waveforms  
V
I
V
An input  
M
GND  
t
t
PLH  
PHL  
V
OH  
V
Yn output  
M
mna901  
V
OL  
Measurement points are given in Table 8.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Fig 5. Propagation delay input (An) to output (Yn)  
V
I
OEn input  
V
M
t
GND  
t
PLZ  
PZL  
V
CC  
output  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PZH  
PHZ  
V
OH  
V
Y
output  
V
HIGH-to-OFF  
OFF-to-HIGH  
M
GND  
outputs  
enabled  
outputs  
enabled  
outputs  
disabled  
mna902  
Measurement points are given in Table 8.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Fig 6. Enable and disable times  
Table 8.  
Type  
Measurement points  
Input  
VM  
Output  
VM  
VX  
VY  
74VHC541  
0.5VCC  
1.5 V  
0.5VCC  
0.5VCC  
VOL + 0.3 V  
VOL + 0.3 V  
V
OH 0.3 V  
OH 0.3 V  
74VHCT541  
V
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
9 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
V
CC  
CC  
V
V
O
I
R
L
S1  
G
open  
DUT  
R
T
C
L
001aad983  
Test data is given in Table 9.  
Definitions test circuit:  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator  
CL = Load capacitance including jig and probe capacitance  
RL = Load resistor  
S1 = Test selection switch  
Fig 7. Load circuitry for switching times  
Table 9.  
Type  
Test data  
Input  
Load  
S1 position  
tPHL, tPLH  
open  
VI  
tr, tf  
CL  
RL  
tPZH, tPHZ  
GND  
tPZL, tPLZ  
VCC  
74VHC541  
VCC  
3.0 V  
3.0 ns  
3.0 ns  
15 pF, 50 pF  
15 pF, 50 pF  
1 kΩ  
1 kΩ  
74VHCT541  
open  
GND  
VCC  
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
10 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
12. Package outline  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
D
E
A
X
c
y
H
E
v
M
A
Z
20  
11  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
10  
w
detail X  
e
M
b
p
0
5
10 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
max.  
(1)  
(1)  
(1)  
UNIT  
mm  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3  
0.1  
2.45  
2.25  
0.49  
0.36  
0.32  
0.23  
13.0  
12.6  
7.6  
7.4  
10.65  
10.00  
1.1  
0.4  
1.1  
1.0  
0.9  
0.4  
2.65  
0.1  
0.25  
0.01  
1.27  
0.05  
1.4  
0.25  
0.01  
0.25  
0.1  
8o  
0o  
0.012 0.096  
0.004 0.089  
0.019 0.013 0.51  
0.014 0.009 0.49  
0.30  
0.29  
0.419  
0.394  
0.043 0.043  
0.016 0.039  
0.035  
0.016  
inches  
0.055  
0.01 0.004  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT163-1  
075E04  
MS-013  
Fig 8. Package outline SOT163-1 (SO20)  
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
11 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm  
SOT360-1  
D
E
A
X
c
H
v
M
A
y
E
Z
11  
20  
Q
A
2
(A )  
3
A
A
1
pin 1 index  
θ
L
p
L
1
10  
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
6.6  
6.4  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.5  
0.2  
mm  
1.1  
0.65  
0.25  
1
0.2  
0.13  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT360-1  
MO-153  
Fig 9. Package outline SOT360-1 (TSSOP20)  
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
12 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;  
20 terminals; body 2.5 x 4.5 x 0.85 mm  
SOT764-1  
B
A
D
A
A
1
E
c
detail X  
terminal 1  
index area  
C
terminal 1  
index area  
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
9
L
1
10  
E
h
e
20  
11  
19  
12  
D
h
X
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
(1)  
(1)  
UNIT  
A
b
c
E
e
e
1
y
D
D
E
L
v
w
y
1
1
h
h
max.  
0.05 0.30  
0.00 0.18  
4.6  
4.4  
3.15  
2.85  
2.6  
2.4  
1.15  
0.85  
0.5  
0.3  
mm  
0.05  
0.1  
1
0.2  
0.5  
3.5  
0.1  
0.05  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-10-17  
03-01-27  
SOT764-1  
- - -  
MO-241  
- - -  
Fig 10. Package outline SOT764-1 (DHVQFN20)  
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
13 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
13. Abbreviations  
Table 10. Abbreviations  
Acronym  
CDM  
CMOS  
DUT  
Description  
Charged Device Model  
Complementary Metal Oxide Semiconductor  
Device Under Test  
ESD  
ElectroStatic Discharge  
Human Body Model  
HBM  
MM  
Machine Model  
TTL  
Transistor-Transistor Logic  
14. Revision history  
Table 11. Revision history  
Document ID  
Release date  
20090812  
Data sheet status  
Change notice  
Supersedes  
74VHC_VHCT541_1  
Product data sheet  
-
-
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
14 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
15. Legal information  
15.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
15.2 Definitions  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
15.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
15.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
16. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
74VHC_VHCT541_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 12 August 2009  
15 of 16  
74VHC541; 74VHCT541  
NXP Semiconductors  
Octal buffer/line driver; 3-state  
17. Contents  
1
2
3
4
General description . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 1  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
5
5.1  
5.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
6
Functional description . . . . . . . . . . . . . . . . . . . 4  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Recommended operating conditions. . . . . . . . 5  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14  
7
8
9
10  
11  
12  
13  
14  
15  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
15.1  
15.2  
15.3  
15.4  
16  
17  
Contact information. . . . . . . . . . . . . . . . . . . . . 15  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2009.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 12 August 2009  
Document identifier: 74VHC_VHCT541_1  
Octal buffer_line driver; 3-state from NXP Semiconductors  
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General description  
The 74VHC541; 74VHCT541 are high-speed Si-gate CMOS devices.  
The 74VHC541; 74VHCT541 are octal non-inverting buffer/line drivers with 3-state bus compatible outputs.  
The 3-state outputs are controlled by the output enable inputs OE0 and OE1.  
A HIGH on OEn causes the outputs to assume a high-impedance OFF-state.  
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Features and benefits  
Balanced propagation delays  
All inputs have a Schmitt-trigger action  
Inputs accepts voltages higher than VCC  
The 74VHC541 operates with CMOS input level  
The 74VHCT541 operates with TTL input level  
ESD protection:  
HBM JESD22-A114E exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101C exceeds 1000 V  
Multiple package options  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
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Type number  
Ordering code(12NC) Orderable part number Region Distributor  
In stock Order quantity Inventory date Buy online Samples  
74VHC541BQ  
9352 895 17115  
9352 895 22118  
9352 895 27118  
74VHC541BQ,115  
74VHC541D,118  
74VHC541PW,118  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
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74VHC541D  
74VHC541PW  
465  
465  
500  
500  
500  
500  
74VHCT541BQ 9352 895 18115  
74VHCT541D 9352 895 23118  
74VHCT541BQ,115  
74VHCT541D,118  
74VHCT541PW,118  
74VHCT541PW 9352 895 28118  
DIGI-KEY CORPORATION 4,840  
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500  
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Products/packages  
Type number  
Orderable part number  
Ordering code (12NC)  
Product status  
Package  
Packing  
Marking  
ECCN  
SOT764-1  
74VHC541BQ  
74VHC541BQ,115  
74VHC541D,118  
9352 895 17115  
Volume production  
Reel Pack, SMD, 7"  
Tape reel smd  
Standard Marking  
Standard Marking  
Standard Marking  
Standard Marking  
Standard Marking  
Standard Marking  
(DHVQFN20)  
SOT163-1  
74VHC541D  
9352 895 22118  
9352 895 27118  
9352 895 18115  
9352 895 23118  
9352 895 28118  
Volume production  
Volume production  
Volume production  
Volume production  
Volume production  
(SO20)  
SOT360-1  
74VHC541PW  
74VHCT541BQ  
74VHCT541D  
74VHCT541PW  
74VHC541PW,118  
74VHCT541BQ,115  
74VHCT541D,118  
74VHCT541PW,118  
Reel Pack, SMD, 13"  
Reel Pack, SMD, 7"  
Tape reel smd  
(TSSOP20)  
SOT764-1  
(DHVQFN20)  
SOT163-1  
(SO20)  
SOT360-1  
Reel Pack, SMD, 13"  
(TSSOP20)  
http://www.nxp.com/  
17-May-2011  
Octal buffer_line driver; 3-state from NXP Semiconductors  
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Type number  
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Chemical content  
RoHS  
Leadfree conversion date  
RHF IFR (FIT) MTBF (hours) MSL MSL LF  
74VHC541BQ  
74VHC541BQ,115  
74VHC541BQ  
Always Pb-free  
1
1
1
1
1
1
1
1
1
1
1
1
74VHC541D  
74VHC541D,118  
74VHC541PW,118  
74VHCT541BQ,115  
74VHCT541D,118  
74VHC541D  
Always Pb-free  
Always Pb-free  
Always Pb-free  
Always Pb-free  
Always Pb-free  
74VHC541PW  
74VHCT541BQ  
74VHCT541D  
74VHC541PW  
74VHCT541BQ  
74VHCT541D  
74VHCT541PW  
74VHCT541PW 74VHCT541PW,118  
Quality and reliability disclaimer  
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17-May-2011  

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