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933669070652 [NXP]

IC HC/UH SERIES, QUAD 1-BIT TRANSCEIVER, TRUE OUTPUT, PDIP14, PLASTIC, DIP-14, Bus Driver/Transceiver;
933669070652
型号： 933669070652
厂家： NXP    NXP
描述：

IC HC/UH SERIES, QUAD 1-BIT TRANSCEIVER, TRUE OUTPUT, PDIP14, PLASTIC, DIP-14, Bus Driver/Transceiver

光电二极管 输出元件
文件： 总8页 (文件大小：49K)
中文：  中文翻译
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INTEGRATED CIRCUITS  
DATA SHEET  
For a complete data sheet, please also download:  
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications  
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information  
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines  
74HC/HCT243  
Quad bus transceiver; 3-state  
December 1990  
Product specification  
File under Integrated Circuits, IC06  
Philips Semiconductors  
Product specification  
Quad bus transceiver; 3-state  
74HC/HCT243  
The 74HC/HCT243 are quad bus transceivers featuring  
non-inverting 3-state bus compatible outputs in both send  
and receive directions.  
They are designed for 4-line asynchronous 2-way data  
communications between data buses.  
FEATURES  
• Non-inverting 3-state outputs  
• 2-way asynchronous data bus communication  
• Output capability: bus driver  
• ICC category: MSI  
The output enable inputs (OEA and OEB) can be used to  
isolate the buses.  
GENERAL DESCRIPTION  
The “243” is similar to the “242” but has non-inverting (true)  
outputs.  
The 74HC/HCT243 are high-speed Si-gate CMOS devices  
and are pin compatible with low power Schottky TTL  
(LSTTL). They are specified in compliance with JEDEC  
standard no. 7A.  
QUICK REFERENCE DATA  
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns  
TYPICAL  
SYMBOL  
PARAMETER  
CONDITIONS  
UNIT  
HC  
HCT  
tPHL/ tPLH  
propagation delay  
An to Bn;  
CL = 15 pF; VCC = 5 V  
6
11  
ns  
Bn to An  
CI  
input capacitance  
3.5  
10  
26  
3.5  
10  
34  
pF  
pF  
pF  
CI/O  
CPD  
input/output capacitance  
power dissipation capacitance per transceiver notes 1 and 2  
Notes  
1. CPD is used to determine the dynamic power dissipation (PD in µW):  
2
PD = CPD × VCC2 × fi + ∑ (CL × VCC × fo) where:  
fi = input frequency in MHz  
fo = output frequency in MHz  
∑ (CL × VCC2 × fo) = sum of outputs  
CL = output load capacitance in pF  
VCC = supply voltage in V  
2. For HC the condition is VI = GND to VCC  
For HCT the condition is VI = GND to VCC − 1.5 V  
ORDERING INFORMATION  
See “74HC/HCT/HCU/HCMOS Logic Package Information”.  
December 1990  
2
Philips Semiconductors  
Product specification  
Quad bus transceiver; 3-state  
74HC/HCT243  
PIN DESCRIPTION  
PIN NO.  
SYMBOL  
NAME AND FUNCTION  
1
OEA  
output enable input (active LOW)  
not corrected  
2, 12  
n.c.  
3, 4, 5, 6  
A0 to A3  
GND  
B0 to B3  
OEB  
data inputs/outputs  
ground (0 V)  
7
11, 10, 9, 8  
data inputs/outputs  
output enable input  
positive supply voltage  
13  
14  
VCC  
Fig.1 Pin configuration.  
Fig.2 Logic symbol.  
Fig.3 IEC logic symbol.  
December 1990  
3
Philips Semiconductors  
Product specification  
Quad bus transceiver; 3-state  
74HC/HCT243  
FUNCTION TABLE  
INPUTS  
INPUTS/OUTPUTS  
Bn  
OEA  
OEB  
An  
L
H
L
L
L
H
H
inputs  
Z
Z
B = A  
Z
Z
H
A = B  
inputs  
Notes  
1. H = HIGH voltage level  
L = LOW voltage level  
Z = high impedance OFF-state  
Fig.4 Functional diagram.  
December 1990  
4
Philips Semiconductors  
Product specification  
Quad bus transceiver; 3-state  
74HC/HCT243  
DC CHARACTERISTICS FOR 74HC  
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.  
Output capability: bus driver  
ICC category: MSI  
AC CHARACTERISTICS FOR 74HC  
GND = 0 V; tr = tf = 6 ns; CL = 50 pF  
Tamb (°C)  
TEST CONDITIONS  
74HC  
SYMBOL PARAMETER  
UNIT  
WAVEFORMS  
VCC  
(V)  
+25  
−40 to +85 −40 to +125  
min. typ. max. min. max. min. max.  
tPHL/ tPLH propagation delay  
22  
8
6
90  
18  
15  
115  
23  
20  
135  
27  
23  
ns  
ns  
ns  
ns  
2.0 Fig.5  
4.5  
6.0  
An to Bn;  
Bn to An  
t
t
t
PZH/ tPZL 3-state output enable time  
OEA to An or Bn;  
50  
18  
14  
150  
30  
26  
190  
38  
33  
225  
45  
38  
2.0 Figs 6 and 7  
4.5  
6.0  
OEB to An or Bn  
PHZ/ tPLZ 3-state output disable time  
OEA to An or Bn;  
61  
22  
18  
165  
33  
28  
205  
41  
35  
250  
50  
43  
2.0 Figs 6 and 7  
4.5  
6.0  
OEB to An or Bn  
THL/ tTLH output transition time  
14  
5
4
60  
12  
10  
75  
15  
13  
90  
18  
15  
2.0 Fig.5  
4.5  
6.0  
December 1990  
5
Philips Semiconductors  
Product specification  
Quad bus transceiver; 3-state  
74HC/HCT243  
DC CHARACTERISTICS FOR 74HCT  
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.  
Output capability: bus driver  
ICC category: MSI  
Note to HCT types  
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.  
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.  
INPUT  
UNIT LOAD COEFFICIENT  
An  
Bn  
OEA  
OEB  
1.10  
1.10  
1.00  
1.00  
AC CHARACTERISTICS FOR 74HCT  
GND = 0 V; tr = tf = 6 ns; CL = 50 pF  
Tamb (°C)  
TEST CONDITIONS  
74HCT  
SYMBOL PARAMETER  
UNIT  
WAVEFORMS  
VCC  
(V)  
+25  
−40 to +85 −40 to +125  
min. typ. max. min. max. min. max.  
tPHL/ tPLH propagation delay  
An to Bn;  
13 22  
18 34  
23 35  
28  
43  
44  
15  
33  
51  
53  
18  
ns  
ns  
ns  
ns  
4.5 Fig.5  
Bn to An  
t
t
t
PZH/ tPZL 3-state output enable time  
OEA to An or Bn;  
4.5 Figs 6 and 7  
4.5 Figs 6 and 7  
4.5 Fig.5  
OEB to An or Bn  
PHZ/ tPLZ 3-state output disable time  
OEA to An or Bn;  
OEB to An or Bn  
THL/ tTLH output transition time  
5
12  
December 1990  
6
Philips Semiconductors  
Product specification  
Quad bus transceiver; 3-state  
74HC/HCT243  
AC WAVEFORMS  
(1) HC : VM = 50%; VI = GND to VCC  
.
HCT: VM = 1.3 V; VI = GND to 3 V.  
Fig.5 Waveforms showing the input (An, Bn) to output (Bn, An) propagation delays and the output transition  
times.  
(1) HC : VM = 50%; VI = GND to VCC  
.
HCT: VM = 1.3 V; VI = GND to 3 V.  
Fig.6 Waveforms showing the 3-state enable and disable times for input OEB.  
(1) HC : VM = 50%; VI = GND to VCC  
.
HCT: VM = 1.3 V; VI = GND to 3 V.  
Fig.7 Waveforms showing the 3-state enable and disable times for input OEA.  
December 1990  
7
Philips Semiconductors  
Product specification  
Quad bus transceiver; 3-state  
74HC/HCT243  
PACKAGE OUTLINES  
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.  
December 1990  
8

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