933715360653 [NXP]
IC HCT SERIES, SEVEN SEGMENT DECODER/DRIVER, TRUE OUTPUT, PDSO16, SOT-109, SO-16, Decoder/Driver;
| 型号： | 933715360653 |
| 厂家： | 
NXP |
| 描述： | IC HCT SERIES, SEVEN SEGMENT DECODER/DRIVER, TRUE OUTPUT, PDSO16, SOT-109, SO-16, Decoder/Driver 驱动 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总15页 (文件大小：151K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4511
BCD to 7-segment
latch/decoder/driver
December 1990
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
74HC/HCT4511
ripple blanking input (BI), an active LOW lamp test input
(LT), and seven active HIGH segment outputs (Qa to Qg).
FEATURES
• Latch storage of BCD inputs
• Blanking input
When LE is LOW, the state of the segment outputs (Qa to
Qg) is determined by the data on D1 to D4.
When LE goes HIGH, the last data present on D1 to D4 are
stored in the latches and the segment outputs remain
stable.
When LT is LOW, all the segment outputs are HIGH
independent of all other input conditions. With LT HIGH, a
LOW on BI forces all segment outputs LOW. The inputs LT
and BI do not affect the latch circuit.
• Lamp test input
• Driving common cathode LED displays
• Guaranteed 10 mA drive capability per output
• Output capability: non-standard
• ICC category: MSI
GENERAL DESCRIPTION
APPLICATIONS
The 74HC/HCT4511 are high-speed Si-gate CMOS
devices and are pin compatible with “4511” of the “4000B”
series. They are specified in compliance with JEDEC
standard no. 7A.
• Driving LED displays
• Driving incandescent displays
• Driving fluorescent displays
• Driving LCD displays
The 74HC/HCT4511 are BCD to 7-segment
latch/decoder/drivers with four address inputs (D1 to D4),
an active LOW latch enable input (LE), an active LOW
• Driving gas discharge displays
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
HC
HCT
tPHL/ tPLH
propagation delay
Dn to Qn
CL = 15 pF; VCC = 5 V
24
23
19
12
3.5
64
24
24
20
13
ns
ns
ns
ns
LE to Qn
BI to Qn
LT to Qn
CI
input capacitance
3.5
64
pF
pF
CPD
power dissipation capacitance per latch notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
December 1990
2
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
74HC/HCT4511
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
3
LT
lamp test input (active LOW)
ripple blanking input (active LOW)
latch enable input (active LOW)
BCD address inputs
4
BI
5
LE
7, 1, 2, 6
D1 to D4
GND
Qa to Qg
VCC
8
ground (0 V)
13, 12, 11, 10, 9, 15, 14
16
segments outputs
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
74HC/HCT4511
Fig.4 Functional diagram.
FUNCTION TABLE
INPUTS
OUTPUTS
DISPLAY
Qg
LE
X
BI
X
LT
L
D4
X
D3
D2
X
D1
X
Qa
H
Qb
H
Qc
H
Qd
H
Qe
Qf
H
L
X
X
H
L
H
L
8
X
L
H
X
X
X
L
L
L
L
blank
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
H
L
H
H
H
H
H
H
H
H
L
H
L
H
H
H
L
H
L
H
L
L
L
L
L
H
H
0
1
2
3
H
H
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
L
L
H
H
L
H
L
L
H
L
H
L
L
H
H
H
H
L
L
L
H
L
H
H
H
L
H
H
H
L
4
5
6
7
H
H
L
H
H
H
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
H
H
L
H
L
H
H
L
H
H
L
H
H
L
H
L
L
L
H
L
L
L
H
H
L
H
H
L
8
9
blank
blank
H
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
H
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
blank
blank
blank
blank
(1)
H
(1)
H
H
H
X
X
X
X
Note
1. Depends upon the BCD-code applied during the LOW-to-HIGH transition of LE.
H = HIGH voltage level
L = LOW voltage level
X = don’t care
December 1990
4
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
74HC/HCT4511
Fig.5 Logic diagram.
Fig.6 Segment designation.
Fig.7 Display.
5
December 1990
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
74HC/HCT4511
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard, excepting VOH which is given below
ICC category: MSI
Non-standard DC characteristics for 74HC
Voltages are referenced to GND (ground = 0 V)
Tamb (°C)
TEST
CONDITIONS
74HC
SYMBOL
PARAMETER
UNIT
VCC
(V)
VI
−IO
(mA)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
VOH
VOH
HIGH level output voltage 3.98
3.60
3.84
3.35
3.70
3.10
V
4.5
6.0
VIH or 7.5
VIL 10.0
IH or 7.5
HIGH level output voltage 5.60
5.45
5.34
4.50
5.35
5.20
4.20
V
V
5.48
4.80
VIL
10.0
15.0
December 1990
6
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
74HC/HCT4511
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85
−40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
Dn to Qn
77
28
22
300
60
51
375
75
64
450
90
77
ns
ns
ns
ns
ns
ns
ns
ns
2.0
4.5
6.0
Fig.8
Fig.9
Fig.10
Fig.8
tPHL/ tPLH propagation delay
LE to Qn
74
27
22
270
54
46
330
68
58
405
81
69
2.0
4.5
6.0
t
PHL/ tPLH propagation delay
BI to Qn
61
22
18
220
44
37
275
55
47
330
66
56
2.0
4.5
6.0
tPHL/ tPLH propagation delay
LT to Qn
41
15
12
150
30
26
190
38
33
225
45
38
2.0
4.5
6.0
t
THL/ tTLH output transition time
19
7
6
75
15
13
95
19
16
110
22
19
2.0
4.5
6.0
Figs 8, 9 and
10
tW
tsu
th
latch enable pulse width 80
LOW
11
4
3
100
20
17
120
24
20
2.0
4.5
6.0
Fig.9
16
14
set-up time
Dn to LE
60
12
10
14
5
4
75
15
13
90
18
15
2.0
4.5
6.0
Fig.11
Fig.11
hold time
Dn to LE
0
0
0
−11
−4
−3
0
0
0
0
0
0
2.0
4.5
6.0
December 1990
7
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
74HC/HCT4511
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard, excepting VOH which is given below
ICC category: MSI
Non-standard DC characteristics for 74HCT
Voltages are referenced to GND (ground = 0 V)
Tamb (°C)
TEST
CONDITIONS
74HCT
SYMBOL
PARAMETER
UNIT
VCC
(V)
VI
−IO
(mA)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
VOH
HIGH level output voltage 3.98
3.60
3.84
3.35
3.70
3.10
V
4.5 VIH or 7.5
VIL 10.0
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
LT, LE
BI, Dn
1.50
0.30
December 1990
8
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
74HC/HCT4511
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85
−40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
Dn to Qn
28
27
23
16
7
60
54
44
30
15
75
68
55
38
19
90
81
66
45
22
ns
ns
ns
ns
ns
ns
4.5
4.5
4.5
4.5
4.5
4.5
Fig.8
Fig.9
Fig.10
Fig.8
t
PHL/ tPLH propagation delay
LE to Qn
t
PHL/ tPLH propagation delay
BI to Qn
tPHL/ tPLH propagation delay
LT to Qn
t
THL/ tTLH output transition time
Figs 8, 9 and
10
tW
latch enable pulse
width
16
5
20
24
Fig.9
LOW
tsu
th
set-up time
Dn to LE
12
0
5
15
0
18
0
ns
ns
4.5
4.5
Fig.11
Fig.11
hold time
Dn to LE
−4
December 1990
9
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
74HC/HCT4511
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC
.
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.9 Waveforms showing the input (LE) to output
(Qn) propagation delays and the latch
enable pulse width.
Fig.8 Waveforms showing the input (Dn, LT) to
output (Qn) propagation delays and the
output transition times.
The shaded areas indicate when the input is
permitted to change for predictable output
performance.
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.10 Waveforms showing the input (BI) to output
(Qn) propagation delays.
Fig.11 Waveforms showing the data set-up and
hold times for Dn input to LE input.
December 1990
10
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
74HC/HCT4511
APPLICATION DIAGRAMS
Fig.13 Connection to common anode LED display
readout.
Fig.12 Connection to common cathode LED
display readout.
(1) A filament pre-warm resistor to reduce
thermal shock and to increase effective cold
resistance of the filament is recommended.
Fig.14 Connection to incandescent display readout.
Fig.15 Connection to fluorescent display readout.
Fig.17 Connection to LCD display readout.
(Direct DC drive is not recommended as it
can shorten the life of LCD displays).
Fig.16 Connection to gas discharge display readout.
December 1990
11
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
74HC/HCT4511
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
12
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74HC/HCT4511;
BCD to 7-segment
latch/decoder/driver
download datasheet
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General description
The 74HC/HCT4511 are high-speed Si-gate CMOS devices and are pin compatible with '4511' of the '4000B' series.
They are specified in compliance with JEDEC standard no. 7A.
Catalog by
System
•
Cross-reference
Packages
•
•
The 74HC/HCT4511 are BCD to 7-segment latch/decoder/drivers with four address inputs (D to D ), an active
1
4
LOW latch enable input (LE), an active LOW ripple blanking input (BI), an active LOW lamp test input (LT), and
seven active HIGH segment outputs (Q to Q ).
End of Life
information
Distributors Go
Here!
a
g
•
•
When LE is LOW, the state of the segment outputs (Q to Q ) is determined by the data on D to D .
a
g
1
4
When LE goes HIGH, the last data present on D to D are stored in the latches and the segment outputs remain
1
4
Models
•
•
stable.
SoC solutions
When LT is LOW, all the segment outputs are HIGH independent of all other input conditions. With LT HIGH, a
LOW on BI forces all segment outputs LOW. The inputs LT and BI do not affect the latch circuit.
Features
●
●
●
●
●
●
●
Latch storage of BCD inputs
Blanking input
Lamp test input
Driving common cathode LED displays
Guaranteed 10 mA drive capability per output
Output capability: non-standard
I
category: MSI
CC
Applications
●
●
●
●
●
Driving LED displays
Driving incandescent displays
Driving fluorescent displays
Driving LCD displays
Driving gas discharge displays
Datasheet
Type number Title
Publication
release date
Datasheet status Page
File Datasheet
count size
(kB)
74HC/HCT4511 BCD to 7-segment
latch/decoder/driver
12/1/1990
Product
specification
12
76
Download
Additional datasheet info
To complete the device datasheet with package and family information, also download the following PDF files. The
"Logic Package Information" document is required to determine in which package(s) this device is available.
Document
Description
1
2
3
HCT_FAMILY_SPECIFICATIONS HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic
Family Specifications
HCT_PACKAGE_INFO
HC/T Package Info, The IC06 74HC/HCT/HCMOS Logic Package
Information
HCT_PACKAGE_OUTLINES
HC/T Package Outlines, The IC06 74HC/HCT/HCMOS Logic
Package Outlines
Parametrics
Type
number
Package Description
Propagation Voltage No. Power
Delay(ns) of Dissipation
Pins Considerations Levels
Low Power or
16 Battery
Logic
Switching Drive
Output
Capability
BCD to 7-Segment
Latch/Decoder/Driver 15
with Lamp Test Input
SOT109
(SO16)
5 Volts
+
74HC4511D
74HC4511N
CMOS
Low
Applications
SOT38-
1
(DIP16)
BCD to 7-Segment
Latch/Decoder/Driver 15
with Lamp Test Input
Low Power or
16 Battery
5 Volts
+
CMOS
Low
Low
Applications
BCD to 7-Segment
Low Power or
16 Battery
SOT109
(SO16)
Latch/Decoder/Driver
with Lamp Test
5 Volts
+
74HCT4511D
15
TTL
TTL
Applications
Input; TTL Enabled
BCD to 7-Segment
SOT38-
Low Power or
16 Battery
Applications
Latch/Decoder/Driver
15
5 Volts
+
74HCT4511N 1
(DIP16)
Low
with Lamp Test
Input; TTL Enabled
Products, packages, availability and ordering
Type number North
Ordering code Marking/Packing Package Device status Buy online
Discretes packing
American type (12NC)
number
info
Standard Marking
9337 148 80652 * Bulk Pack,
SOT109
(SO16)
74HC4511D 74HC4511D
Full production
Full production
Full production
Full production
Full production
Full production
CECC
Standard Marking
SOT109
(SO16)
74HC4511D-T 9337 148 80653 * Reel Pack, SMD,
13", CECC
Standard Marking
9336 698 10652 * Bulk Pack,
CECC
SOT38-1
(DIP16)
74HC4511N 74HC4511N
Standard Marking
SOT109
(SO16)
74HCT4511D 74HCT4511D 9337 153 60652 * Bulk Pack,
CECC
Standard Marking
9337 153 60653 * Reel Pack, SMD,
13", CECC
SOT109
(SO16)
74HCT4511D-
T
Standard Marking
SOT38-1
(DIP16)
74HCT4511N 74HCT4511N 9336 704 40652 * Bulk Pack,
CECC
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function or related to the type number(s) as listed on this page. The similar products page includes products from the
same catalog tree(s), relevant selection guides and products from the same functional category.
Support & tools
HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications(date 01-Mar-98)
HC/T User Guide(date 01-Nov-97)
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