933987780112 [NXP]
IC HC/UH SERIES, 9 1-INPUT INVERT GATE, PDSO20, SO-20, Gate;
| 型号： | 933987780112 |
| 厂家： | 
NXP |
| 描述： | IC HC/UH SERIES, 9 1-INPUT INVERT GATE, PDSO20, SO-20, Gate 栅 输入元件 光电二极管 逻辑集成电路 |
| 文件： | 总7页 (文件大小：44K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT9114
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
December 1990
Product specification
Supersedes data of March 1988
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
74HC/HCT9114
The Schmitt trigger action in the data inputs transform
slowly changing input signals into sharply defined
jitter-free output signals.
FEATURES
• Schmitt trigger action on all data inputs
• Output capability: standard (open drain)
• ICC category: MSI
The 74HC/HCT9114 have open-drain N-transistor
outputs, which are not clamped by a diode connected to
VCC. In the OFF-state, i.e. when one input is LOW, the
output may be pulled to any voltage between GND and
GENERAL DESCRIPTION
V
Omax. This allows the device to be used as a
The 74HC/HCT9114 are high-speed Si-gate CMOS
devices and are pin compatible with low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
LOW-to-HIGH or HIGH-to-LOW level shifter. For digital
operation and OR-tied output applications, these devices
must have a pull-up resistor to establish a logic HIGH level.
The “9114” is identical to the “9115” but has inverting
outputs.
The 74HC/HCT9114 are nine wide Schmitt trigger
inverting buffer with open drain outputs and Schmitt trigger
inputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
tPHL/ tPLZ
PARAMETER
CONDITIONS
UNIT
ns
HC
12
HCT
13
propagation delay An to Yn
input capacitance
CL = 15 pF; VCC = 5 V
CI
3.5
5
3.5
5
pF
pF
CPD
power dissipation capacitance per buffer
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
74HC/HCT9114
PIN DESCRIPTION
PIN NO.
SYMBOL
A0 to A8
GND
NAME AND FUNCTION
1, 2, 3, 4, 5, 6, 7, 8, 9
10
data inputs
ground (0 V)
19, 18, 17, 16, 15, 14, 13, 12, 11 Y0 to Y8
20 VCC
data outputs
positive supply voltage
A
A
A
A
A
A
A
A
A
Y
Y
Y
Y
Y
Y
Y
Y
Y
lfpage
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
alfpage
1
1
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
11
19
18
17
16
15
14
13
12
11
2
3
4
5
6
7
8
9
MBA014
MBA015
Fig.1 Pin configuration.
Fig.2 Logic diagram.
Fig.3 IEC logic diagram.
December 1990
3
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
74HC/HCT9114
handbook, halfpage
A
n
GND
MBA021
Fig.4 Functional diagram.
Fig.5 Logic diagram (one Schmitt trigger).
FUNCTION TABLE
INPUTS
An
OUTPUTS
Yn
L
H
Z
L
Notes
1. H = HIGH voltage level
L = LOW voltage level
Z = high impedance OFF-state
December 1990
4
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
74HC/HCT9114
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Transfer characteristics are given below.
Output capability: standard
ICC category: MSI
TRANSFER CHARACTERISTICS FOR 74HC
Voltages are referred to GND (ground = 0 V)
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
VCC
(V)
+25
−40 to +85
−40 to +125
WAVEFORMS
min. typ. max. min. max.
min.
max.
VT+
VT−
VH
positive-going
threshold
0.70 1.13 1.50 0.70 1.50 0.70
1.75 2.37 3.15 1.75 3.15 1.75
2.30 3.11 4.20 2.30 4.20 2.30
1.50
3.15
4.20
V
V
V
2.0 Fig.6
4.5
6.0
negative-going
threshold
0.30 0.70 1.10 0.30 1.10 0.30
1.35 1.80 2.40 1.35 2.40 1.35
1.80 2.43 3.30 1.80 3.30 1.80
1.10
2.40
3.30
2.0 Fig.6
4.5
6.0
hysteresis (VT+ − VT−) 0.2
0.43 0.80 0.18 0.80 0.15
0.57 1.00 0.40 1.00 0.40
0.68 1.10 0.50 1.10 0.50
0.80
1.00
1.10
2.0 Fig.6
4.5
6.0
0.4
0.5
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
VCC
+25
−40 to +85 −40 to +125
WAVEFORMS
(V)
min. typ. max. min. max. min. max.
tPHL/ tPLZ propagation delay
An to Yn
36
13
10
110
22
19
140
28
24
165
33
28
ns
ns
2.0 Fig.7
4.5
6.0
tTHL
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
2.0 Fig.7
4.5
6.0
December 1990
5
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
74HC/HCT9114
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Transfer characteristics are given below.
Output capability: standard
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
An
0.3
TRANSFER CHARACTERISTICS FOR 74HCT
Voltages are referred to GND (ground = 0 V)
Tamb (°C)
TEST CONDITIONS
VCC
74HCT
SYMBOL PARAMETER
+25
UNIT
WAVEFORMS
−40 to +85 −40 to +125
(V)
min. typ. max. min. max.
min.
max.
VT+
VT−
VH
positive-going
threshold
0.9
1.2
1.50 2.0
1.70 2.1
0.9
1.2
2.0
2.1
0.9
1.2
2.0
2.1
V
V
V
4.5 Fig.6
5.5
negative-going
threshold
0.7
0.8
1.06 1.4
1.27 1.7
0.7
0.8
1.4
1.7
0.7
0.8
1.4
2.7
4.5 Fig.6
5.5
hysteresis (VT+ − VT−) 0.2
0.44 0.8
0.44 0.8
0.2
0.2
0.8
0.8
0.2
0.2
0.8
0.8
4.5 Fig.6
5.5
0.2
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
T
amb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
VCC
(V)
WAVEFORMS
+25
−40 to +85
−40 to +125
min. typ. max. min. max.
min.
max.
tPHL/ tPLZ propagation delay
An to Yn
17
31
39
47
ns
ns
4.5 Fig.7
4.5 Fig.7
tTHL
output transition time
7
15
19
22
December 1990
6
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
74HC/HCT9114
TRANSFER CHARACTERISTIC WAVEFORMS
Fig.6 Transfer characteristic.
AC WAVEFORMS
t
t
r
f
10 %
INPUT
A
(1)
V
n
M
90 %
t
t
PLZ
PZL
(1)
V
OUTPUT
Y
M
n
10 %
t
THL
MBA024
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7 Waveforms showing the input (An) to output (Yn) propagation delays and the output transition times.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
7
相关型号：
933988940126
TRANSISTOR 150 mA, 50 V, PNP, Si, SMALL SIGNAL TRANSISTOR, TO-92, PLASTIC, SPT, SC-43, 3 PIN, BIP General Purpose Small Signal
NXP
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