934054718215 [NXP]
TRANSISTOR 570 mA, 30 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, FET General Purpose Small Signal;
| 型号： | 934054718215 |
| 厂家： | 
NXP |
| 描述： | TRANSISTOR 570 mA, 30 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, FET General Purpose Small Signal 开关 光电二极管 晶体管 |
| 文件： | 总9页 (文件大小：170K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH202
FEATURES
SYMBOL
QUICK REFERENCE DATA
s
• Low threshold voltage
• Fast switching
VDS = -30 V
• Logic level compatible
• Subminiature surface mount
package
ID = -0.52 A
g
R
DS(ON) ≤ 0.9 Ω (VGS = -10 V)
d
GENERAL DESCRIPTION
PINNING
SOT23
P-channel, enhancement mode,
logic level, field-effect power
transistor. This device has low
threshold voltage and extremely
fast switching making it ideal for
battery powered applications and
high speed digital interfacing.
PIN
DESCRIPTION
3
1
2
3
gate
Top view
source
drain
1
2
The BSH202 is supplied in the
SOT23
subminiature
surface
mounting package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
VDGR
VGS
ID
Drain-source voltage
-
-
-
-
-
-
-
-
-30
-30
± 20
-0.52
-0.33
-2.1
0.417
0.17
150
V
V
V
A
A
Drain-gate voltage
Gate-source voltage
Drain current (DC)
RGS = 20 kΩ
Ta = 25 ˚C
Ta = 100 ˚C
Ta = 25 ˚C
Ta = 25 ˚C
Ta = 100 ˚C
IDM
Ptot
Drain current (pulse peak value)
Total power dissipation
A
W
W
˚C
Tstg, Tj
Storage & operating temperature
- 55
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
Rth j-a
Thermal resistance junction to
ambient
FR4 board, minimum
footprint
300
-
K/W
August 1998
1
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH202
ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
V(BR)DSS
VGS(TO)
RDS(ON)
Drain-source breakdown
voltage
Gate threshold voltage
VGS = 0 V; ID = -10 µA
-30
-
-
V
VDS = VGS; ID = -1 mA
-1
-0.4
-
-
-1.9
-
0.63
0.89 1.35
0.95 1.35
0.7
±10 ±100
-50
-0.4
-
-
V
V
Ω
Ω
Ω
Tj = 150˚C
Tj = 150˚C
Drain-source on-state
resistance
VGS = -10 V; ID = -280 mA
VGS = -4.5 V; ID = -140 mA
0.9
VGS = -10 V; ID = -280 mA; Tj = 150˚C
-
gfs
IGSS
IDSS
Forward transconductance
Gate source leakage current VGS = ±20 V; VDS = 0 V
Zero gate voltage drain
current
VDS = -24 V; ID = -280 mA
0.2
-
S
-
-
-
nA
nA
µA
VDS = -24 V; VGS = 0 V;
-100
-10
Qg(tot)
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
ID = -0.3 A; VDD = -15 V; VGS = -10 V
-
-
-
2.9
0.4
0.5
-
-
-
nC
nC
nC
td on
tr
td off
tf
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
VDD = -15 V; ID = -0.5 A;
VGS = -10 V; RG = 6 Ω
Resistive load
-
-
-
-
2
-
-
-
-
ns
ns
ns
ns
4.5
45
20
Ciss
Coss
Crss
Input capacitance
Output capacitance
Feedback capacitance
VGS = 0 V; VDS = -24 V; f = 1 MHz
-
-
-
80
27
9
-
-
-
pF
pF
pF
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
IDR
Continuous reverse drain
current
Ta = 25 ˚C
-
-
-0.56
A
IDRM
VSD
Pulsed reverse drain current
Diode forward voltage
-
-
-
-2.2
-1.3
A
V
IF = -0.5 A; VGS = 0 V
-0.87
trr
Qrr
Reverse recovery time
Reverse recovery charge
IF = -0.5 A; -dIF/dt = 100 A/µs;
VGS = 0 V; VR = -24 V
-
-
30
28
-
-
ns
nC
August 1998
2
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH202
Normalised Power Dissipation, PD (%)
120
Peak Pulsed Drain Current, IDM (A)
D = 0.5
1000
100
10
100
80
60
40
20
0
0.2
0.1
0.05
0.02
single pulse
P
D = tp/T
D
tp
1
T
0.1
0
25
50
75
100
125
150
1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01
Pulse width, tp (s)
Ambient Temperature, Ta (C)
Fig.1. Normalised power dissipation.
PD% = 100 PD/PD 25 ˚C = f(Ta)
Fig.4. Transient thermal impedance.
Zth j-a = f(t); parameter D = tp/T
BSH202
-3.5 V
Drain current, ID (A)
Tj = 25 C
Normalised Drain Current, ID (%)
-1.4
-1.2
-1
120
100
80
60
40
20
0
-4.5 V
VGS = -10 V
-3.3 V
-3.1 V
-0.8
-0.6
-0.4
-0.2
0
-2.9 V
-2.7 V
-2.5 V
0
25
50
75
100
125
150
0
-0.5
-1
-1.5
-2
Ambient Temperature, Ta (C)
Drain-Source Voltage, VDS (V)
Fig.2. Normalised continuous drain current.
ID% = 100 ID/ID 25 ˚C = f(Ta); conditions: VGS ≤ -10 V
Fig.5. Typical output characteristics, Tj = 25 ˚C.
ID = f(VDS); parameter VGS
BSH202
Tj = 25 C
Drain-Source On Resistance, RDS(on) (Ohms)
3
2.8
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
BSH202
tp = 10us
Peak Pulsed Drain Current, IDM (A)
RDS(on) = VDS/ ID
-2.5 V
-2.9 V
-2.7 V
10
1
-3.1 V
-3.3 V
100 us
1 ms
-3.5 V
10 ms
0.1
100 ms
-4.5 V
d.c.
VGS = -10 V
0.8
0.6
0.4
0.2
0
0.01
0.001
0.1
1
10
100
0
-0.2
-0.4
-0.6
-0.8
-1
-1.2
-1.4
Drain Current, ID (A)
Drain-Source Voltage, VDS (V)
Fig.3. Safe operating area. Ta = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter tp
Fig.6. Typical on-state resistance, Tj = 25 ˚C.
RDS(ON) = f(ID); parameter VGS
August 1998
3
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH202
Drain Current, ID (A)
-2
BSH202
Threshold Voltage, VGS(to), (V)
1.8
1.6
1.4
1.2
1
-1.8
-1.6
-1.4
-1.2
-1
VDS > ID X RDS(on)
typical
Tj = 25 C
150 C
minimum
0.8
0.6
0.4
0.2
0
-0.8
-0.6
-0.4
-0.2
0
0
25
50
75
100
125
150
0
-0.5 -1 -1.5 -2 -2.5 -3 -3.5 -4 -4.5 -5 -5.5
Gate-Source Voltage, VGS (V)
Junction Temperature, Tj (C)
Fig.7. Typical transfer characteristics.
ID = f(VGS)
Fig.10. Gate threshold voltage.
GS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
V
Transconductance, gfs (S)
BSH202
150 C
BSH202
Drain Current, ID (A)
1.4
1.2
1
1E-01
1E-02
1E-03
1E-04
1E-05
1E-06
1E-07
VDS > ID X RDS(on)
VDS = -5 V
Tj = 25 C
Tj = 25 C
0.8
0.6
0.4
0.2
0
0
-0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 -1.1 -1.2 -1.3 -1.4
Drain Current, ID (A)
-2.5
-2
-1.5
-1
Gate-Source Voltage, VGS (V)
Fig.8. Typical transconductance, Tj = 25 ˚C.
gfs = f(ID)
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C
BSH202
Capacitances, Ciss, Coss, Crss (pF)
Normalised Drain-Source On Resistance
1000
100
10
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
RDS(ON) @ Tj
RDS(ON) @ 25C
VGS = -10 V
Ciss
-4.5 V
Coss
0.9
0.8
0.7
0.6
0.5
Crss
1
0
25
50
75
100
125
150
-0.1
-1.0
-10.0
-100.0
Junction Temperature, Tj (C)
Drain-Source Voltage, VDS (V)
Fig.9. Normalised drain-source on-state resistance.
RDS(ON)/RDS(ON)25 ˚C = f(Tj)
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
August 1998
4
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH202
Gate-source voltage, VGS (V)
BSH202
BSH202
Source-Drain Diode Current, IF (A)
-14
-12
-10
-8
4
3.5
3
VDD = 15 V
RD = 50 Ohms
Tj = 25 C
2.5
2
150 C
-6
1.5
1
Tj = 25 C
-4
0.5
0
-2
0
0
0.5
1
1.5
2
0
1
2
3
4
Drain-Source Voltage, VSDS (V)
Gate charge, (nC)
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG)
Fig.14. Typical reverse diode current.
IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
August 1998
5
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH202
MECHANICAL DATA
Plastic surface mounted package; 3 leads
SOT23
D
B
E
A
X
H
v
M
A
E
3
Q
A
A
1
c
1
2
e
1
b
p
w M
B
L
p
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
b
c
D
E
e
e
H
L
Q
v
w
A
p
p
1
E
max.
1.1
0.9
0.48
0.38
0.15
0.09
3.0
2.8
1.4
1.2
2.5
2.1
0.45
0.15
0.55
0.45
mm
0.1
1.9
0.95
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-02-28
SOT23
Fig.15. SOT23 surface mounting package.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8".
August 1998
6
Rev 1.000
Philips Semiconductors
Product specification
P-channel enhancement mode
MOS transistor
BSH202
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
August 1998
7
Rev 1.000
1 of 2
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P-channel, enhancement mode, logic level, field-effect power transistor. This device
voltage and extremely fast switching making it ideal for battery powered applications
digital interfacing.
PC/PC-peripherals
Cross reference
Models
The BSH202 is supplied in the SOT23 subminiature surface mounting package.
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
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Features
l Low threshold voltage
l Fast switching
l Logic level compatible
l Subminiature surface mount package
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Datasheet
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release date Datasheet status count (kB
BSH202
BSH202
Publication
Type nr. Title
BSH202 P-channel enhancement
mode MOS transistor
01-Aug-98 Product 138
7
Specification
Products, packages, availability and ordering
North
Order code
(12nc)
Partnumber American
Partnumber
marking/packing package device statu
Standard
BSH202
Marking * Reel
SOT23 Full producti
Pack, SMD,
BSH202
T/R
9340 547 18215
Low Profile
Standard
2 of 2
Marking * Reel
BSH202 /T3 9340 547 18235 Pack, SMD,
SOT23 Full producti
Low Profile,
Large
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Spice model of BSH202
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Royal Philips Electronics
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