935166780112 [NXP]
IC TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16, SOT-338-1, SSOP-16, Multiplexer or Switch;
| 型号： | 935166780112 |
| 厂家： | 
NXP |
| 描述： | IC TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16, SOT-338-1, SSOP-16, Multiplexer or Switch 光电二极管 |
| 文件： | 总22页 (文件大小：217K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4053
Triple 2-channel analog
multiplexer/demultiplexer
December 1990
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
The 74HC/HCT4053 are triple 2-channel analog
FEATURES
multiplexers/demultiplexers with a common enable input
(E). Each multiplexer/demultiplexer has two independent
inputs/outputs (nY0 and nY1), a common input/output (nZ)
and three digital select inputs (S1 to S3).
• Low “ON” resistance:
80 Ω (typ.) at VCC − VEE = 4.5 V
70 Ω (typ.) at VCC − VEE = 6.0 V
60 Ω (typ.) at VCC − VEE = 9.0 V
With E LOW, one of the two switches is selected (low
impedance ON-state) by S1 to S3. With E HIGH, all
switches are in the high impedance OFF-state,
independent of S1 to S3.
• Logic level translation:
to enable 5 V logic to communicate
with ± 5 V analog signals
• Typical “break before make” built in
• Output capability: non-standard
• ICC category: MSI
VCC and GND are the supply voltage pins for the digital
control inputs (S1, to S3, and E). The VCC to GND ranges
are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The
analog inputs/outputs (nY0 and nY1, and nZ) can swing
between VCC as a positive limit and VEE as a negative limit.
GENERAL DESCRIPTION
V
CC − VEE may not exceed 10.0 V.
The 74HC/HCT4053 are high-speed Si-gate CMOS
devices and are pin compatible with the “4053” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
For operation as a digital multiplexer/demultiplexer, VEE is
connected to GND (typically ground).
QUICK REFERENCE DATA
V
EE = GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL PARAMETER
tPZH/ tPZL turn “ON” time
TYPICAL
CONDITIONS
CL = 15 pF; RL = 1 kΩ; VCC = 5 V
UNIT
HC
HCT
E to VOS
Sn to VOS
17
23
ns
21
21
ns
t
PHZ/ tPLZ
turn “OFF” time
E to VOS
18
17
3.5
36
20
19
3.5
36
ns
ns
pF
pF
Sn to VOS
CI
input capacitance
CPD
CS
power dissipation capacitance per switch notes 1 and 2
max. switch capacitance
independent (Y)
5
8
5
8
pF
pF
common
(Z)
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi+∑ {(CL+CS) × VCC2 × fo} where:
fi = input frequency in MHz; fo = output frequency in MHz
∑ {(CL+CS) × VCC2 × fo} = sum of outputs
CL = output load capacitance in pF; CS = max. switch capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
December 1990
2
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
2, 1
2Y0 to, 2Y1
3Y0 to, 3Y1
E
independent inputs/outputs
independent inputs/outputs
enable input (active LOW)
negative supply voltage
ground (0 V)
5, 3
6
7
VEE
8
GND
11, 10, 9
12, 13
14, 15, 4
16
S1 to S3
1Y0, 1Y1
1Z to 3Z
VCC
select inputs
independent inputs/outputs
common inputs/outputs
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
APPLICATIONS
• Analog multiplexing and demultiplexing
• Digital multiplexing and demultiplexing
• Signal gating
FUNCTION TABLE
INPUTS
CHANNEL ON
E
Sn
L
L
L
H
nY0 − nZ
nY1 − nZ
H
X
none
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Fig.4 Functional diagram.
Fig.5 Schematic diagram (one switch).
December 1990
4
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to VEE = GND (ground = 0 V)
SYMBOL
VCC
PARAMETER
DC supply voltage
MIN.
−0.5
MAX.
+11.0
20
UNIT
CONDITIONS
V
±IIK
±ISK
±IS
DC digital input diode current
DC switch diode current
DC switch current
mA
mA
mA
mA
mA
°C
for VI < −0.5 V or VI > VCC + 0.5 V
20
for VS < −0.5 V or VS > VCC + 0.5 V
for −0.5 V < VS < VCC + 0.5 V
25
±IEE
DC VEE current
20
±ICC; ±IGND DC VCC or GND current
50
Tstg
Ptot
storage temperature range
−65
+150
power dissipation per package
for temperature range: −40 to + 125 °C
74HC/HCT
plastic DIL
750
500
100
mW
mW
mW
above + 70 °C: derate linearly with 12 mW/K
above + 70 °C: derate linearly with 8 mW/K
plastic mini-pack (SO)
power dissipation per switch
PS
Note to ratings
To avoid drawing VCC current out of terminals nZ, when switch current flows in terminals nYn, the voltage drop across
the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals nZ, no VCC current will flow out
of terminals nYn. In this case there is no limit for the voltage drop across the switch, but the voltages at nYn and nZ may
not exceed VCC or VEE
.
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER
74HC
74HCT
UNIT
CONDITIONS
min. typ. max. min. typ. max.
VCC
VCC
VI
DC supply voltage VCC−GND
DC supply voltage VCC−VEE
DC input voltage range
2.0
5.0 10.0 4.5
5.0 10.0 2.0
5.0 5.5
5.0 10.0
VCC
V
see Figs 6 and 7
see Figs 6 and 7
2.0
V
GND
VEE
VCC
VCC
GND
VEE
V
VS
DC switch voltage range
VCC
V
Tamb
operating ambient temperature −40
+85 −40
+85
°C
range
see DC and AC
CHARACTERISTICS
Tamb
operating ambient temperature −40
+125 −40
+125
°C
range
1000
500
400
250
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 10.0 V
tr, tf
input rise and fall times
6.0
6.0 500
ns
December 1990
5
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
Fig.7 Guaranteed operating area as a function
of the supply voltages for 74HCT4053.
Fig.6 Guaranteed operating area as a function of
the supply voltages for 74HC4053.
DC CHARACTERISTICS FOR 74HC/HCT
For 74HC: VCC − GND or VCC − VEE = 2.0, 4.5, 6.0 and 9.0 V
For 74HCT: VCC − GND = 4.5 and 5.5 V; VCC − VEE = 2.0, 4.5, 6.0 and 9.0 V
Tamb (°C)
TEST CONDITIONS
74HC/HCT
SYMBOL
PARAMETER
UNIT VCC VEE
IS
Vis
VI
+ 25
−40 to +85 −40 to +125
(V) (V) (µA)
min. typ. max. min. max. min. max.
RON
ON resistance
(peak)
−
−
−
−
Ω
Ω
Ω
Ω
2.0
0
0
0
100 VCC VIH
1000 to or
1000 VEE VIL
100 180
90
70
225
200
165
270
240
195
4.5
6.0
4.5
160
130
−4.5 1000
RON
ON resistance
(rail)
150
80
70
−
−
−
Ω
Ω
Ω
Ω
2.0
4.5
6.0
4.5
0
0
0
100 VEE VIH
140
120
105
175
150
130
210
180
160
1000
1000
or
VIL
60
−4.5 1000
RON
ON resistance
(rail)
150
90
80
−
−
−
Ω
Ω
Ω
Ω
2.0
4.5
6.0
4.5
0
0
0
100 VCC VIH
160
140
120
200
175
150
240
210
180
1000
1000
or
VIL
65
−4.5 1000
∆RON
maximum ∆ON
resistance
between any two
channels
−
9
8
6
Ω
Ω
Ω
Ω
2.0
4.5
6.0
4.5
0
0
0
−4.5
VCC VIH
to
or
VEE VIL
Notes to the characteristics
1. At supply voltages (VCC − VEE) approaching 2.0 V the analog switch ON-resistance becomes extremely non-linear.
Therefore it is recommended that these devices be used to transmit digital signals only, when using these supply
voltages.
2. For test circuit measuring RON see Fig.8.
December 1990
6
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
DC CHARACTERISTICS FOR 74HC
Voltages are referenced to GND (ground = 0 V)
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL
PARAMETER
UNIT VCC VEE
VI
OTHER
+25
−40 to +85 −40 to +125
V
V
min. typ. max. min. max. min. max.
VIH
HIGH level input
voltage
1.5 1.2
3.15 2.4
4.2 3.2
6.3 4.7
1.5
3.15
4.2
6.3
1.5
3.15
4.2
6.3
V
V
2.0
4.5
6.0
9.0
VIL
LOW level input
voltage
0.8 0.5
0.5
1.35
1.8
2.7
0.5
1.35
1.8
2.7
2.0
4.5
6.0
9.0
2.1 1.35
2.8 1.8
4.3 2.7
±II
input leakage
current
0.1
0.2
1.0
2.0
1.0
2.0
µA
µA
6.0
10.0
0
0
VCC
or
GND
±IS
analog switch
OFF-state
current per
channel
0.1
1.0
1.0
10.0
0
VIH
or
VIL
VS
=
V
CC − VEE
(see Fig.10)
±IS
±IS
ICC
analog switch
OFF-state current
all channels
0.1
0.1
1.0
1.0
1.0
1.0
µA
µA
10.0
10.0
0
0
VIH
or
VIL
VS
CC − VEE
(see Fig.10)
VS
CC − VEE
(see Fig.11)
=
V
analog switch
ON-state
current
VIH
or
VIL
=
V
quiescent supply
current
8.0
16.0
80.0
160.0
160.0 µA
320.0
6.0
10.0
0
0
VCC Vis = VEE
or or VCC
;
GND VOS = VCC
or VEE
December 1990
7
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT VCC VEE
OTHER
+25
−40 to +85 −40 to +125
(V)
(V)
min. typ. max. min. max.
min. max.
tPHL/ tPLH propagation delay
Vis to Vos
15
5
4
60
12
10
8
75
15
13
10
90
18
15
12
ns
ns
ns
ns
ns
2.0
0
0
0
−4.5
RL = ∞;
CL = 50 pF
(see Fig.18)
4.5
6.0
4.5
4
t
PZH/ tPZL turn “ON” time
E to Vos
60
20
16
15
220
44
37
275
55
47
330
66
56
2.0
4.5
6.0
4.5
0
0
0
RL = 1 kΩ;
CL = 50 pF
(see Figs 19,
31
39
47
−4.5 20 and 21)
tPZH/ tPZL turn “ON” time
Sn to Vos
75
25
20
15
220
44
37
275
55
47
330
66
56
2.0
4.5
6.0
4.5
0
0
0
RL = 1 kΩ;
CL = 50 pF
(see Figs 19,
31
39
47
−4.5 20 and 21)
t
PHZ/ tPLZ turn “OFF” time
E to Vos
63
21
17
15
210
42
36
265
53
45
315
63
54
2.0
4.5
6.0
4.5
0
0
0
RL = 1 kΩ;
CL = 50 pF
(see Figs 19,
29
36
44
−4.5 20 and 21)
tPHZ/ tPLZ turn “OFF” time
Sn to Vos
60
20
16
15
210
42
36
265
53
45
315
63
54
2.0
4.5
6.0
4.5
0
0
0
RL = 1 kΩ;
CL = 50 pF
(see Figs 19,
29
36
44
−4.5 20 and 21)
December 1990
8
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
DC CHARACTERISTICS FOR 74HCT
Voltages are referenced to GND (ground = 0 V)
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
+25
UNIT VCC VEE
(V) (V)
VI
OTHER
−40 to +85 −40 to +125
min.
HIGH level input 2.0
typ.
max. min. max.
min.
max.
VIH
VIL
±II
1.6
2.0
2.0
V
4.5
to
5.5
voltage
LOW level input
voltage
1.2
0.8
0.1
0.1
0.8
1.0
1.0
0.8
V
4.5
to
5.5
input leakage
current
1.0
1.0
µA
µA
5.5
0
0
VCC
or
GND
±IS
analog switch
OFF-state
current per
channel
10.0
VIH
or
VS
=
V
CC − VEE
VIL
Fig.10
±IS
analog switch
OFF-state
current all
channels
0.1
0.1
1.0
1.0
1.0
1.0
µA
µA
10.0
10.0
0
VIH
or
VIL
VS
CC − VEE
Fig.10
=
V
±IS
analog switch
ON-state current
0
0
VIH
or
VIL
VS
CC − VEE
Fig.11
=
V
ICC
quiescent supply
current
8.0
16.0
80.0
160.0
160.0 µA
320.0
5.5
5.0
VCC Vis = VEE
or VCC
OS = VCC
or VEE
VCC other
−2.1 inputs
−5.0 or
GND
;
V
∆ICC
additional
100
360
450
490
µA
4.5
to
5.5
0
quiescent supply
current per input
pin for unit load
coefficient is 1
(note 1)
V
at VCC or
GND
Note to HCT types
1. The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given here.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
Sn
E
0.50
0.50
December 1990
9
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT VCC VEE
OTHER
+25
−40 to +85 −40 to +125
(V)
(V)
min. typ. max. min. max.
min. max.
tPHL/ tPLH propagation delay
Vis to Vos
5
4
12
8
15
10
18
12
ns
ns
4.5
4.5
0
RL = ∞;
−4.5 CL = 50 pF
(see Fig.18)
t
t
t
PZH/ tPZL turn “ON” time
E to Vos
27
16
48
34
60
43
72
51
4.5
4.5
0
RL = 1 kΩ;
−4.5 CL = 50 pF
(see Figs 19,
20 and 21)
PZH/ tPZL turn “ON” time
Sn to Vos
25
16
48
34
60
43
72
51
ns
ns
ns
4.5
4.5
0
RL = 1 kΩ;
−4.5 CL = 50 pF
(see Figs 19,
20 and 21)
PHZ/ tPLZ turn “OFF” time
E to Vos
24
15
44
31
55
39
66
47
4.5
4.5
0
RL = 1 kΩ;
−4.5 CL = 50 pF
(see Figs 19,
20 and 21)
tPHZ/ tPLZ turn “OFF” time
Sn to Vos
22
15
44
31
55
39
66
47
4.5
4.5
0
RL = 1 kΩ;
−4.5 CL = 50 pF
(see Figs 19,
20 and 21)
December 1990
10
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
Fig.8 Test circuit for measuring RON
.
Fig.9 Typical RON as a function of input voltage
Vis for Vis = 0 to VCC − VEE
.
Fig.10 Test circuit for measuring OFF-state current.
Fig.11 Test circuit for measuring ON-state current.
December 1990
11
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT
Recommended conditions and typical values
GND = 0 V; Tamb = 25 °C
VCC
(V)
VEE
(V)
Vis(p-p)
(V)
SYMBOL
PARAMETER
typ. UNIT
CONDITIONS
sine-wave distortion
f = 1 kHz
0.04
0.02
%
%
2.25 −2.25 4.0
4.5 −4.5 8.0
2.25 −2.25 4.0
4.5 −4.5 8.0
RL = 10 kΩ; CL = 50 pF
(see Fig.14)
sine-wave distortion
f = 10 kHz
0.12
0.06
%
%
RL = 10 kΩ; CL = 50 pF
(see Fig.14)
switch “OFF” signal
feed-through
−50
−50
dB
dB
2.25 −2.25 note 1 RL = 600 Ω; CL = 50 pF
4.5 −4.5 f = 1 MHz see (Fig.12 and 15)
2.25 −2.25 note 1 RL = 600 Ω; CL = 50 pF;
crosstalk between
any two switches/
multiplexers
−60
−60
dB
dB
4.5
−4.5
f = 1 MHz (see Fig.16)
V(p−p)
crosstalk voltage between
control and any switch
(peak-to-peak value)
110
220
mV
mV
4.5
4.5
0
−4.5
RL = 600 kΩ; CL = 50 pF;
f = 1 MHz (E or Sn,
square-wave between VCC
and GND, tr = tf = 6 ns
(see Fig.17)
fmax
CS
minimum frequency response
(−3dB)
160
170
MHz 2.25 −2.25 note 2 RL = 50 Ω ; CL = 10 pF
MHz 4.5
−4.5
(see Fig.13 and 14)
maximum switch capacitance
independent (Y)
5
8
pF
pF
common
(Z)
Notes to the AC characteristics
1. Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 Ω).
2. Adjust input voltage Vis to 0 dBm level at VOS for 1 MHz (0 dBm = 1 mW into 50 Ω).
General note
Vis is the input voltage at an nYn or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at an nYn or nZ terminal, whichever is assigned as an output
December 1990
12
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
Test conditions:
VCC = 4.5 V; GND = 0 V; VEE = −4.5 V;
RL = 50 Ω; Rsource = 1 kΩ.
Fig.12 Typical switch “OFF” signal feed-through as a function of frequency.
Test conditions:
VCC = 4.5 V; GND = 0 V; VEE = −4.5 V;
RL = 50 Ω; Rsource = 1 kΩ.
Fig.13 Typical frequency response.
Fig.14 Test circuit for measuring sine-wave
distortion and minimum frequency
response.
Fig.15 Test circuit for measuring switch “OFF”
signal feed-through.
December 1990
13
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
(a) channel ON condition
(b) channel OFF condition
Fig.16 Test circuits for measuring crosstalk between any two switches/multiplexers.
The crosstalk is defined as follows
(oscilloscope output):
Fig.17 Test circuit for measuring crosstalk between control and any switch.
December 1990
14
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
AC WAVEFORMS
Fig.18 Waveforms showing the input (Vis) to output (Vos) propagation delays.
(1) HC : VM = 50%; VI = GND to VCC
HCT: VM = 1.3 VI = GND to 3 V.
.
Fig.19 Waveforms showing the turn-ON and turn-OFF times.
December 1990
15
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
TEST CIRCUIT AND WAVEFORMS
Conditions
TEST
SWITCH
VIS
tr; tf
FAMILY
AMPLITUDE
VM
tPZH
tPZL
tPHZ
tPLZ
VEE
VCC
VEE
VCC
open
VCC
VEE
VCC
VEE
fmax
PULSE WIDTH
;
OTHER
74HC
74HCT
VCC
3.0 V
50% <2 ns
1.3 V <2 ns
6 ns
6 ns
others
pulse
CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output impedance ZO of the pulse generator.
tr = tf = 6 ns; when measuring fmax, there is no constraint to tr, tf with 50% duty factor.
Fig.20 Test circuit for measuring AC performance.
Conditions
TEST
SWITCH
VIS
tr; tf
FAMILY
AMPLITUDE
VM
tPZH
tPZL
tPHZ
tPLZ
VEE
VCC
VEE
VCC
open
VCC
VEE
VCC
VEE
fmax
PULSE WIDTH
;
OTHER
74HC
74HCT
VCC
3.0 V
50% <2 ns
1.3 V <2 ns
6 ns
6 ns
others
pulse
CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output impedance ZO of the pulse generator.
tr = tf = 6 ns; when measuring fmax, there is no constraint to tr, tf with 50% duty factor.
Fig.21 Input pulse definitions.
December 1990
16
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer
74HC/HCT4053
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
17
mit Q
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General description
The 74HC/HCT4053 are high-speed Si-gate CMOS devices and are pin compatible with the '4053' of the '4000B' series. They
are specified in compliance with JEDEC standard no. 7A.
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Packages
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The 74HC/HCT4053 are triple 2-channel analog multiplexers/demultiplexers with a common enable input (E). Each
multiplexer/demultiplexer has two independent inputs/outputs (nY and nY ), a common input/output (nZ) and three digital
0
1
End of Life
information
Distributors Go
Here!
select inputs (S
1
•
•
to S ).
3
With E LOW, one of the two switches is selected (low impedance ON-state) by S to S . With E HIGH, all switches are in the high impedance OFF-state, independent of S to S .
1
3
1
3
V
and GND are the supply voltage pins for the digital control inputs (S , to S , and E). The V to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The analog inputs/outputs (nY
1 3 CC 0
Models
CC
•
•
and nY , and nZ) can swing between V as a positive limit and V as a negative limit. V - V may not exceed 10.0 V.
1
CC
EE
CC
EE
SoC solutions
For operation as a digital multiplexer/demultiplexer, V is connected to GND (typically ground).
EE
Features
●
Low 'ON' resistance:
80 Ω (typ.) at V - V = 4.5 V
CC
EE
70 Ω (typ.) at V - V = 6.0 V
CC
EE
60 Ω (typ.) at V - V = 9.0 V
CC
EE
●
●
●
●
Logic level translation: to enable 5 V logic to communicate with ± 5 V analog signals
Typical 'break before make' built in
Output capability: non-standard
I
category: MSI
CC
Applications
AN97022_1: TDA8752 Demonstration board documentation (date 16-Dec-02)
Datasheet
Type number Title
Publication
release date
Datasheet status Page
File Datasheet
count size
(kB)
74HC/HCT4053 Triple 2-channel analog
multiplexer/demultiplexer
12/1/1990
Product
specification
17
121
Download
Additional datasheet info
To complete the device datasheet with package and family information, also download the following PDF files. The "Logic
Package Information" document is required to determine in which package(s) this device is available.
Document
Description
1
2
HCT_FAMILY_SPECIFICATIONS HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family
Specifications
HCT_PACKAGE_INFO
HC/T Package Info, The IC06 74HC/HCT/HCMOS Logic Package Information
3
HCT_PACKAGE_OUTLINES
HC/T Package Outlines, The IC06 74HC/HCT/HCMOS Logic Package
Outlines
Parametrics
Type number Package Description
Propagation Voltage No. Power
Logic
Output
Delay(ns)
of Dissipation
Pins Considerations Levels
Low Power or
16 Battery
Switching Drive
Capability
SOT109
(SO16)
Triple 2-Channel Analog
Multiplexer/Demultiplexer
5 Volts
+
74HC4053D
10~15
CMOS
CMOS
CMOS
CMOS
TTL
Low
Applications
Low Power or
16 Battery
SOT338-1
(SSOP16)
Triple 2-Channel Analog
Multiplexer/Demultiplexer
5 Volts
+
74HC4053DB
74HC4053N
10~15
Low
Low
Low
Low
Low
Low
Low
Applications
Low Power or
16 Battery
SOT38-1
(DIP16)
Triple 2-Channel Analog
Multiplexer/Demultiplexer
5 Volts
+
10~15
Applications
Low Power or
16 Battery
SOT403-1
(TSSOP16)
Triple 2-Channel Analog
Multiplexer/Demultiplexer
5 Volts
+
74HC4053PW
74HCT4053D
74HCT4053DB
74HCT4053N
74HCT4053PW
10~15
Applications
Triple 2-Channel Analog
Low Power or
16 Battery
SOT109
(SO16)
5 Volts
+
Multiplexer/Demultiplexer; 10~15
TTL Enabled
Applications
Triple 2-Channel Analog
Multiplexer/Demultiplexer; 10~15
TTL Enabled
Low Power or
SOT338-1
(SSOP16)
5 Volts
+
16 Battery
TTL
Applications
Triple 2-Channel Analog
Multiplexer/Demultiplexer; 10~15
TTL Enabled
Low Power or
SOT38-1
(DIP16)
5 Volts
+
16 Battery
TTL
Applications
Triple 2-Channel Analog
Multiplexer/Demultiplexer; 10~15
TTL Enabled
Low Power or
SOT403-1
(TSSOP16)
5 Volts
+
16 Battery
Applications
TTL
Products, packages, availability and ordering
Type number North American Ordering code
Marking/Packing Package Device status Buy online
Discretes packing
type number
(12NC)
9337 148 40652
info
SOT109
(SO16)
Standard Marking *
Bulk Pack, CECC
74HC4053D
74HC4053D
Full production
Full production
Full production
Full production
Standard Marking *
9337 148 40653 Reel Pack, SMD,
13", CECC
SOT109
(SO16)
74HC4053D-T
SOT338-1
(SSOP16)
Standard Marking *
9351 668 00112
74HC4053DB 74HC4053DB
74HC4053DB-T
Bulk Pack
Standard Marking *
9351 668 00118 Reel Pack, SMD,
13"
SOT338-1
(SSOP16)
SOT38-1
(DIP16)
Standard Marking *
9336 697 60652
74HC4053N
74HC4053N
Full production
Full production
Bulk Pack, CECC
SOT403-1
Standard Marking *
9351 869 40112
74HC4053PW 74HC4053PW
74HC4053PW-T
(TSSOP16)
Bulk Pack
Standard Marking *
9351 869 40118 Reel Pack, SMD,
13"
SOT403-1
Full production
Full production
Full production
Full production
Full production
Full production
(TSSOP16)
SOT109
(SO16)
Standard Marking *
9337 153 20112
74HCT4053D 74HCT4053D
74HCT4053D-T
Bulk Pack
Standard Marking *
9337 153 20118 Reel Pack, SMD,
13"
SOT109
(SO16)
SOT338-1
(SSOP16)
Standard Marking *
9351 667 80112
74HCT4053DB 74HCT4053DB
74HCT4053DB-T
Bulk Pack
Standard Marking *
9351 667 80118 Reel Pack, SMD,
13"
SOT338-1
(SSOP16)
SOT38-1
(DIP16)
Standard Marking *
9336 703 90112
74HCT4053N 74HCT4053N
Bulk Pack
SOT403-1
Standard Marking *
Bulk Pack
74HCT4053PW 74HCT4053PW
9351 884 80112
Full production
Full production
(TSSOP16)
Standard Marking *
9351 884 80118 Reel Pack, SMD,
13"
SOT403-1
74HCT4053PW-
T
(TSSOP16)
Products in the above table are all in production. Some variants are discontinued; click here for information on these variants.
Similar products
74HC/HCT4053 links to the similar products page containing an overview of products that are similar in function or
related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s),
relevant selection guides and products from the same functional category.
Support & tools
I²C Bus Solutions - Industrial/Motor Control Applications: Numeric Control Machine(date 01-Jun-02)
HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications(date 01-Mar-98)
HC/T User Guide(date 01-Nov-97)
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