935194370112 [NXP]
IC LED DISPLAY DRIVER, PDIP20, PLASTIC, DIP-20, Display Driver;
| 型号： | 935194370112 |
| 厂家： | 
NXP |
| 描述： | IC LED DISPLAY DRIVER, PDIP20, PLASTIC, DIP-20, Display Driver 驱动 光电二极管 接口集成电路 |
| 文件： | 总7页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
• The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4894B
12-stage shift-and-store register
LED driver
January 1995
Product specification
File under Integrated Circuits, IC04
Philips Semiconductors
Product specification
12-stage shift-and-store register LED driver
HEF4894B
APPLICATIONS
ORDERING AND PACKAGE INFORMATION
• Automotive
• Industrial
PACKAGES
PINS PIN POSITION MATERIAL
TYPE
NUMBER
CODE
HEF4894BT
HEF4894BP
20
20
SO
DIL
plastic
plastic
SO20/SOT163A
DIL20/SOT146
GENERAL DESCRIPTION
The HEF4894B is a 12 stage serial
shift register having a storage latch
associated with each stage for
strobing data from the serial input to
parallel LED driver outputs O0 to
O11. Data is shifted on positive-going
clock transitions. The data in each
shift register stage is transferred to
the storage register when the strobe
(STR) input is HIGH. Data in the
storage register appears at the
outputs whenever the output enable
(EO) signal is HIGH.
PINNING
PIN
SYMBOL
STR
NAME AND FUNCTION
strobe input
1
2
3
D
data input
CP
clock input
4, 5, 6, 7, 8, 9, 18, O0 to O11
17, 16, 15, 14, 13
parallel outputs (open drain)
10
Vss
ground
11, 12
19
Os, Os’
EO
serial outputs
output enable input
positive supply voltage
Two serial outputs (Os and Os’) are
available for cascading a number of
HEF4894B devices. Data is available
at Os on positive-going clock edges to
allow high-speed operation in
cascaded systems in which the clock
rise time is fast. The same serial
information is available at Os’ on the
next negative-going clock edge and
provides cascading HEF4894B
devices when the clock rise time is
slow.
20
VDD
FAMILY DATA
See Family Specifications except for:
Rating for DC current into any open-drain output: 40 mA.
I
DD LIMITS category MSI: see Family Specifications.
Preliminary pin assignment.
Fig.1 Pinning diagram.
Fig.2 Functional diagram.
January 1995
2
Philips Semiconductors
Product specification
12-stage shift-and-store register LED driver
HEF4894B
Fig.3 Logic diagram.
FUNCTION TABLE
INPUTS
PARALLEL
OUTPUTS
SERIAL
OUTPUTS
CP
EO
STR
D
O0
On
OS
OS’
↑
↓
↑
↑
↑
↓
L
L
X
X
L
X
X
X
L
Z
Z
Z
Z
O10’
nc
nc
O11
nc
H
H
H
H
nc
Z
nc
O10’
O10’
O10’
nc
H
H
H
On − 1
On − 1
nc
nc
Fig.4 One D-latch.
H
H
L
nc
nc
O11
Notes
1. H = HIGH state (the more positive voltage)
2. L = LOW state (the less positive voltage)
3. X = state is immaterial
4. ↑ = positive-going transition
5. ↓ = negative-going transition
6. Z = high impedance OFF state
7. nc = no change
8. O11’ = the information in the twelfth shift register stage.
At the positive clock edge the information in the 10th register stage is
transferred to the 11th register stage and the Os output.
January 1995
3
Philips Semiconductors
Product specification
12-stage shift-and-store register LED driver
HEF4894B
DC CHARACTERISTICS
VSS = 0 V.
Tamb (°C)
+ 25
VDD
(V)
PARAMETER
SYMBOL
−40
+ 85
UNIT
CONDITIONS
MIN. MAX. MIN. MAX. MIN. MAX.
output voltage
LOW; On
5
VOL
−
−
−
−
−
−
0.75
0.75
0.75
2
−
−
−
−
−
−
0.75
0.75
0.75
2
−
−
−
−
−
−
1.5
1.5
1.5
15
V
VI = VSS or VDD
Io < 20 mA
;
10
15
5
output leakage
IOZH
µA
Vo = 15 V
current; HIGH; On
10
15
2
2
15
2
2
15
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns.
VDD
(V)
TYPICAL FORMULA FOR P
PARAMETER
Dynamic power
(µW)
2
5
1200 fi + ∑(foCL) × VDD
where:
2
dissipation per package
(P)
10
15
5550 fi + ∑(foCL) × VDD
Rload = ∞
2
15000 fi + ∑(foCL) × VDD
fi = input frequency (MHz),
fo = output frequency (MHz),
CL = load capacitance (pF),
∑(foCL) = sum of outputs
VDD = supply voltage (V)
AC CHARACTERISTICS
V
SS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns.
VDD
(V)
TYPICAL EXTRAPOLATION
FORMULA
PARAMETER
SYMBOL
TYP. MAX.
UNIT
Propagation delay
CP to Os
5
160
65
320
130
90
132 ns + (0.55 ns/pF) CL
53 ns + (0.23 ns/pF) CL
37 ns + (0.16 ns/pF) CL
102 ns + (0.55 ns/pF) CL
44 ns + (0.23 ns/pF) CL
32 ns + (0.16 ns/pF) CL
92 ns + (0.55 ns/pF) CL
39 ns + (0.23 ns/pF) CL
32 ns + (0.16 ns/pF) CL
102 ns + (0.55 ns/pF) CL
49 ns + (0.23 ns/pF) CL
37 ns + (0.16 ns/pF) CL
10
15
5
tPHL
ns
HIGH to LOW
Propagation delay
CP to Os
45
130
55
260
110
80
10
15
5
tPLH
tPHL
tPLH
ns
ns
ns
LOW to HIGH
Propagation delay
CP to Os’
40
120
50
240
100
80
10
15
5
HIGH to LOW
Propagation delay
CP to Os’
40
130
60
260
120
90
10
15
LOW to HIGH
45
January 1995
4
Philips Semiconductors
Product specification
12-stage shift-and-store register LED driver
HEF4894B
VDD
(V)
TYPICAL EXTRAPOLATION
FORMULA
PARAMETER
SYMBOL
TYP. MAX.
UNIT
Propagation delay
CP to On
5
240
80
480
160
110
340
150
120
280
140
110
200
100
70
10
15
5
tPZL
ns
see note 1
OFF to LOW
Propagation delay
CP to On
55
170
75
10
15
5
tPLZ
tPZL
tPLZ
tTHL
tTLH
ns
ns
ns
ns
ns
see note 1
see note 1
see note 1
LOW to OFF
Propagation delay
STR to On
60
140
70
10
15
5
OFF to LOW
Propagation delay
STR to On
55
100
40
10
15
5
LOW to OFF
Output transition
time; Os, Os’
35
85
170
80
35 ns + (1.0 ns/pF) CL
19 ns + (0.42 ns/pF) CL
16 ns + (0.28 ns/pF) CL
35 ns + (1.0 ns/pF) CL
19 ns + (0.42 ns/pF) CL
16 ns + (0.28 ns/pF) CL
10
15
5
40
HIGH to LOW
Output transition
time; Os, Os’
30
60
85
170
80
10
15
40
LOW to HIGH
30
60
Note
1. Definition of symbol equivalent to 3-state outputs.
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns.
VDD
(V)
PARAMETER
output enable time
SYMBOL
tPZL
MIN.
TYP.
MAX.
UNIT
5
−
−
100
55
50
80
40
30
30
15
12
40
30
12
200
110
100
160
80
60
−
ns
ns
ns
ns
EO to On
10
15
5
OFF to LOW
output disable time
EO to On
−
tPLZ
−
10
15
5
−
LOW to OFF
minimum clock pulse width
LOW
−
tWCPL
60
30
24
80
60
24
10
15
5
−
−
minimum strobe pulse width
HIGH
tWSTRH
−
10
15
−
−
January 1995
5
Philips Semiconductors
Product specification
12-stage shift-and-store register LED driver
HEF4894B
VDD
(V)
PARAMETER
set-up time
SYMBOL
tsu
MIN.
TYP.
MAX.
UNIT
5
60
20
15
5
30
10
5
−
−
−
−
−
−
−
−
−
ns
ns
D to CP
10
15
5
hold time
D to CP
thold
−15
5
10
15
5
20
20
5
5
Maximum clock pulse frequency
fmax
10
22
28
MHz
10
15
11
14
Fig.5 Timing diagram.
January 1995
6
Philips Semiconductors
Product specification
12-stage shift-and-store register LED driver
HEF4894B
APPLICATION INFORMATION
An example of applications for the HEF4894B is:
• Serial-to-parallel converting LED driver
Fig.6 LED driver register.
January 1995
7
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