935229730551 [NXP]
IC SPECIALTY ANALOG CIRCUIT, PQFP44, PLASTIC, QFP-44, Analog IC:Other;
| 型号： | 935229730551 |
| 厂家： | 
NXP |
| 描述： | IC SPECIALTY ANALOG CIRCUIT, PQFP44, PLASTIC, QFP-44, Analog IC:Other |
| 文件： | 总22页 (文件大小：162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8779H
10-bit converter interface
(ADC/DAC) for quadrature
transceiver
Product specification
1999 Sep 16
Supersedes data of 1999 Jan 18
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
FEATURES
GENERAL DESCRIPTION
• Two 10-bit ADCs with multiplexed outputs
• Two 10-bit DACs with multiplexed inputs
The TDA8779 contains two 10-bit high speed ADCs and
two 10-bit DACs for wireless communication (for use in
transceiver modules). This device converts two analog
input signals (channels I and Q) and digital inputs
(D0 to D9) at a maximum sampling rate of 20 MHz.
The input bias voltages for the analog input voltages are
provided internally at the middle code. The analog input
and output voltages are AC coupled.
• Sampling rate for the ADCs and DACs up to 20 MHz
• Digital outputs (for the ADC) and inputs (for the DAC)
are TTL/CMOS compatible
• Internal reference voltage regulator
• Power dissipation 520 mW
• Standby mode.
The data sampling is performed on the rising edge of the
clock for ADCs and DACs.
All reference voltages are generated internally.
APPLICATIONS
• Wireless communication.
QUICK REFERENCE DATA
SYMBOL
VCCA1
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
analog supply voltage for
the ADC part
4.75
5.0
5.0
5.0
5.0
5.5
5.5
5.5
5.5
V
VCCD1
VCCA2
VCCD2
digital supply voltage for the
ADC part
4.75
4.75
4.75
V
V
V
analog supply voltage for
the DAC part
digital supply voltage for the
DAC part
VCCO
ICCA
ICCD
ICCO
output stage supply voltage
analog supply current
digital supply current
2.7
59
15
−
3.0
74
23
7
3.3
85
35
−
V
mA
mA
mA
output stage supply current ramp input;
fCLK = 20 MHz
fCLK(ADC)max maximum clock frequency
for the ADC part
20
−
−
−
MHz
LSB
INLA
integral non linearity for the full-scale; ramp input;
±2.25
±4
ADC part
fCLK = 20 MHz
DNLA
differential non linearity for
the ADC part
full-scale; ramp input;
fCLK = 20 MHz
−
+1.55 to −0.9 +2.8 to −1.1 LSB
fCLK(DAC)max maximum clock frequency
for the DAC part
20
−
−
−
MHz
LSB
LSB
mW
INLD
DNLD
Ptot
integral non linearity for the full-scale; ramp input;
DAC part
±0.4
±0.35
520
±1.25
±1.5
745
fCLK = 20 MHz
differential non linearity for
the DAC part
full-scale; ramp input;
−
fCLK = 20 MHz
total power dissipation
−
1999 Sep 16
2
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
DESCRIPTION
VERSION
TDA8779H
QFP44
plastic quad flat package; 44 leads (lead length 1.3 mm);
SOT307-2
body 10 × 10 × 1.75 mm
BLOCK DIAGRAM
V
V
CCD1
31
DGND1
28
STDBYA
29
DEC1 DEC2 DEC3
CCA1
7
2
3
5
INPUT
BIAS
REFERENCE
REGULATOR
TDA8779
32
OE
10
10
INI
4
6
1
9
10-BIT
ADC
10
10 34-43
44
D0A to D9A
MUX
BUFFER
LATCHES
INQ
10-BIT
ADC
V
CCO
30
26
CLKA
CLKD
AGND1
OUTI
BUFFER
33
OGND
LATCHES
10
10
10-BIT
DAC
15-24
10
10
D0D to D9D
BUFFER
BUFFER
11
13
10-BIT
DAC
OUTQ
REFERENCE
REGULATOR
AGND2
25
27
12
10
14
8
MGG075
V
V
CCA2
DEC4 DEC5
DGND2
STDBYD
CCD2
Fig.1 Block diagram.
1999 Sep 16
3
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
PINNING
SYMBOL
AGND1
PIN
DESCRIPTION
1
analog ground 1
DEC1
DEC2
INI
2
decoupling input 1
decoupling input 2
I channel ADC input
decoupling input 3
Q channel ADC input
3
4
DEC3
INQ
5
6
VCCA1
VCCA2
OUTI
DEC4
OUTQ
DEC5
AGND2
VCCD2
D0D
7
analog supply voltage 1 for ADC part (5 V)
analog supply voltage 2 for DAC part (5 V)
I channel DAC analog output
decoupling input 4
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Q channel DAC analog output
decoupling input 5
analog ground 2
digital supply voltage 2 for DAC part (5 V)
multiplexed input for the DACs; bit 0
multiplexed input for the DACs; bit 1
multiplexed input for the DACs; bit 2
multiplexed input for the DACs; bit 3
multiplexed input for the DACs; bit 4
multiplexed input for the DACs; bit 5
multiplexed input for the DACs; bit 6
multiplexed input for the DACs; bit 7
multiplexed input for the DACs; bit 8
multiplexed input for the DACs; bit 9
digital ground 2
D1D
D2D
D3D
D4D
D5D
D6D
D7D
D8D
D9D
DGND2
CLKD
STDBYD
DGND1
STDBYA
CLKA
VCCD1
OE
transmission block clock
power standby for the DAC part (active HIGH)
digital ground 1
power standby for the ADC part (active HIGH)
reception block clock
digital supply voltage 1 for ADC part (5 V)
ADCs digital output enable (3-state output); (active LOW)
input/output ground
OGND
D0A
I and Q digital outputs; bit 0
D1A
I and Q digital outputs; bit 1
D2A
I and Q digital outputs; bit 2
D3A
I and Q digital outputs; bit 3
D4A
I and Q digital outputs; bit 4
D5A
I and Q digital outputs; bit 5
D6A
I and Q digital outputs; bit 6
1999 Sep 16
4
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
SYMBOL
PIN
DESCRIPTION
D7A
D8A
D9A
VCCO
41
42
43
44
I and Q digital outputs; bit 7
I and Q digital outputs; bit 8
I and Q digital outputs; bit 9
output supply voltage (2.7 to 3.3 V)
1
2
3
4
5
6
7
8
9
33 OGND
AGND1
DEC1
DEC2
INI
OE
V
32
31
CCD1
30 CLKA
29 STDBYA
28 DGND1
27 STDBYD
26 CLKD
25 DGND2
24 D9D
DEC3
INQ
TDA8779H
V
CCA1
V
CCA2
OUTI
DEC4 10
OUTQ 11
23 D8D
MGG074
Fig.2 Pin configuration.
1999 Sep 16
5
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
+6.0
UNIT
VCCA1
VCCA2
VCCD1
VCCD2
VCCO
analog supply voltage for the ADC part
analog supply voltage for the DAC part
digital supply voltage for the ADC part
digital supply voltage for the DAC part
output stage supply voltage
−0.3
−0.3
−0.3
−0.3
−0.3
V
V
V
V
V
+6.0
+6.0
+6.0
+6.0
∆VCC
voltage difference between
V
V
V
CCA − VCCD
CCA − VCCO
CCD − VCCO
−1.0
−1.0
−1.0
−
+1.0
+4.0
+4.0
10
V
V
V
Io
output current
input voltage
mA
V
Vi
with respect to AGND
with respect to DGND
−0.3
−
+6.0
VCCD
Vclk(p-p)
AC input switching voltage
(peak-to-peak value)
V
Tstg
Tamb
Tj
storage temperature
ambient temperature
junction temperature
−55
−20
−
+150
+75
°C
°C
°C
150
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient in free air
75
K/W
CHARACTERISTICS
VCCA = V7 and V8 to V1 and V13 = 4.75 to 5.5 V; VCCD = V31 and V14 to V28 and V25 = 4.75 to 5.5 V;
CCO = V44 to V33 = 2.7 to 3.3 V; AGND1, AGND2, OGND, DGND1 and DGND2 are shorted together;
V
Tamb = −20 to +75 °C; measured typically at VCCA = VCCD = 5 V and VCCO = 3.0 V; CL = 15 pF; Tamb = 25 °C; unless
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VCCA1
analog supply voltage for
the ADC part
4.75
5.0
5.0
5.0
5.0
3.0
5.5
5.5
5.5
5.5
3.3
V
V
V
V
V
VCCD1
VCCA2
VCCD2
VCCO
digital supply voltage for the
ADC part
4.75
4.75
4.75
2.7
analog supply voltage for
the DAC part
digital supply voltage for the
DAC part
output stage supply voltage
1999 Sep 16
6
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
∆VCC
voltage difference between Tamb = 25 °C
V
V
V
CCA − VCCD
CCA − VCCO
CCD − VCCO
−0.2
−
+0.2
V
0
−
2.8
2.8
85
V
0
−
V
ICCA
ICCD
ICCO
analog supply current
digital supply current
59
15
−
74
23
7
mA
mA
mA
35
output stage supply current ramp input;
fCLK = 20 MHz
15
ICCA1(stb) analog standby current for
the ADC part
−
−
0.7
2.5
3
5
mA
mA
ICCA2(stb) analog standby current for
the DAC part
ADC part
CLOCK INPUT
VIL
VIH
IIL
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
Tamb = 25 °C
Tamb = 25 °C
0
−
−
−
−
0.8
V
2.0
−10
−10
VCCD1
+10
V
µA
µA
IIH
+10
DIGITAL INPUTS: PINS OE AND STDBYA
VIL
VIH
IIL
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
Tamb = 25 °C
Tamb = 25 °C
0
−
−
−
−
0.8
V
2.0
−10
−10
VCCD1
+10
V
µA
µA
IIH
+10
ANALOG INPUTS
IIL
LOW-level input current
for code 0
for code 1023
full-scale
−
−91
80
−
µA
µA
V
IIH
HIGH-level input current
−
−
Vi(p-p)
analog input voltage
(peak-to-peak value)
1.52
1.57
1.62
Vi(p-p)over maximum analog input
overvoltage
overvoltage for
fi = 4.43 MHz;
Tamb = 25 °C
−
−
3.0
V
(peak-to-peak value)
ZI
input impedance
input capacitance
−
−
10
3
−
−
kΩ
CI
pF
DIGITAL OUTPUTS: D0A TO D9A
VOL
VOH
IoZ
LOW-level output voltage
Io = 1 mA
0
−
−
0.5
V
HIGH-level output voltage
Io = −1 mA
V
CCO − 0.5 −
VCCO
+20
V
output current in 3-state
mode
0.5 V < Vo < VCCO − 0.5 V −20
µA
SWITCHING CHARACTERISTICS; Tamb = 25 °C (see Fig.3)
fCLK(max)
tCH
maximum clock frequency
clock pulse width HIGH
20
20
−
−
−
−
MHz
ns
1999 Sep 16
7
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
SYMBOL
PARAMETER
clock pulse width LOW
clock rise time
CONDITIONS
MIN.
TYP.
MAX.
UNIT
ns
tCL
tr
20
−
−
4
4
−
−
−
ns
tf
clock fall time
−
ns
ANALOG SIGNAL PROCESSING
Linearity
INLA
integral non linearity
ramp input;
fCLK = 20 MHz
−
−
±2.25
±4
LSB
DNLA
differential non linearity
maximum missing codes
guaranteed: 20
full-scale; ramp input;
fCLK = 20 MHz
+1.55 to −0.9 +2.8 to −1.1 LSB
Noise floor; note 1
NF
noise floor
fi = 4.43 MHz; 20 Msps
fi = 4.43 MHz; 20 Msps
fi = 4.43 MHz; 20 Msps
−55
−50
50
−71
−58
58
−
−
−
dB
dB
dB
Harmonics; note 2
THD
total harmonic distortion
Spurious free dynamic range
SFDR
spurious free dynamic
range
Matching between the I and Q channels
∆V
amplitude matching
fi = 4.43 MHz;
fCLK = 20 MHz;
Tamb = 25 °C
−
−
0.1
6
2
%
∆ϕ
phase matching
fi = 4.43 MHz;
fCLK = 20 MHz;
0.05
deg
Tamb = 25 °C
Bandwidth
B
bandwidth (maximum
attenuation of −0.3 dB)
full-scale sine wave;
amb = 25 °C
50% full-scale sine wave; 30
amb = 25 °C
30
−
−
−
−
MHz
MHz
T
T
TIMING (THE OUTPUT DATA IS AVAILABLE AFTER THE MAXIMUM DELAY TIME td); CL = 15 pF; Tamb = 25 °C (see Fig.3)
tds
th
sampling delay time
output hold time
−
5
−
−
−
11
−
ns
ns
ns
ns
−
td
output delay time
VCCO = 3.3 V
CCO = 2.7 V
3-STATE OUTPUT DELAY TIMES; Tamb = 25 °C (see Fig.4)
12
13
−
V
−
tdZH
tdZL
tdHZ
tdLZ
output delay enable HIGH
output delay enable LOW
output delay disable HIGH
output delay disable LOW
−
−
−
−
10
−
−
−
−
ns
ns
ns
ns
7.7
15.5
14.9
1999 Sep 16
8
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
STANDBY MODE OUTPUT DELAY TIMES; STDBYA; Tamb = 25 °C
td(stb)LH
standby delay
(LOW-to-HIGH transition)
−
−
−
−
100
µs
µs
td(stb)HL
start-up delay
100
(HIGH-to-LOW transition)
CROSSTALK ON THE ADC
αct
crosstalk on the ADC
fCLK(DAC) = 16.384 MHz;
CLK(ADC) = 8.192 MHz;
−50
−55
−
dB
f
Tamb = 25 °C; both DACs
switching between input
codes 0 and 1023; one
ADC 1 V (p-p) sine wave
at 4 MHz and the other
ADC set at the middle
code
DAC part
DIGITAL INPUTS: D0D TO D9D AND CLKD
VIL
VIH
IIL
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
Tamb = 25 °C
Tamb = 25 °C
0
−
−
−
−
0.8
V
2.0
−200
−10
VCCD2
0
V
µA
µA
IIH
+10
DIGITAL INPUT; STDBYD
VIL
VIH
IIL
LOW-level input voltage
Tamb = 25 °C
Tamb = 25 °C
0
−
−
−
−
0.8
V
HIGH-level input voltage
LOW-level input current
HIGH-level input current
2.0
−10
−10
VCCD2
+10
V
µA
µA
IIH
+10
TIMING; Tamb = 25 °C (see Fig.5)
fCLK(max)
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
clock rise time
20
20
20
−
−
−
−
4
4
−
−
−
−
−
−
−
−
−
MHz
ns
tCH
tCL
tr
ns
ns
tf
clock fall time
−
ns
ts
input data set-up time
input data hold time
11
0
ns
th
ns
ANALOG OUTPUTS; note 3
Vo(p-p)
output voltage
(peak-to-peak value)
full-scale
see Fig.6
0.9
1
1.1
V
ZoL
output load impedance
−
−
15
−
−
pF
0.3
kΩ
1999 Sep 16
9
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
TRANSFER FUNCTION
INLD
DNLD
tst
integral non linearity
ramp input;
fCLK = 20 MHz
−
−
−
−
±0.4
±1.25
LSB
LSB
ns
differential non linearity
settling time
ramp input;
±0.35
8.0
7
±1.5
−
fCLK = 20 MHz
10% to 90% full-scale;
Tamb = 25 °C
10% to 90% for 10%
−
ns
full-scale; Tamb = 25 °C
MATCHING BETWEEN CHANNEL I AND Q
∆V
amplitude matching
fo = 4.43 MHz;
fCLK = 20 MHz;
Tamb = 25 °C
−
−
0.2
6
2
%
∆ϕ
phase matching
fo = 4.43 MHz;
−
deg
fCLK = 20 MHz;
Tamb = 25 °C
DYNAMIC RANGE; note 1
NF
noise floor
fo = 4.43 MHz;
fCLK = 20 MHz
−56
−61
−
−
dB
dB
SPURIOUS FREE DYNAMIC RANGE
SFDR
spurious free dynamic
range
fo = 4.43 MHz;
fCLK = 20 MHz
−
55
STANDBY MODE OUTPUT DELAY; STDBYD; Tamb = 25 °C
td(stb)LH
standby delay
(LOW-to-HIGH transition)
−
−
−
−
100
100
µs
µs
td(stb)HL
start-up delay
(HIGH-to-LOW transition)
CROSSTALK ON THE DAC
αct
crosstalk on the DAC
fCLK(DAC) = 16.384 MHz;
fCLK(ADC) = 8.192 MHz;
Tamb = 25 °C; one DAC
switching between input
codes 0 and 1023 the
other DAC set at the
middle code; both ADCs
1 V (p-p) sine wave at
4 MHz; incoherent
−60
−75
−
dB
Notes
1. The noise floor is the maximum value of the output spectrum without taking into account fundamental and harmonics
of the input signal up to the 6th harmonic.
2. Harmonics are obtained via a Fast Fourier Transformer (FFT) treatment taking 8k acquisition points per period.
3. It is recommended that the DAC output voltage is AC coupled in order to achieve optimum performance.
1999 Sep 16
10
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
Table 1 Output coding and input voltage (typical value, with respect to AGND)
BINARY OUTPUT BITS
Vi − V512
STEP
(V)
D9A
D8A
D7A
D6A
D5A
D4A
D3A
D2A
D1A
D0A
underflow
<−0.75
−0.75
...
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
...
...
1
...
0
...
0
...
0
...
0
...
0
...
0
...
0
...
0
...
0
512
0
...
...
...
1
...
1
...
1
...
1
...
1
...
1
...
1
...
1
...
1
...
0
1023
overflow
0.75
>0.75
1
1
1
1
1
1
1
1
1
1
Table 2 Input coding and output voltage (typical value, with respect to DGND)
BINARY INPUT BITS
STEP
Vo − V512
(V)
D9D
D8D
D7D
D6D
D5D
D4D
D3D
D2D
D1D
D0D
0
...
0
...
1
0
...
0
0
...
0
0
...
0
0
...
0
0
...
0
0
...
0
0
...
0
0
...
0
0
...
0
−0.5
...
512
...
0
...
1
...
1
...
1
...
1
...
1
...
1
...
1
...
1
...
1
...
0
...
1023
0.5
Table 3 Mode selection
OE
1
D0A TO D9A
high impedance
active; binary
0
Table 4 Standby selection (ADC part)
STDBYA
D0 TO D9
ICCA + ICCD (typ.)
5 mA
1
0
−
ADC active
64 mA
Table 5 Standby selection (DAC part)
STDBYD
OUTI AND OUTQ
ICCA + ICCD (typ.)
1
0
−
5 mA
DAC active
38 mA
1999 Sep 16
11
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
t
t
CL
CH
n
I
CLKA
1.4 V
I CHANNEL
ADC OUTPUT
I
I
I
n + 1
n − 2
n − 1
n
Q CHANNEL
ADC OUTPUT
Q
Q
Q
Q
n + 1
n − 2
n − 1
n
Q CHANNEL
LATCHED DATA
Q
Q
Q
I
Q
n − 2
n − 1
n
n + 1
HIGH
MULTIPLEXED
OUTPUTS
I
Q
I
Q
Q
I
n − 2
n − 2
n − 1
n − 1
n
n
n + 1
LOW
t
d
t
t
h
ds
sample N
V
or V
iQ
iI
MGG078
Fig.3 Timing diagram for the ADC.
1999 Sep 16
12
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
V
CCO
HIGH
LOW
1.4 V
OE
t
t
dHZ
HIGH
dZH
90%
output
data
50%
high−Z
t
t
dLZ
dZL
high−Z
V
CCO
output
data
50%
S1
3.3 kΩ
LOW
10%
TDA8779
OE
15 pF
MGG077
fOE = 100 kHz.
Fig.4 Timing diagram and test conditions of the 3-state output delay time.
Table 6 Test conditions for Fig.4
TEST
SWITCH S1
VCCO
tdLZ
tdZL
tdHZ
tdZH
VCCO
OGND
OGND
1999 Sep 16
13
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
t
t
t
CH
CL
h
HIGH
1.4 V
CLKD
n
n
LOW
t
s
I
HIGH
MULTIPLEXED
Q
I
Q
I
Q
I
n + 3
n
n + 1
n + 1
n + 2
n + 2
INPUTS
LOW
I CHANNEL
LATCHED DATA
I
I
I
I
I
n
n + 1
n + 2
n + 3
I CHANNEL
DAC OUTPUT
I
I
I
n + 1
n − 1
n
n + 2
Q CHANNEL
DAC OUTPUT
Q
Q
Q
Q
n + 2
n − 1
n
n + 1
MGG079
Fig.5 DACs multiplexed inputs timing diagram.
handbook, halfpage
TDA8779
1 µF
9,11 I, Q
300 Ω
15 pF
MGG076
Fig.6 Equivalent DACs output load.
14
1999 Sep 16
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
APPLICATION INFORMATION
100
nF
10
nF
47
nF
V
V
CCD1
31
DGND1
28
STDBYA
29
CCA1
7
DEC1 DEC2 DEC3
2
3
5
INPUT
BIAS
REFERENCE
REGULATOR
TDA8779
32
100 nF
100 nF
OE
10
10
INI
4
6
1
9
10-BIT
ADC
10
10 34-43
D0A to D9A
MUX
BUFFER
LATCHES
INQ
10-BIT
ADC
44
V
CCO
30
26
CLKA
CLKD
AGND1
BUFFER
33
OGND
1 µF
LATCHES
10
10
OUTI
10-BIT
DAC
15
pF
300 Ω
1 µF
15-24
10
10
D0D to D9D
BUFFER
BUFFER
11
13
10-BIT
DAC
OUTQ
300 Ω
15
pF
REFERENCE
REGULATOR
AGND2
25
27
12
10
14
8
DEC4 DEC5
22 nF
MBH581
10 nF
V
V
CCA2
DGND2
STDBYD
CCD2
Fig.7 Application diagram.
15
1999 Sep 16
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
PACKAGE OUTLINE
QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm
SOT307-2
y
X
A
33
23
34
22
Z
E
e
H
E
E
A
2
A
(A )
3
A
1
w M
θ
b
p
L
p
pin 1 index
L
12
44
detail X
1
11
w M
Z
v
M
A
D
b
p
e
D
B
H
v
M
B
D
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
θ
1
2
3
p
E
p
D
E
max.
10o
0o
0.25 1.85
0.05 1.65
0.40 0.25 10.1 10.1
0.20 0.14 9.9 9.9
12.9 12.9
12.3 12.3
0.95
0.55
1.2
0.8
1.2
0.8
mm
2.10
0.25
0.8
1.3
0.15 0.15 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-02-04
97-08-01
SOT307-2
1999 Sep 16
16
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
SOLDERING
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Manual soldering
Wave soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
1999 Sep 16
17
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
REFLOW(1)
HLQFP, HSQFP, HSOP, SMS
PLCC(3), SO
not suitable(2)
suitable
suitable
suitable
suitable
suitable
suitable
not recommended(3)(4)
LQFP, QFP, TQFP
SQFP
not suitable
not recommended(5)
SSOP, TSSOP, VSO
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Sep 16
18
Philips Semiconductors
Product specification
10-bit converter interface (ADC/DAC) for
quadrature transceiver
TDA8779H
NOTES
1999 Sep 16
19
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For all other countries apply to: Philips Semiconductors,
Internet: http://www.semiconductors.philips.com
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
68
SCA
© Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/25/04/pp20
Date of release: 1999 Sep 16
Document order number: 9397 750 06124
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The TDA8779 contains two 10-bit high speed ADCs and two 10-bit DACs for wireless communication (for use in transceiver modules). This
device converts two analog input signals (channels I and Q) and digital inputs (D0 to D9) at a maximum sampling rate of 20 MHz. The input
bias voltages for the analog input voltages are provided internally at the middle code. The analog input and output voltages are AC coupled.
PC/PC-peripherals
Cross reference
Models
The data sampling is performed on the rising edge of the clock for ADCs and DACs.
All reference voltages are generated internally.
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
Features
l Two 10-bit ADCs with multiplexed outputs
l Two 10-bit DACs with multiplexed inputs
l Sampling rate for the ADCs and DACs up to 20 MHz
l Digital outputs (for the ADC) and inputs (for the DAC) are TTL/CMOS compatible
l Internal reference voltage regulator
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l Power dissipation 520 mW
l Standby mode.
TDA8779H
TDA8779H
Applications
l Wireless communication.
Datasheet
File
size
(kB)
Publication
release date Datasheet status
Page
count
Type nr.
Title
Datasheet
Download
TDA8779H 10-bit converter interface (ADC/DAC) 16-Sep-99
for quadrature transceiver
Product
Specification
20
94
Products, packages, availability and ordering
North American
Partnumber
Order code
(12nc)
Partnumber
marking/packing
package device status buy online
SOT307 Full production
Standard Marking * Reel Dry Pack,
SMD, 13"
TDA8779H/C1 TDA8779HB-T
TDA8779HB-S
9352 297 30518
9352 297 30551
9352 297 30557
Standard Marking * Tray Dry Pack,
Bakeable, Single
SOT307 Full production
Standard Marking * Tray Dry Pack,
Bakeable, Multiple
TDA8779HB
SOT307 Full production
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Royal Philips Electronics
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