935292892132 [NXP]
CBTLV/3B SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO6, 1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6;
| 型号： | 935292892132 |
| 厂家： | 
NXP |
| 描述： | CBTLV/3B SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO6, 1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6 驱动 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总21页 (文件大小：260K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74CBTLV1G125
Single bus switch
Rev. 4 — 5 September 2012
Product data sheet
1. General description
The 74CBTLV1G125 provides a single high-speed line switch. The switch is disabled
when the output enable (OE) input is high.
To ensure the high-impedance OFF-state during power-up or power-down, tie OE to the
V
CC through a pull-up resistor. The current-sinking capability of the driver determines the
minimum value of the resistor.
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 2.3 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF
.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Supply voltage range from 2.3 V to 3.6 V
High noise immunity
Complies with JEDEC standard:
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
5 switch connection between two ports
Rail to rail switching on data I/O ports
CMOS low power consumption
Latch-up performance meets requirements of JESD78 Class I
IOFF circuitry provides partial power-down mode operation
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
74CBTLV1G125
NXP Semiconductors
Single bus switch
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74CBTLV1G125GW 40 C to +125 C
TSSOP5 plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74CBTLV1G125GV 40 C to +125 C
74CBTLV1G125GM 40 C to +125 C
SC-74A
XSON6
plastic surface-mounted package; 5 leads
SOT753
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1 1.45 0.5 mm
74CBTLV1G125GF 40 C to +125 C
74CBTLV1G125GN 40 C to +125 C
74CBTLV1G125GS 40 C to +125 C
XSON6
XSON6
XSON6
plastic extremely thin small outline package; no leads; SOT891
6 terminals; body 1 1 0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9 1.0 0.35 mm
SOT1115
SOT1202
extremely thin small outline package; no leads;
6 terminals; body 1.0 1.0 0.35 mm
4. Marking
Table 2.
Marking
Type number
Marking code[1]
74CBTLV1G125GW
74CBTLV1G125GV
74CBTLV1G125GM
74CBTLV1G125GF
74CBTLV1G125GN
74CBTLV1G125GS
bM
b25
bM
bM
bM
bM
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
A
B
2
1
4
A
SWITCH
B
OE
OE
001aad713
001aad714
Fig 1. Logic symbol
Fig 2. Logic diagram
74CBTLV1G125
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 September 2012
2 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
6. Pinning information
6.1 Pinning
74CBTLV1G125
74CBTLV1G125
OE
A
1
2
3
6
5
4
V
CC
74CBTLV1G125
1
2
3
5
OE
A
V
B
OE
A
1
2
3
6
5
4
V
CC
CC
n.c.
B
n.c.
B
GND
GND
4
GND
001aad717
001aaf817
Transparent top view
Transparent top view
001aad715
Fig 3. Pin configuration
SOT353-1 and SOT753
Fig 4. Pin configuration SOT886
Fig 5. Pin configuration SOT891,
SOT1115 and SOT1202
6.2 Pin description
Table 3.
Symbol
Pin description
Pin
Description
SOT353-1, SOT753 SOT886, SOT891, SOT1115 and SOT1202
OE
A
1
2
3
4
-
1
2
3
4
5
6
output enable input OE (active LOW)
data input or output A
ground (0 V)
GND
B
data input or output B
not connected
n.c.
VCC
5
supply voltage
7. Functional description
7.1 Function table
Table 4.
Function table[1]
Output enable input OE
Function switch
ON-state
L
H
OFF-state
[1] H = HIGH voltage level; L = LOW voltage level.
74CBTLV1G125
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 September 2012
3 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
0.5
0.5
0.5
50
-
Max
+4.6
+4.6
VCC + 0.5
-
Unit
V
supply voltage
[1]
input voltage
V
VSW
IIK
switch voltage
enable and disable mode
VI/O < 0.5 V
V
input clamping current
switch clamping current
switch current
mA
mA
mA
mA
mA
C
ISK
VI < 0.5 V or VI > VCC + 0.5 V
VSW = 0 V to VCC
50
ISW
-
128
+50
-
ICC
supply current
-
IGND
Tstg
Ptot
ground current
50
65
-
storage temperature
total power dissipation
150
250
[2]
Tamb = 40 C to +125 C
mW
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6.
Symbol
VCC
Recommended operating conditions
Parameter
Conditions
Min
2.3
0
Typ
Max
3.6
Unit
supply voltage
input voltage
-
-
-
-
-
V
VI
3.6
V
VSW
switch voltage
ambient temperature
enable and disable mode
0
VCC
+125
20
V
Tamb
40
0
C
ns/V
[1]
t/V
input transition rise and fall rate VCC = 2.3 V to 3.6 V
[1] Applies to control signal levels.
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ[1] Max
Unit
Tamb = 40 C to +85 C
VIH
HIGH-level input voltage
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VI = GND to VCC; VCC = 3.6 V
1.7
-
-
V
2.0
-
-
V
VIL
LOW-level input voltage
input leakage current
-
-
-
-
-
0.7
0.8
1.0
5
V
-
V
II
-
A
A
IS(OFF)
OFF-state leakage current VI = VIH or VIL; VO = VCC GND;
0.1
VCC = 3.6 V; see Figure 6
IS(ON)
ON-state leakage current
VI = VIH or VIL; VCC = 3.6 V; see Figure 7
-
0.1
5
A
74CBTLV1G125
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Product data sheet
Rev. 4 — 5 September 2012
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74CBTLV1G125
NXP Semiconductors
Single bus switch
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V
ICC
Conditions
Min
Typ[1] Max
Unit
A
A
A
pF
-
-
-
-
-
-
-
10
supply current
VI = GND or VCC; IO = 0 A; VCC = 3.6 V
control input; VI = VCC 0.6 V; VCC = 3.6 V
control input; VI = 0 V or 3 V
OFF-state
-
10
[2]
ICC
CI
additional supply current
input capacitance
switch capacitance
-
300
2.5
7.0
10.3
-
-
-
Csw
pF
ON-state
pF
Tamb = 40 C to +125 C
VIH
HIGH-level input voltage
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VI = GND to VCC; VCC = 3.6 V
1.7
-
-
-
-
-
-
-
V
2.0
-
V
VIL
LOW-level input voltage
input leakage current
-
-
-
-
0.7
0.8
100
200
V
V
II
A
A
IS(OFF)
OFF-state leakage current VI = VIH or VIL; VO = VCC GND;
VCC = 3.6 V; see Figure 6
IS(ON)
IOFF
ICC
ON-state leakage current
VI = VIH or VIL; VCC = 3.6 V; see Figure 7
-
-
-
-
-
-
-
-
200
10
A
A
A
A
power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V
supply current
VI = GND or VCC; IO = 0 A; VCC = 3.6 V
200
[2]
ICC
additional supply current
control input; VI = VCC 0.6 V; VCC = 3.6 V
5000
[1] Typical values are measured at Tamb = 25 C and at VCC = 3.3 V.
[2] One input at 3 V, other inputs at VCC or GND.
Table 8.
Resistance RON
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); see test circuit Figure 8.
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
[2]
RON
ON resistance VCC = 2.3 V; see Figure 9
ISW = 64 mA; VI = 0 V
-
-
-
4.7
4.5
11
10
10
25
-
-
-
15.0
15.0
38.0
ISW = 24 mA; VI = 0 V
ISW = 15 mA; VI = 1.7 V
VCC = 3.0 V; see Figure 10
ISW = 64 mA; VI = 0 V
-
-
-
4.2
4.1
7.3
7
7
-
-
-
11.0
11.0
25.5
ISW = 24 mA; VI = 0 V
ISW = 15 mA; VI = 2.4 V
15
[1] Typical values are measured at Tamb = 25 C.
[2] Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
74CBTLV1G125
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 September 2012
5 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
V
V
CC
CC
OE
A
OE
A
V
V
IL
IH
B
B
n.c.
I
I
I
S
S
S
V
I
V
V
I
O
GND
GND
001aad716
001aad718
Fig 6. Test circuit for measuring OFF-state leakage
current
Fig 7. Test circuit for measuring ON-state leakage
current
V
SW
V
CC
OE
V
IL
B
A
V
I
SW
I
GND
001aad729
RON = VSW / ISW
.
Fig 8. Test circuit for measuring ON-resistance
74CBTLV1G125
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 September 2012
6 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
001aad732
001aad733
16
16
R
R
ON
ON
(Ω)
(Ω)
12
12
(1)
(2)
(1)
(2)
8
4
0
8
4
0
(3)
(4)
(3)
(4)
0
1
2
3
0
1
2
3
V
(V)
V
(V)
SW
SW
(1) Tamb = 125 C
(2) amb = 85 C
(1) Tamb = 125 C
(2) amb = 85 C
T
T
(3) Tamb = 25 C
(4) Tamb = 40 C
(3) Tamb = 25 C
(4) Tamb = 40 C
a. VCC = 2.5 V; ISW = 15 mA; VSW = 1.7 V
b. VCC = 2.5 V; ISW = 24 mA; VSW = 0 V
001aad734
14
R
ON
(Ω)
10
(1)
(2)
(3)
(4)
6
2
0
1
2
3
V
(V)
SW
(1) Tamb = 125 C
(2) Tamb = 85 C
(3)
Tamb = 25 C
(4) Tamb = 40 C
c. VCC = 2.5 V; ISW = 64 mA; VSW = 0 V
Fig 9. Switch ON-resistance as a function of input voltage at VCC = 2.5 V
74CBTLV1G125
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 September 2012
7 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
001aad737
001aad736
11
11
R
ON
R
ON
(Ω)
(Ω)
9
7
5
3
9
7
5
3
(1)
(2)
(1)
(2)
(3)
(4)
(3)
(4)
0
1
2
3
4
0
1
2
3
4
V
(V)
V
(V)
SW
SW
(1) Tamb = 125 C
(2) amb = 85 C
(1) Tamb = 125 C
(2) amb = 85 C
T
T
(3) Tamb = 25 C
(4) Tamb = 40 C
(3) Tamb = 25 C
(4) Tamb = 40 C
a. VCC = 3.3 V; ISW = 15 mA; VSW = 2.4 V
b. VCC = 3.3 V; ISW = 24 mA; VSW = 0 V
001aad735
10
R
ON
(Ω)
8
6
4
2
(1)
(2)
(3)
(4)
0
1
2
3
4
V
(V)
SW
(1) Tamb = 125 C
(2) Tamb = 85 C
(3)
Tamb = 25 C
(4) Tamb = 40 C
c. VCC = 3.3 V; ISW = 64 mA; VSW = 0 V
Fig 10. Switch ON-resistance as a function of input voltage at VCC = 3.3 V
74CBTLV1G125
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 September 2012
8 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
11. Dynamic characteristics
Table 9.
Dynamic characteristics
GND = 0 V; see Figure 13.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
[2][3]
tpd
ten
tdis
propagation delay A to B or B to A;
see Figure 11; RL =
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
-
-
-
0.21
0.25
-
-
0.32
0.39
ns
ns
0.16
[4]
enable time
disable time
OE to A or B; see Figure 12;
RL = 500
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.0
1.0
2.50
2.05
4.00
4.00
1.0
1.0
5.00
5.00
ns
ns
[5]
OE to A or B; see Figure 12;
RL = 500
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.0
1.0
2.80
3.40
5.00
4.10
1.0
1.0
6.30
5.40
ns
ns
[1] All typical values are measured at Tamb = 25 C and at nominal VCC
.
[2] The propagation delay is the calculated RC time constant of the maximum on-state resistance of the switch and the load capacitance,
when driven by an ideal voltage source (zero output impedance).
[3]
t
pd is the same as tPLH and tPHL
.
[4] ten is the same as tPZH and tPZL
.
[5] tdis is the same as tPHZ and tPLZ
.
12. Waveforms
V
I
A or B
input
V
V
M
M
GND
t
t
PHL
PLH
V
OH
B or A
output
V
V
M
M
V
OL
001aad719
Measurement points are given in Table 10.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 11. The data input (A or B) to output (B or A) propagation delays
Table 10. Measurement points
Supply voltage
VCC
Output
VM
Inputs
VM
VI
tr = tf
2.3 V to 3.6 V
0.5 VCC
0.5 VCC
VCC
2.0 ns
74CBTLV1G125
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 September 2012
9 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
V
I
OE input
output
V
M
t
GND
t
PLZ
PZL
V
CC
A or B LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
A or B HIGH-to-OFF
OFF-to-HIGH
V
M
GND
switch
enabled
switch
disabled
switch
enabled
001aad720
Measurement points are given in Table 11.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 12. Enable and disable times
Table 11. Measurement points
Supply voltage
VCC
Input
Output
VM
VM
VX
VY
2.3 V to 2.7 V
3.0 V to 3.6 V
0.5 VCC
0.5 VCC
0.5 VCC
0.5 VCC
VOL + 0.15 V
VOL + 0.3 V
VOH 0.15 V
VOH 0.3 V
74CBTLV1G125
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 September 2012
10 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
V
EXT
V
CC
R
L
V
V
O
I
G
DUT
R
T
C
L
R
L
mna616
Test data is given in Table 12.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = Test voltage for switching times.
Fig 13. Test circuit for measuring switching times
Table 12. Test data
Supply voltage
VCC
Load
CL
VEXT
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ
2 VCC
2 VCC
2.3 V to 2.7 V
3.0 V to 3.6 V
30 pF
50 pF
open
GND
74CBTLV1G125
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 September 2012
11 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
13. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
SOT353-1
D
E
A
X
c
y
H
v
M
A
E
Z
5
4
A
2
A
(A )
3
A
1
θ
L
L
p
1
3
e
w M
b
p
detail X
e
1
0
1.5
3 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
A
A
A
b
c
D
E
e
e
1
H
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
E
max.
0.1
0
1.0
0.8
0.30
0.15
0.25
0.08
2.25
1.85
1.35
1.15
2.25
2.0
0.46
0.21
0.60
0.15
7°
0°
mm
1.1
0.65
1.3
0.15
0.425
0.3
0.1
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
00-09-01
03-02-19
SOT353-1
MO-203
SC-88A
Fig 14. Package outline SOT353-1 (TSSOP5)
74CBTLV1G125
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 September 2012
12 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
Plastic surface-mounted package; 5 leads
SOT753
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
1
2
3
p
detail X
e
b
p
w
M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.100
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
02-04-16
06-03-16
SOT753
SC-74A
Fig 15. Package outline SOT753
74CBTLV1G125
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Product data sheet
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13 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4x
(2)
L
L
1
e
6
5
4
e
1
e
1
6x
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
Dimensions (mm are the original dimensions)
(1)
Unit
A
A
1
b
D
E
e
e
L
L
1
1
max 0.5 0.04 0.25 1.50 1.05
0.35 0.40
0.20 1.45 1.00 0.6 0.5 0.30 0.35
0.17 1.40 0.95 0.27 0.32
mm nom
min
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
sot886_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
MO-252
JEITA
04-07-22
12-01-05
SOT886
Fig 16. Package outline SOT886 (XSON6)
74CBTLV1G125
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Product data sheet
Rev. 4 — 5 September 2012
14 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
SOT891
b
1
2
3
4×
(1)
L
L
1
e
6
5
4
e
1
e
1
6×
A
(1)
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.20 1.05 1.05
0.12 0.95 0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.55 0.35
Note
1. Can be visible in some manufacturing processes.
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
05-04-06
07-05-15
SOT891
Fig 17. Package outline SOT891 (XSON6)
74CBTLV1G125
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Rev. 4 — 5 September 2012
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NXP Semiconductors
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XSON6: extremely thin small outline package; no leads;
6 terminals; body 0.9 x 1.0 x 0.35 mm
SOT1115
b
3
(2)
(4×)
1
2
L
L
1
e
6
5
4
e
1
e
1
(2)
(6×)
A
1
A
D
E
terminal 1
index area
0
L
0.5
scale
1 mm
Dimensions
Unit
(1)
A
A
b
D
E
e
e
1
L
1
1
max 0.35 0.04 0.20 0.95 1.05
0.35 0.40
0.15 0.90 1.00 0.55 0.3 0.30 0.35
0.12 0.85 0.95 0.27 0.32
mm nom
min
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
sot1115_po
References
Outline
version
European
Issue date
projection
IEC
JEDEC
JEITA
10-04-02
10-04-07
SOT1115
Fig 18. Package outline SOT1115 (XSON6)
74CBTLV1G125
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Rev. 4 — 5 September 2012
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74CBTLV1G125
NXP Semiconductors
Single bus switch
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
SOT1202
b
3
(2)
1
2
(4×)
L
L
1
e
6
5
4
e
1
e
1
(2)
(6×)
A
1
A
D
E
terminal 1
index area
0
L
0.5
1 mm
scale
Dimensions
Unit
(1)
A
A
b
D
E
e
e
1
L
1
1
max 0.35 0.04 0.20 1.05 1.05
0.35 0.40
0.15 1.00 1.00 0.55 0.35 0.30 0.35
0.12 0.95 0.95 0.27 0.32
mm nom
min
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
sot1202_po
References
Outline
version
European
Issue date
projection
IEC
JEDEC
JEITA
10-04-02
10-04-06
SOT1202
Fig 19. Package outline SOT1202 (XSON6)
74CBTLV1G125
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Product data sheet
Rev. 4 — 5 September 2012
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74CBTLV1G125
NXP Semiconductors
Single bus switch
14. Abbreviations
Table 13. Abbreviations
Acronym
CDM
Description
Charged Device Model
Complementary Metal Oxide Semiconductor
Device Under Test
CMOS
DUT
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
15. Revision history
Table 14. Revision history
Document ID
Release date
20120905
Data sheet status
Change notice
Supersedes
74CBTLV1G125 v.4
Modifications:
Product data sheet
-
74CBTLV1G125 v.3
• Package outline drawing of SOT886 (Figure 16) modified.
74CBTLV1G125 v.3
Modifications:
20111215
Product data sheet
-
74CBTLV1G125 v.2
• Legal pages updated.
74CBTLV1G125 v.2
74CBTLV1G125 v.1
20100729
20070223
Product data sheet
Product data sheet
-
-
74CBTLV1G125 v.1
-
74CBTLV1G125
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Product data sheet
Rev. 4 — 5 September 2012
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NXP Semiconductors
Single bus switch
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
16.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
74CBTLV1G125
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 September 2012
19 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74CBTLV1G125
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Product data sheet
Rev. 4 — 5 September 2012
20 of 21
74CBTLV1G125
NXP Semiconductors
Single bus switch
18. Contents
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
7.1
8
Functional description . . . . . . . . . . . . . . . . . . . 3
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 18
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 18
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 20
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 5 September 2012
Document identifier: 74CBTLV1G125
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